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GET /api/patches/2194469/?format=api
{ "id": 2194469, "url": "http://patchwork.ozlabs.org/api/patches/2194469/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260209062952.2049053-3-den@valinux.co.jp/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260209062952.2049053-3-den@valinux.co.jp>", "list_archive_url": null, "date": "2026-02-09T06:29:45", "name": "[v5,2/8] dmaengine: dw-edma: Cache per-channel IRQ and emulation doorbell offset", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "547e03349fdd36f741d06d25c1a69172aec506dd", "submitter": { "id": 91573, "url": "http://patchwork.ozlabs.org/api/people/91573/?format=api", "name": "Koichiro Den", "email": "den@valinux.co.jp" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260209062952.2049053-3-den@valinux.co.jp/mbox/", "series": [ { "id": 491464, "url": "http://patchwork.ozlabs.org/api/series/491464/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=491464", "date": "2026-02-09T06:29:44", "name": "PCI: endpoint: pci-ep-msi: Add embedded doorbell fallback", "version": 5, "mbox": "http://patchwork.ozlabs.org/series/491464/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2194469/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2194469/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-pci+bounces-46975-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ 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dkim=pass header.d=valinux.co.jp; arc=none" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=valinux.co.jp;\n s=selector1;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=4jNiFyiRP84zNAOUDjXThgyDDoZrcJUDqx+fOsLLy9M=;\n b=N33bDQZWwG2SVlgT4DYSZtIj2v2gDAKd4pgOMZ3hSVZ2G44xykMWLu5VSqlXFQoiskMShTRW5WB9/GjG0kcekAerTH5MfnwmdyaSeYAQ0uPmfICwQ9TyPJXNe5/FlPWYxngBNFXCfkyGxzX1VV4IguySL/bZiRSKAJELsRK/+eU=", "From": "Koichiro Den <den@valinux.co.jp>", "To": "vkoul@kernel.org,\n\tmani@kernel.org,\n\tFrank.Li@nxp.com,\n\tcassel@kernel.org,\n\tjingoohan1@gmail.com,\n\tlpieralisi@kernel.org,\n\tkwilczynski@kernel.org,\n\trobh@kernel.org,\n\tbhelgaas@google.com,\n\tkishon@kernel.org,\n\tjdmason@kudzu.us,\n\tallenbh@gmail.com", "Cc": "dmaengine@vger.kernel.org,\n\tlinux-pci@vger.kernel.org,\n\tntb@lists.linux.dev,\n\tlinux-kselftest@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org", "Subject": "[PATCH v5 2/8] dmaengine: dw-edma: Cache per-channel IRQ and\n emulation doorbell offset", "Date": "Mon, 9 Feb 2026 15:29:45 +0900", "Message-ID": "<20260209062952.2049053-3-den@valinux.co.jp>", "X-Mailer": "git-send-email 2.51.0", "In-Reply-To": "<20260209062952.2049053-1-den@valinux.co.jp>", "References": "<20260209062952.2049053-1-den@valinux.co.jp>", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-ClientProxiedBy": "TYCP286CA0318.JPNP286.PROD.OUTLOOK.COM\n (2603:1096:400:3b7::6) To TY7P286MB7722.JPNP286.PROD.OUTLOOK.COM\n (2603:1096:405:38f::10)", "Precedence": "bulk", "X-Mailing-List": "linux-pci@vger.kernel.org", "List-Id": "<linux-pci.vger.kernel.org>", "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "TY7P286MB7722:EE_|TYYP286MB4425:EE_", "X-MS-Office365-Filtering-Correlation-Id": "656964d0-ff53-4228-1a3b-08de67a4a711", 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"X-OriginatorOrg": "valinux.co.jp", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 656964d0-ff53-4228-1a3b-08de67a4a711", "X-MS-Exchange-CrossTenant-AuthSource": "TY7P286MB7722.JPNP286.PROD.OUTLOOK.COM", "X-MS-Exchange-CrossTenant-AuthAs": "Internal", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "09 Feb 2026 06:30:00.8940\n (UTC)", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "7a57bee8-f73d-4c5f-a4f7-d72c91c8c111", "X-MS-Exchange-CrossTenant-MailboxType": "HOSTED", "X-MS-Exchange-CrossTenant-UserPrincipalName": "\n 0Jp2DPMWkxbqTH9kapD+r7wOJZ+fCXomOEWyD0Z03CHEGgfhnAvH0uIXpoFXnrrZ99Re+D3BUQ0MeUGPBbwzpg==", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "TYYP286MB4425" }, "content": "Some DesignWare PCIe endpoint controllers integrate a DesignWare\neDMA/HDMA instance. In remote eDMA use cases (e.g. exposing the eDMA\nMMIO window and per-channel linked-list regions to a peer via BARs),\nconsumers need a stable way to discover:\n - the Linux IRQ number associated with a given channel's interrupt\n vector,\n - an offset within the eDMA register window that can be used as an\n interrupt-emulation doorbell for that channel.\n\nStore the requested Linux IRQ number in struct dw_edma_irq at IRQ\nrequest time and cache per-channel metadata in struct dw_edma_chip\n(ch_info_wr/rd) during channel setup. Add a core callback, .ch_info(),\nto fill core-specific metadata such as the doorbell register offset;\nimplement it for the v0 eDMA core (use rd_int_status as a suitable\ndoorbell target) and provide a placeholder for HDMA until the correct\noffset is known.\n\nNo functional change for normal DMA operation. This only makes the\nmetadata available to controller/platform drivers that need to expose or\nconsume eDMA-related resources.\n\nSigned-off-by: Koichiro Den <den@valinux.co.jp>\n---\n drivers/dma/dw-edma/dw-edma-core.c | 9 +++++++++\n drivers/dma/dw-edma/dw-edma-core.h | 9 +++++++++\n drivers/dma/dw-edma/dw-edma-v0-core.c | 11 +++++++++++\n drivers/dma/dw-edma/dw-hdma-v0-core.c | 8 ++++++++\n include/linux/dma/edma.h | 17 +++++++++++++++++\n 5 files changed, 54 insertions(+)", "diff": "diff --git a/drivers/dma/dw-edma/dw-edma-core.c b/drivers/dma/dw-edma/dw-edma-core.c\nindex fe131abf1ca3..bd5ff4a4431a 100644\n--- a/drivers/dma/dw-edma/dw-edma-core.c\n+++ b/drivers/dma/dw-edma/dw-edma-core.c\n@@ -760,6 +760,7 @@ static int dw_edma_channel_setup(struct dw_edma *dw, u32 wr_alloc, u32 rd_alloc)\n {\n \tstruct dw_edma_chip *chip = dw->chip;\n \tstruct device *dev = chip->dev;\n+\tstruct dw_edma_ch_info *info;\n \tstruct dw_edma_chan *chan;\n \tstruct dw_edma_irq *irq;\n \tstruct dma_device *dma;\n@@ -779,9 +780,11 @@ static int dw_edma_channel_setup(struct dw_edma *dw, u32 wr_alloc, u32 rd_alloc)\n \t\tif (i < dw->wr_ch_cnt) {\n \t\t\tchan->id = i;\n \t\t\tchan->dir = EDMA_DIR_WRITE;\n+\t\t\tinfo = &chip->ch_info_wr[chan->id];\n \t\t} else {\n \t\t\tchan->id = i - dw->wr_ch_cnt;\n \t\t\tchan->dir = EDMA_DIR_READ;\n+\t\t\tinfo = &chip->ch_info_rd[chan->id];\n \t\t}\n \n \t\tchan->configured = false;\n@@ -807,6 +810,10 @@ static int dw_edma_channel_setup(struct dw_edma *dw, u32 wr_alloc, u32 rd_alloc)\n \n \t\tirq = &dw->irq[pos];\n \n+\t\t/* cache channel-specific info */\n+\t\tdw_edma_core_ch_info(dw, chan, info);\n+\t\tinfo->irq = irq->irq;\n+\n \t\tif (chan->dir == EDMA_DIR_WRITE)\n \t\t\tirq->wr_mask |= BIT(chan->id);\n \t\telse\n@@ -910,6 +917,7 @@ static int dw_edma_irq_request(struct dw_edma *dw,\n \t\tif (irq_get_msi_desc(irq))\n \t\t\tget_cached_msi_msg(irq, &dw->irq[0].msi);\n \n+\t\tdw->irq[0].irq = irq;\n \t\tdw->nr_irqs = 1;\n \t} else {\n \t\t/* Distribute IRQs equally among all channels */\n@@ -936,6 +944,7 @@ static int dw_edma_irq_request(struct dw_edma *dw,\n \n \t\t\tif (irq_get_msi_desc(irq))\n \t\t\t\tget_cached_msi_msg(irq, &dw->irq[i].msi);\n+\t\t\tdw->irq[i].irq = irq;\n \t\t}\n \n \t\tdw->nr_irqs = i;\ndiff --git a/drivers/dma/dw-edma/dw-edma-core.h b/drivers/dma/dw-edma/dw-edma-core.h\nindex 50b87b63b581..82f8f3b38752 100644\n--- a/drivers/dma/dw-edma/dw-edma-core.h\n+++ b/drivers/dma/dw-edma/dw-edma-core.h\n@@ -93,6 +93,7 @@ struct dw_edma_irq {\n \tu32\t\t\t\twr_mask;\n \tu32\t\t\t\trd_mask;\n \tstruct dw_edma\t\t\t*dw;\n+\tint\t\t\t\tirq;\n };\n \n struct dw_edma {\n@@ -127,6 +128,7 @@ struct dw_edma_core_ops {\n \tvoid (*ch_config)(struct dw_edma_chan *chan);\n \tvoid (*debugfs_on)(struct dw_edma *dw);\n \tvoid (*ack_emulated_irq)(struct dw_edma *dw);\n+\tvoid (*ch_info)(struct dw_edma_chan *chan, struct dw_edma_ch_info *info);\n };\n \n struct dw_edma_sg {\n@@ -216,4 +218,11 @@ static inline int dw_edma_core_ack_emulated_irq(struct dw_edma *dw)\n \treturn 0;\n }\n \n+static inline void\n+dw_edma_core_ch_info(struct dw_edma *dw, struct dw_edma_chan *chan,\n+\t\t struct dw_edma_ch_info *info)\n+{\n+\tdw->core->ch_info(chan, info);\n+}\n+\n #endif /* _DW_EDMA_CORE_H */\ndiff --git a/drivers/dma/dw-edma/dw-edma-v0-core.c b/drivers/dma/dw-edma/dw-edma-v0-core.c\nindex 82b9c063c10f..0b8d4b6a5e26 100644\n--- a/drivers/dma/dw-edma/dw-edma-v0-core.c\n+++ b/drivers/dma/dw-edma/dw-edma-v0-core.c\n@@ -519,6 +519,16 @@ static void dw_edma_v0_core_ack_emulated_irq(struct dw_edma *dw)\n \tSET_BOTH_32(dw, int_clear, 0);\n }\n \n+static void dw_edma_v0_core_ch_info(struct dw_edma_chan *chan,\n+\t\t\t\t struct dw_edma_ch_info *info)\n+{\n+\t/*\n+\t * rd_int_status is chosen arbitrarily, but wr_int_status would be\n+\t * equally suitable.\n+\t */\n+\tinfo->db_offset = offsetof(struct dw_edma_v0_regs, rd_int_status);\n+}\n+\n static const struct dw_edma_core_ops dw_edma_v0_core = {\n \t.off = dw_edma_v0_core_off,\n \t.ch_count = dw_edma_v0_core_ch_count,\n@@ -528,6 +538,7 @@ static const struct dw_edma_core_ops dw_edma_v0_core = {\n \t.ch_config = dw_edma_v0_core_ch_config,\n \t.debugfs_on = dw_edma_v0_core_debugfs_on,\n \t.ack_emulated_irq = dw_edma_v0_core_ack_emulated_irq,\n+\t.ch_info = dw_edma_v0_core_ch_info,\n };\n \n void dw_edma_v0_core_register(struct dw_edma *dw)\ndiff --git a/drivers/dma/dw-edma/dw-hdma-v0-core.c b/drivers/dma/dw-edma/dw-hdma-v0-core.c\nindex e3f8db4fe909..1076b394c45f 100644\n--- a/drivers/dma/dw-edma/dw-hdma-v0-core.c\n+++ b/drivers/dma/dw-edma/dw-hdma-v0-core.c\n@@ -283,6 +283,13 @@ static void dw_hdma_v0_core_debugfs_on(struct dw_edma *dw)\n \tdw_hdma_v0_debugfs_on(dw);\n }\n \n+static void dw_hdma_v0_core_ch_info(struct dw_edma_chan *chan,\n+\t\t\t\t struct dw_edma_ch_info *info)\n+{\n+\t/* Implement once the correct offset is known. */\n+\tinfo->db_offset = ~0;\n+}\n+\n static const struct dw_edma_core_ops dw_hdma_v0_core = {\n \t.off = dw_hdma_v0_core_off,\n \t.ch_count = dw_hdma_v0_core_ch_count,\n@@ -291,6 +298,7 @@ static const struct dw_edma_core_ops dw_hdma_v0_core = {\n \t.start = dw_hdma_v0_core_start,\n \t.ch_config = dw_hdma_v0_core_ch_config,\n \t.debugfs_on = dw_hdma_v0_core_debugfs_on,\n+\t.ch_info = dw_hdma_v0_core_ch_info,\n };\n \n void dw_hdma_v0_core_register(struct dw_edma *dw)\ndiff --git a/include/linux/dma/edma.h b/include/linux/dma/edma.h\nindex 3080747689f6..921250204a08 100644\n--- a/include/linux/dma/edma.h\n+++ b/include/linux/dma/edma.h\n@@ -60,6 +60,19 @@ enum dw_edma_chip_flags {\n \tDW_EDMA_CHIP_LOCAL\t= BIT(0),\n };\n \n+/**\n+ * struct dw_edma_ch_info - DW eDMA channel metadata\n+ * @irq:\tLinux IRQ number used by this channel's interrupt vector\n+ * @db_offset:\toffset within the eDMA register window that can be used as\n+ *\t\tan interrupt-emulation doorbell for this channel\n+ */\n+struct dw_edma_ch_info {\n+\tint\t\t\tirq;\n+\n+\t/* Fields below are filled in by dw_edma_core_ops->ch_info() */\n+\tresource_size_t\t\tdb_offset;\n+};\n+\n /**\n * struct dw_edma_chip - representation of DesignWare eDMA controller hardware\n * @dev:\t\t struct device of the eDMA controller\n@@ -96,6 +109,10 @@ struct dw_edma_chip {\n \tstruct dw_edma_region\tdt_region_wr[EDMA_MAX_WR_CH];\n \tstruct dw_edma_region\tdt_region_rd[EDMA_MAX_RD_CH];\n \n+\t/* cached channel info */\n+\tstruct dw_edma_ch_info\tch_info_wr[EDMA_MAX_WR_CH];\n+\tstruct dw_edma_ch_info\tch_info_rd[EDMA_MAX_RD_CH];\n+\n \tenum dw_edma_map_format\tmf;\n \n \tstruct dw_edma\t\t*dw;\n", "prefixes": [ "v5", "2/8" ] }