get:
Show a patch.

patch:
Update a patch.

put:
Update a patch.

GET /api/patches/2194359/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 2194359,
    "url": "http://patchwork.ozlabs.org/api/patches/2194359/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/linux-tegra/patch/20260208180746.2024338-14-mmaddireddy@nvidia.com/",
    "project": {
        "id": 21,
        "url": "http://patchwork.ozlabs.org/api/projects/21/?format=api",
        "name": "Linux Tegra Development",
        "link_name": "linux-tegra",
        "list_id": "linux-tegra.vger.kernel.org",
        "list_email": "linux-tegra@vger.kernel.org",
        "web_url": null,
        "scm_url": null,
        "webscm_url": null,
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<20260208180746.2024338-14-mmaddireddy@nvidia.com>",
    "list_archive_url": null,
    "date": "2026-02-08T18:07:46",
    "name": "[V5,13/13] PCI: tegra194: Set LTR message request before PCIe link up",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "33e87c40a243db106694c1a5375a4918bb1deb4f",
    "submitter": {
        "id": 72399,
        "url": "http://patchwork.ozlabs.org/api/people/72399/?format=api",
        "name": "Manikanta Maddireddy",
        "email": "mmaddireddy@nvidia.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/linux-tegra/patch/20260208180746.2024338-14-mmaddireddy@nvidia.com/mbox/",
    "series": [
        {
            "id": 491428,
            "url": "http://patchwork.ozlabs.org/api/series/491428/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/linux-tegra/list/?series=491428",
            "date": "2026-02-08T18:07:33",
            "name": "Fixes to pcie-tegra194 driver",
            "version": 5,
            "mbox": "http://patchwork.ozlabs.org/series/491428/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/2194359/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2194359/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "\n <linux-tegra+bounces-11867-incoming=patchwork.ozlabs.org@vger.kernel.org>",
        "X-Original-To": [
            "incoming@patchwork.ozlabs.org",
            "linux-tegra@vger.kernel.org"
        ],
        "Delivered-To": "patchwork-incoming@legolas.ozlabs.org",
        "Authentication-Results": [
            "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=Nvidia.com header.i=@Nvidia.com header.a=rsa-sha256\n header.s=selector2 header.b=Bd1cTHoN;\n\tdkim-atps=neutral",
            "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.105.105.114; helo=tor.lore.kernel.org;\n envelope-from=linux-tegra+bounces-11867-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)",
            "smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com\n header.b=\"Bd1cTHoN\"",
            "smtp.subspace.kernel.org;\n arc=fail smtp.client-ip=40.93.194.42",
            "smtp.subspace.kernel.org;\n dmarc=pass (p=reject dis=none) header.from=nvidia.com",
            "smtp.subspace.kernel.org;\n spf=fail smtp.mailfrom=nvidia.com"
        ],
        "Received": [
            "from tor.lore.kernel.org (tor.lore.kernel.org [172.105.105.114])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4f8GC75vtgz1xvc\n\tfor <incoming@patchwork.ozlabs.org>; Mon, 09 Feb 2026 05:12:51 +1100 (AEDT)",
            "from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby tor.lore.kernel.org (Postfix) with ESMTP id 4260D3021D0E\n\tfor <incoming@patchwork.ozlabs.org>; Sun,  8 Feb 2026 18:09:37 +0000 (UTC)",
            "from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 0E276301001;\n\tSun,  8 Feb 2026 18:09:37 +0000 (UTC)",
            "from SN4PR0501CU005.outbound.protection.outlook.com\n (mail-southcentralusazon11011042.outbound.protection.outlook.com\n [40.93.194.42])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 9DB792F5472;\n\tSun,  8 Feb 2026 18:09:36 +0000 (UTC)",
            "from BYAPR02CA0070.namprd02.prod.outlook.com (2603:10b6:a03:54::47)\n by MW4PR12MB6875.namprd12.prod.outlook.com (2603:10b6:303:209::5) with\n Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9587.18; Sun, 8 Feb\n 2026 18:09:31 +0000",
            "from SJ1PEPF000023D8.namprd21.prod.outlook.com\n (2603:10b6:a03:54:cafe::77) by BYAPR02CA0070.outlook.office365.com\n (2603:10b6:a03:54::47) with Microsoft SMTP Server (version=TLS1_3,\n cipher=TLS_AES_256_GCM_SHA384) id 15.20.9587.18 via Frontend Transport; Sun,\n 8 Feb 2026 18:09:33 +0000",
            "from mail.nvidia.com (216.228.117.161) by\n SJ1PEPF000023D8.mail.protection.outlook.com (10.167.244.73) with Microsoft\n SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n 15.20.9632.0 via Frontend Transport; Sun, 8 Feb 2026 18:09:30 +0000",
            "from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com\n (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Sun, 8 Feb\n 2026 10:09:24 -0800",
            "from mmaddireddy-ubuntu.nvidia.com (10.126.231.35) by\n rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server\n (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n 15.2.2562.20; Sun, 8 Feb 2026 10:09:19 -0800"
        ],
        "ARC-Seal": [
            "i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1770574176; cv=fail;\n b=NRcXsaslkX8GZBKQq81jtTdUSBf159Su2o0l1jWexkFmwx96QU1fW4OW/i0tuzS+T4kGXIa3am7SINfUNhtsXJ7849QOQbsFyjAhS0Hv5Vvw7xIytB490vyQRWf/+4BYgtSuLjdmLMNUc25RYLWcm4tf8aV/K9i4Izev6dJyDiI=",
            "i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none;\n b=ajxQyarGe+n5pIW3OFoIzsZihU3VDYEOb9iKPiga7X8zryDOAHAkQboN14gwKbUr6Ir6+X5cUbSvKGive38JW4yIiQP4WW9RK35vJ6H36peE7FeKYUcmW90i9YsYK72ksONHoei9ljybOK+0hU7yns0WoAwdc9+c9xAtE2RHr081PWGc8NNbuwdJn51RUO8omw7v79MarX13wRd796JvdhkfQiJJZfNL7OEF5iIZ8MKBAsuaB9uK0P1iLOmA3SvjWZAVV+tTQtPWosmkreebfKQMNR9IfGBQUw78RtjGVfGLyhS9gSlQRCM5JISokbE9mjVsqMBNz5YCVugDYTe02g=="
        ],
        "ARC-Message-Signature": [
            "i=2; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1770574176; c=relaxed/simple;\n\tbh=sfJPrJRnrmZ6YEhJeXv0gmGV9PhV6JPBFeKPI/b5oRc=;\n\th=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References:\n\t MIME-Version:Content-Type;\n b=HA3XNA/afJgkzWdpBhoex1VRU5Jjh2hNvV6fwciFCjrbyYHemxTySfo+KJg5YtkXkCfjtBG2n3mmmE+UUd5fNOllk/irBoKcLNH279cP5EnKD1vYHgzAgiJgHov2t8k5hZpEOnnc07uD+17y7VErxhDQIlx2a3u/bhGT4wktVQg=",
            "i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com;\n s=arcselector10001;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1;\n bh=HgdNrq5cyv3T2PAv6/RXFsbLPe7o9wqs1w2B2N5rsMg=;\n b=xIOdOM/oISt8mOI4mPh9Idqud4oeCrbHz49gtgF0QUwTHNhllvQowlsgItk7qEpt7HBwK8h/BWJ9iH/Q+79bUCi1cEr5CWjn13kAIi6liMsNNhTz9+KYw2RTbVf+bNV4lZYAbbVFzPaeLWiukVQcYzWCVNFNccSCa63QE+/uLbR8dKEij0/51qfJ5Esj45KySUoVHXv1hsIwlA6Udt/6Cc1m1cuystxiRZwIxrUO+GF9ElcJsDn50lKC76eFuWMT0J1WDQhAL1hJlpkDi37Ii5lB7AwUv5bGPyB5N6YKYPP1chAwWUaAoe6kwb6Nu+i0cH2sEdszdTZx9of82chJKg=="
        ],
        "ARC-Authentication-Results": [
            "i=2; smtp.subspace.kernel.org;\n dmarc=pass (p=reject dis=none) header.from=nvidia.com;\n spf=fail smtp.mailfrom=nvidia.com;\n dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com\n header.b=Bd1cTHoN; arc=fail smtp.client-ip=40.93.194.42",
            "i=1; mx.microsoft.com 1; spf=pass (sender ip is\n 216.228.117.161) smtp.rcpttodomain=google.com smtp.mailfrom=nvidia.com;\n dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com;\n dkim=none (message not signed); arc=none (0)"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com;\n s=selector2;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=HgdNrq5cyv3T2PAv6/RXFsbLPe7o9wqs1w2B2N5rsMg=;\n b=Bd1cTHoNA/7Jca6en9OShJgOqmA9H2IxO4fAtxc0gmaORX4xSpqcLYyI2tpn0OJodZODckQ/rZyIao1nQKDkt3hFfZsDVoKEljXQFrWjG5+23WH2897oYD/MmSgmVWJ28fQepDTnKS0uN4KLbiIqGrtUeVYfyvZ/OftnCNZyStqq/KMUub5SQb0YG/M1wj6rYmdXBi6qUmobOmzLUgOm4olSkjCZ7a9RhJg0tY4rLOl6EGLU1u7DYpm5WALHm+hqKFqxgnY4IhrrrbYmidqX+ho3IPpwM3mojHgnv6r72hFNNkrYQYAOvIDpL1S+1Tqu9hqDkdF05OU8PRIHj9/fGQ==",
        "X-MS-Exchange-Authentication-Results": "spf=pass (sender IP is 216.228.117.161)\n smtp.mailfrom=nvidia.com; dkim=none (message not signed)\n header.d=none;dmarc=pass action=none header.from=nvidia.com;",
        "Received-SPF": "Pass (protection.outlook.com: domain of nvidia.com designates\n 216.228.117.161 as permitted sender) receiver=protection.outlook.com;\n client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C",
        "From": "Manikanta Maddireddy <mmaddireddy@nvidia.com>",
        "To": "<bhelgaas@google.com>, <lpieralisi@kernel.org>, <kwilczynski@kernel.org>,\n\t<mani@kernel.org>, <robh@kernel.org>, <krzk+dt@kernel.org>,\n\t<conor+dt@kernel.org>, <thierry.reding@gmail.com>, <jonathanh@nvidia.com>,\n\t<jingoohan1@gmail.com>, <vidyas@nvidia.com>, <cassel@kernel.org>,\n\t<18255117159@163.com>",
        "CC": "<linux-pci@vger.kernel.org>, <devicetree@vger.kernel.org>,\n\t<linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org>, \"Manikanta\n Maddireddy\" <mmaddireddy@nvidia.com>",
        "Subject": "[V5,13/13] PCI: tegra194: Set LTR message request before PCIe link up",
        "Date": "Sun, 8 Feb 2026 23:37:46 +0530",
        "Message-ID": "<20260208180746.2024338-14-mmaddireddy@nvidia.com>",
        "X-Mailer": "git-send-email 2.34.1",
        "In-Reply-To": "<20260208180746.2024338-1-mmaddireddy@nvidia.com>",
        "References": "<20260208180746.2024338-1-mmaddireddy@nvidia.com>",
        "Precedence": "bulk",
        "X-Mailing-List": "linux-tegra@vger.kernel.org",
        "List-Id": "<linux-tegra.vger.kernel.org>",
        "List-Subscribe": "<mailto:linux-tegra+subscribe@vger.kernel.org>",
        "List-Unsubscribe": "<mailto:linux-tegra+unsubscribe@vger.kernel.org>",
        "MIME-Version": "1.0",
        "X-NVConfidentiality": "public",
        "Content-Transfer-Encoding": "8bit",
        "Content-Type": "text/plain",
        "X-ClientProxiedBy": "rnnvmail203.nvidia.com (10.129.68.9) To\n rnnvmail201.nvidia.com (10.129.68.8)",
        "X-EOPAttributedMessage": "0",
        "X-MS-PublicTrafficType": "Email",
        "X-MS-TrafficTypeDiagnostic": "SJ1PEPF000023D8:EE_|MW4PR12MB6875:EE_",
        "X-MS-Office365-Filtering-Correlation-Id": "a07f364b-217e-4c34-18d6-08de673d34cf",
        "X-MS-Exchange-SenderADCheck": "1",
        "X-MS-Exchange-AntiSpam-Relay": "0",
        "X-Microsoft-Antispam": "\n\tBCL:0;ARA:13230040|376014|7416014|36860700013|82310400026|1800799024|921020;",
        "X-Microsoft-Antispam-Message-Info": "\n GLULTHoN2iH/Ju5bj3RkbluZnpb2i8Jy9p+yJooiEvlqeEdBl8xONbYWgdhKitRap+9/UYu29CFuj8XLYID0c/U2BWlO1/y2a0OJlKYFkA+Wz6BAhthUwEp6wl2sGEagFsJidscFySJg4WBVPlXg2Tj06THs0z1Hmi44a2F21I3jMs3VAZJ9qlGodRpKEc/rbPZoYCXk1WZJjBU48bpez8GFUf3BvlxK1Ia8NhP+iKeE+DaaM4P1omDQ9MP3TPSOWRlqzrzoiwEkBbsCR5Y/LsSPFKCOMUcSnVE3GpZGEwPVX2pCWbnIYFlW8y2T2OfX90jPTzUgK66R3KaKYX9zY0x3ONSKN/2WRFhralFubcayUMnrDEoARUpVIp/bQ+0hshws3GVNafvzlUEGEHxOA+p+v3aCPGOCPvQN9kTwBBGqIiADN/koWslUvCVkQ83eIkLEgerP4LUmstJo4LQ4TuYChi9cGXA1UCvguzMgOuDUXlDDj0YX1G99dYDn6YUQpsA5qX5i9iv6pwEFfcuJSnGs0T6SxTTBhoFAYeIVXnTTgOxkdY+ZiV70Kxuue5L8DxDsuEpPrc78luIdKki9HaYAaJQy2ol0dTXxDeAjr7c8cw7h40fOItWKwzxhWOfE7iaWg7HD0FN3hXnH1gg+jqC4TBXziKaZqBzaKO59saOmsnkoMFEAd5otjgJejPCDnSDA4tA6OQRZY9QVVTgcAzx7rR5GWKLkSOSn4+KcdRNsC7nOq7hhcmC9R/VqFCFmIjtbIbUoAhu6b8vvmMdsJ2a+juEhHwTqnbuyjB2WA985gNt6mMFpQSnX5nBUJqhKL8NR6i086VySe25s9Z5b1mW3PTgGmjaNDE9qVcEck5OrbZOk0ZPanie/BxzIwjJDZWDpZEF18mDMeKWxNX0ZWT6s1WwPKyRx/KVJ1ttrzH0JPWJ4HoUnIyPLlsUjSJDNrnwI61IzU1MnA7r9n3q5XT1/1ZuY5V0XGyaSVXZpUfaaDG3hC7xRweId7cLCbvRK8Y5g0WZ5ReC2QNPl+o3zEFX58P3eJDXDrCcvlTzfocnIeDFB28GA0kNGsjWJTU3m8XXAqrqYH2e6pdtpVbHwXz3TyDQRGnnHxat6mlBu1oxiJJBpvEH4CDFUrmsOhvhSu35bek7JOdJnon4XVGo2xQ5y45GNWs3BuXXYMyWF/7m83VuLbt1aPtGRewG688ZdNfL9dui7decQ1R08kB4XvKneQYxmwb/k+buwEwjoM2AL6F6cdEIHCjbHCIyOuIUzi+Kj6N3T9KR1ZxtSq+aU7zijRlnLQXQ1CCds5kuggxLmlYwcfJMvZ4feTiTrIXakOZrHNvc6ryPdAU1N7TGTBoNWT1AS+cewDltNwaCqomeG9KErdaOcYGvTygDsew1VSKH3KxtT3qEpTCSaSAxdIoWHyKcAOAvvWvW+XCQ89KCgV7u+V1tfrZ5KL3hSEctQTSBxSibB/70EjQ/voQGJSvRdItjhh4Srm8YksMv0har6bkg8zC/rkOItb3zCacB/ZAcyL010beyu3ShOHTM1nLtlnCLkPqiTRfokL8LyGkTnpdmFab5k2spqp1zvp2mV2eTv59oLIJZMDLtdjOXBr5ifudLLRn4uYYvKO+1US5Oc1hcMQO3C/g1R6s2hMl90mji3noHfilf7PavadExapCwVxLbNoGkZlYJypBLyVPQ=",
        "X-Forefront-Antispam-Report": "\n\tCIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(376014)(7416014)(36860700013)(82310400026)(1800799024)(921020);DIR:OUT;SFP:1101;",
        "X-MS-Exchange-AntiSpam-MessageData-ChunkCount": "1",
        "X-MS-Exchange-AntiSpam-MessageData-0": "\n\tCbnrQ9f/kpx2PUZ8oCxjv7bCak/1Yq6uu8pv2lsJC+ktaM0gABieVAWPpuumsehB5SSIn40dOTogKw5EDVT4gqJRC5+zKF3GPKHCl2f17vJqSO1EBZhimPbAbqhKpeEoDhA4J0mMDXCJWcyKhGsmtEmo6FSu7uOJB/0b733Ox9qb39wS39NJrTyy6q5BxQfrMOD1EoM4gMqsA5LietQIyzTDgVVnUlvd9y1XK5z23n9DQfJZy68HciSwCwmpLFovyrTPWgKsG9dgT235a92tsB+tAi5o488Ynocl6fJMY2MaqZqPR3/yWv2FguVTtvg2hfbnFIP9gS9oGchSB92SkEOwnH13K7mf+AzRaGRZZB7cyKh7pCc9RzPtVk4iNgNz+O7AsTXpcR/zWpgODz11MSBZK1JCUNbIP7SwOzVdYUQwpC7pCPjo0LwNqM4oZZoj",
        "X-OriginatorOrg": "Nvidia.com",
        "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "08 Feb 2026 18:09:30.9272\n (UTC)",
        "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n a07f364b-217e-4c34-18d6-08de673d34cf",
        "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a",
        "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com]",
        "X-MS-Exchange-CrossTenant-AuthSource": "\n\tSJ1PEPF000023D8.namprd21.prod.outlook.com",
        "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous",
        "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem",
        "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "MW4PR12MB6875"
    },
    "content": "From: Vidya Sagar <vidyas@nvidia.com>\n\nLTR message should be sent as soon as the root port enables LTR in the\nendpoint. Set snoop & no snoop LTR timing and LTR message request before\nPCIe links up. This ensures that LTR message is sent upstream as soon as\nLTR is enabled.\n\nFixes: c57247f940e8 (\"PCI: tegra: Add support for PCIe endpoint mode in Tegra194\")\nSigned-off-by: Vidya Sagar <vidyas@nvidia.com>\nSigned-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>\n---\nV5:\n* None\n\nV4:\n* None\n\nV3:\n* None\n\nV2:\n* None\n\n drivers/pci/controller/dwc/pcie-tegra194.c | 15 ++++++---------\n 1 file changed, 6 insertions(+), 9 deletions(-)",
    "diff": "diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c\nindex 0f669933b108..9883d14f7f97 100644\n--- a/drivers/pci/controller/dwc/pcie-tegra194.c\n+++ b/drivers/pci/controller/dwc/pcie-tegra194.c\n@@ -124,6 +124,7 @@\n \n #define APPL_LTR_MSG_1\t\t\t\t0xC4\n #define LTR_MSG_REQ\t\t\t\tBIT(15)\n+#define LTR_MST_NO_SNOOP_SHIFT\t\t\t16\n #define LTR_NOSNOOP_MSG_REQ\t\t\tBIT(31)\n \n #define APPL_LTR_MSG_2\t\t\t\t0xC8\n@@ -488,15 +489,6 @@ static irqreturn_t tegra_pcie_ep_irq_thread(int irq, void *arg)\n \tif (val & PCI_COMMAND_MASTER) {\n \t\tktime_t timeout;\n \n-\t\t/* 110us for both snoop and no-snoop */\n-\t\tval = FIELD_PREP(PCI_LTR_VALUE_MASK, 110) |\n-\t\t      FIELD_PREP(PCI_LTR_SCALE_MASK, 2) |\n-\t\t      LTR_MSG_REQ |\n-\t\t      FIELD_PREP(PCI_LTR_NOSNOOP_VALUE, 110) |\n-\t\t      FIELD_PREP(PCI_LTR_NOSNOOP_SCALE, 2) |\n-\t\t      LTR_NOSNOOP_MSG_REQ;\n-\t\tappl_writel(pcie, val, APPL_LTR_MSG_1);\n-\n \t\t/* Send LTR upstream */\n \t\tval = appl_readl(pcie, APPL_LTR_MSG_2);\n \t\tval |= APPL_LTR_MSG_2_LTR_MSG_REQ_STATE;\n@@ -1799,6 +1791,11 @@ static void pex_ep_event_pex_rst_deassert(struct tegra_pcie_dw *pcie)\n \tval |= APPL_INTR_EN_L1_0_0_RDLH_LINK_UP_INT_EN;\n \tappl_writel(pcie, val, APPL_INTR_EN_L1_0_0);\n \n+\t/* 110us for both snoop and no-snoop */\n+\tval = 110 | (2 << PCI_LTR_SCALE_SHIFT) | LTR_MSG_REQ;\n+\tval |= (val << LTR_MST_NO_SNOOP_SHIFT);\n+\tappl_writel(pcie, val, APPL_LTR_MSG_1);\n+\n \treset_control_deassert(pcie->core_rst);\n \n \t/* Perform cleanup that requires refclk and core reset deasserted */\n",
    "prefixes": [
        "V5",
        "13/13"
    ]
}