Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/2194342/?format=api
{ "id": 2194342, "url": "http://patchwork.ozlabs.org/api/patches/2194342/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-tegra/patch/20260208180746.2024338-13-mmaddireddy@nvidia.com/", "project": { "id": 21, "url": "http://patchwork.ozlabs.org/api/projects/21/?format=api", "name": "Linux Tegra Development", "link_name": "linux-tegra", "list_id": "linux-tegra.vger.kernel.org", "list_email": "linux-tegra@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260208180746.2024338-13-mmaddireddy@nvidia.com>", "list_archive_url": null, "date": "2026-02-08T18:07:45", "name": "[V5,12/13] PCI: tegra194: Allow system suspend when the Endpoint link is not up", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "eba1a176d2827fe66d215d97701e1b4c71df3edb", "submitter": { "id": 72399, "url": "http://patchwork.ozlabs.org/api/people/72399/?format=api", "name": "Manikanta Maddireddy", "email": "mmaddireddy@nvidia.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-tegra/patch/20260208180746.2024338-13-mmaddireddy@nvidia.com/mbox/", "series": [ { "id": 491428, "url": "http://patchwork.ozlabs.org/api/series/491428/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-tegra/list/?series=491428", "date": "2026-02-08T18:07:33", "name": "Fixes to pcie-tegra194 driver", "version": 5, "mbox": "http://patchwork.ozlabs.org/series/491428/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2194342/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2194342/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-tegra+bounces-11866-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-tegra@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=Nvidia.com header.i=@Nvidia.com header.a=rsa-sha256\n header.s=selector2 header.b=nKvhsg6c;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.232.135.74; helo=sto.lore.kernel.org;\n envelope-from=linux-tegra+bounces-11866-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)", "smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com\n header.b=\"nKvhsg6c\"", "smtp.subspace.kernel.org;\n arc=fail smtp.client-ip=40.107.209.11", "smtp.subspace.kernel.org;\n dmarc=pass (p=reject dis=none) header.from=nvidia.com", "smtp.subspace.kernel.org;\n spf=fail smtp.mailfrom=nvidia.com" ], "Received": [ "from sto.lore.kernel.org (sto.lore.kernel.org [172.232.135.74])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4f8G8G47xxz1xvc\n\tfor <incoming@patchwork.ozlabs.org>; Mon, 09 Feb 2026 05:10:22 +1100 (AEDT)", "from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sto.lore.kernel.org (Postfix) with ESMTP id 6C93B3014FE0\n\tfor <incoming@patchwork.ozlabs.org>; Sun, 8 Feb 2026 18:09:32 +0000 (UTC)", "from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 199732FABE1;\n\tSun, 8 Feb 2026 18:09:32 +0000 (UTC)", "from PH8PR06CU001.outbound.protection.outlook.com\n (mail-westus3azon11012011.outbound.protection.outlook.com [40.107.209.11])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id AF84F2E9EB5;\n\tSun, 8 Feb 2026 18:09:31 +0000 (UTC)", "from MW4PR03CA0115.namprd03.prod.outlook.com (2603:10b6:303:b7::30)\n by DM4PR12MB8571.namprd12.prod.outlook.com (2603:10b6:8:187::13) with\n Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9587.12; Sun, 8 Feb\n 2026 18:09:26 +0000", "from MWH0EPF000971E6.namprd02.prod.outlook.com\n (2603:10b6:303:b7:cafe::b5) by MW4PR03CA0115.outlook.office365.com\n (2603:10b6:303:b7::30) with Microsoft SMTP Server (version=TLS1_3,\n cipher=TLS_AES_256_GCM_SHA384) id 15.20.9587.17 via Frontend Transport; Sun,\n 8 Feb 2026 18:09:19 +0000", "from mail.nvidia.com (216.228.117.160) by\n MWH0EPF000971E6.mail.protection.outlook.com (10.167.243.74) with Microsoft\n SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n 15.20.9587.10 via Frontend Transport; Sun, 8 Feb 2026 18:09:26 +0000", "from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com\n (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Sun, 8 Feb\n 2026 10:09:18 -0800", "from mmaddireddy-ubuntu.nvidia.com (10.126.231.35) by\n rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server\n (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n 15.2.2562.20; Sun, 8 Feb 2026 10:09:13 -0800" ], "ARC-Seal": [ "i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1770574171; cv=fail;\n b=pigQ9BHMTx0tNcYFpFgqQIqRGGStGh7DarpwEc8qP22Snr5X7aAxBXT7xd1usF/y/2cfci7hCw7YN08RQ1vmpSsRAG6ZJGgIyN536g6LCw5itQMekVINqCiHLvOIG9/RI2aWYww/GsC9/UfjLq20ZAIjo0/TLKwvMQ8S85PsN18=", "i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none;\n b=kf5oapfrKANd3DeHVJ/TTz7a1e7+kj8rNv6mUMjG7fyavZarVOraL+GqBORAIWIqkw+YJD0heRUqTgLtOo3jwHlorLbC94n3XDnHBiz3QxRwCbTWav86L7+aYMpqytATcAoqV8+AOuWfeEwLOKA4VJI+8pCU2BNEflaxzsWcA2nHuVJHe31f5okg9ffRKaD8luE3cbIW1XDUDMnla2u3bTTIQamMfK+DAHO2s36nMwnwb1uKwv9CvaUYdwdlmZLzh5TPIQWIJ/sCHYiIlsFhKoi/riJM1uQo+BO4+p0APxxdZTbRa5UxKT8pyZ/bGT+deVEp1+dSaEt2HMSh0l39gQ==" ], "ARC-Message-Signature": [ "i=2; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1770574171; c=relaxed/simple;\n\tbh=/VMwxrr/4vxu+Igly5Qk6gs3bZCyIyodg/J5MrByDCE=;\n\th=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References:\n\t MIME-Version:Content-Type;\n b=fkxR5trJCB/7qZ34tsIxNK3LovDQsCnDXeqKI+G6jkqvQWsIiZkdTPnmDqX9lmR8g3NSxtOdfh2KlAOeoZEphRRe8dBikl1Jly+BQswjQXj8vzYtcH0tNNsNsKpr6D5GkPt/4nHiC52vv90zVIIymxPWG1GPNX4wSX1sWh4BtvQ=", "i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com;\n s=arcselector10001;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1;\n bh=6JJMngIJwVdGYDqM5dIE/hSkCXE1OHB9i1o/ZCHrgiM=;\n b=dtlmpeJsZSL0+xlb9N6fgscviylWlB2bkSRozMaszqu2FsI/XeiOHskzZn16Xv2bv+dLTzS0N4KCdtYJv5yOFMWHlb4U7uoQ4l1F3dsAFbeOR4e+PD+fdTAIdXgL0SgR0Bgry9Exh7lK2sps6OjUx4Fn6p172w8KYef2OoDBu1JZEvFOrD+bLQ5d0UtS7oFyLOdD+l0PQmNqTibp6T91kNSr2yt9wzQOABnMVA3QYmUkvKwkezTymqIvpk9X8P0AMYAsnKVP4Ct0/d2GQvMBYPtP0SbpDk2JLCOzNNDH4MwrrOAew4XGAhd6vkXi0ydtYbD0Vkpnr8vNAxyp90cj1w==" ], "ARC-Authentication-Results": [ "i=2; smtp.subspace.kernel.org;\n dmarc=pass (p=reject dis=none) header.from=nvidia.com;\n spf=fail smtp.mailfrom=nvidia.com;\n dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com\n header.b=nKvhsg6c; arc=fail smtp.client-ip=40.107.209.11", "i=1; mx.microsoft.com 1; spf=pass (sender ip is\n 216.228.117.160) smtp.rcpttodomain=google.com smtp.mailfrom=nvidia.com;\n dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com;\n dkim=none (message not signed); arc=none (0)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com;\n s=selector2;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=6JJMngIJwVdGYDqM5dIE/hSkCXE1OHB9i1o/ZCHrgiM=;\n b=nKvhsg6cCibKFlM41feP4T5xP7/+7OZGfPZaPBYXE+BBYkHx77po/kAI6wbIMZNcfoV5X9KqPlMNO3NFnhbfjjS43N0UVrMTQwnzAl09UIfKoGchvZPjbvh8VzIFW3F/pGiN4fUa0NuLuGaXMUJCsOgsm+lKTkRrUEREWb3vcLiBMgqJYXgu7NSCIwwVrcFd8obzNAx+vif1WX/12yjwH9WnXVD4OQrrI6l+8ZccAgJ/St78xSEhLVBzyqL2/E8/h57rOT3IMiEBQyxLNFm/DI+Z4zXwGzw5ytmJEkj4P1y6iAsNae7W0Roc/tH9oxykW76cJU3jj+6L0NEjIldY3w==", "X-MS-Exchange-Authentication-Results": "spf=pass (sender IP is 216.228.117.160)\n smtp.mailfrom=nvidia.com; dkim=none (message not signed)\n header.d=none;dmarc=pass action=none header.from=nvidia.com;", "Received-SPF": "Pass (protection.outlook.com: domain of nvidia.com designates\n 216.228.117.160 as permitted sender) receiver=protection.outlook.com;\n client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C", "From": "Manikanta Maddireddy <mmaddireddy@nvidia.com>", "To": "<bhelgaas@google.com>, <lpieralisi@kernel.org>, <kwilczynski@kernel.org>,\n\t<mani@kernel.org>, <robh@kernel.org>, <krzk+dt@kernel.org>,\n\t<conor+dt@kernel.org>, <thierry.reding@gmail.com>, <jonathanh@nvidia.com>,\n\t<jingoohan1@gmail.com>, <vidyas@nvidia.com>, <cassel@kernel.org>,\n\t<18255117159@163.com>", "CC": "<linux-pci@vger.kernel.org>, <devicetree@vger.kernel.org>,\n\t<linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org>, \"Manikanta\n Maddireddy\" <mmaddireddy@nvidia.com>", "Subject": "[V5,12/13] PCI: tegra194: Allow system suspend when the Endpoint link\n is not up", "Date": "Sun, 8 Feb 2026 23:37:45 +0530", "Message-ID": "<20260208180746.2024338-13-mmaddireddy@nvidia.com>", "X-Mailer": "git-send-email 2.34.1", "In-Reply-To": "<20260208180746.2024338-1-mmaddireddy@nvidia.com>", "References": "<20260208180746.2024338-1-mmaddireddy@nvidia.com>", "Precedence": "bulk", "X-Mailing-List": "linux-tegra@vger.kernel.org", "List-Id": "<linux-tegra.vger.kernel.org>", "List-Subscribe": "<mailto:linux-tegra+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-tegra+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "X-NVConfidentiality": "public", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-ClientProxiedBy": "rnnvmail203.nvidia.com (10.129.68.9) To\n rnnvmail201.nvidia.com (10.129.68.8)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "MWH0EPF000971E6:EE_|DM4PR12MB8571:EE_", "X-MS-Office365-Filtering-Correlation-Id": "f6df1f57-bdd2-49b1-6459-08de673d3204", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "\n\tBCL:0;ARA:13230040|36860700013|82310400026|7416014|376014|1800799024|921020;", "X-Microsoft-Antispam-Message-Info": "\n TKmdwq86SbbCS+vF0Nc3gMn5bdp2MSsnszBXjvQQE5CaPKqhHkzTCdO93QwHdV/2A0PQYXgersuSVrAsRpzBMNAMEnepfRKJyCyhEv0h4//Ndk5tE18MdvM3saiNxj4rOkyN/Z9qq5aPGB5vTLbJGpgJocBPFmJqgG0Rmh7pCP500ySWD8Oz5TB8LWiO+/Kikz5Gj8I/Sz9NhkOlwWb6pZ44Sb49wubHgs3TnvO0HoONsa+TN/Zl5xo6Ohztr05T7/E3ZMIf8cN+JiKQovXw+T1ALn0+qABzcnYrDO6mYC+3xYIMjpqvflNDX+hi67urYoHOY8EXcC2nsnI2Ix0Q+vdg8C4gXTcprdkr4sLRLZcFlZCez+b/pDcf5RNe+Xkgtd+BgCL4QIDsjtvMin9pdzvP6r6zxQ7fvuphfBqU9qFMv8Q9ykMcsaqEoffHdydAyR31nQGzJd95yiz7n/DqKxVo0gR5+GZTHKxQrF7IlmpmFgwRpuatOZLXiuUKf6Ka/RqQQ8Pk2NGeCbx+2iFDBhUuOHTSPGHoEeDa0Z/jvlCD2VnbFIe7iT7zYEpc2lOb4gdj62n8cRmOCqgtXtzSc8KlW1d1SbMdTrol6ymHOgfviGRVHn8bOF4CbgkXiO2CILbslJ8vGOo7WrPBtGEbnn788tWGD+I5zIPZL9Ai4z6WYPtkR7c6s9GdMLk15YxBN7wN6pem+h32kHrzLHjH8IorrPNEOyYvDcpCAEjO4TTcYBloEnlncVoxiTuqekiErAmsr/NgkHCEtW8n0Akv+7r2Po8UDj1+L4BwJjXuZzd9cpZEGfaeUbZncc/QPT00qh3KPt4+AMUogClKoVozE4/0lPrXXcKvmfeRwumGr0YBF3ZmmRy/rTTKCiNvlLOetVN8gCcMExdPQ1DDW2JE96vVaiq5ViHAkgYBk8GuzRYS5xxIKtalM/snk/H3IHeF5fCHKAz3Sc1JkE28TW58GfWX9mZkFZlJU3Dl2xT6hvTBzNlQkpnF/WipAyAwWBiAm8KzuhaQrS/yxfzF1qQW1E3llZhsYmfy7R/jLp3HYhKPxL9EOlmRdzRoYvrBQ9AhvGE50l9YUcjl6HNgyJ65vJVKRCtOVcTlAhdDsFPikz72u5v82cGK/+Glc6HPBX6e7S/SIUMiVaRnu+ie304IbpDSc6r1+xhmjo4D1eVAYek+Y9EiTa4b/iC/nzo9oNqAYuMPUAL9ZMv/MTjjSqnWEQeNIeijpYQHhrEuasDv7Nw524b7eBctGLAdnRQ/qSK1vc6ypF5UZchOu/rlzcgod8GQz3xhGlMAsrdyCEnLVfmKejqaiyhnVyfCGRRr8HeAMelsHI2cGgaqFgat+xa8poa55DyPeLVDx8XxALgfaTzXCgIMbnHsvwCUbewzPW9uWC2CtgFmXinxWDjoRh6W9V4aPkuaTvr2DSBhieoG4ydy+lH1O8UAlr/QhgzvytaSDnYglOsEJAQRLEDLER8zYVLykFr0t7KY0HtW7UaPcMAcuxTxok2LQIeYupvAOCAC0E5zrm773+zEcx0ME8VaiyWOSj8DaXAzlAVBPOkQ9MTY9+cepPwRiilv8Kx2+8KkQFdbYnJVBpRlKOQeL600g3CdEB0rt7KRWP6oXYEHLv0g+39cVr+YxiSiRBqQIAo0ZCEleS6UUoAwv/HDnjoPHx9KxxAnCzhxbL0UC0B7bpQ=", "X-Forefront-Antispam-Report": "\n\tCIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(36860700013)(82310400026)(7416014)(376014)(1800799024)(921020);DIR:OUT;SFP:1101;", "X-MS-Exchange-AntiSpam-MessageData-ChunkCount": "1", "X-MS-Exchange-AntiSpam-MessageData-0": "\n\trclBpEogbp6ftQcSVjnimZEQm//eb0vKZ55zdF9urQmTKE8RmZyfIDVTMyFgnTN8Cs3PLP9trckaKbjLQiiwx4SH7q9xZ49DjrMXIGXao7LF0zkXTZl+LZTmfS2xCiLl8OLb60GQVpuBO8t5s7keqiz3cEcIMapRu7bXZ99qVyzgRnOSCJQL3hNB9/4KOoZbTjlP+ReSy9gKmSBA3GBxyaBNv9F4S6t6PhnLrYtrOwzoVtaHWF3QFsD5UXH5xek2saY6Y4UMGlMZfLu6k6jDMoNiRxi+wh1JzbORRRdKe9qh8z1hTpmo2hUUdXow1J2haaO6Y/BIKr52j1KxoK5WA26LAH/89UO+M5vCs7XTybZBc1sy9QlUPf/zTYkP1u/VllibdAUnvHYaxPL11D1LN7d6Ww59x72nHPWTlvm6jr8cGzFhfMfmE7SR4KrNh6dG", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "08 Feb 2026 18:09:26.1625\n (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n f6df1f57-bdd2-49b1-6459-08de673d3204", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n\tMWH0EPF000971E6.namprd02.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DM4PR12MB8571" }, "content": "From: Vidya Sagar <vidyas@nvidia.com>\n\nOnly a Root port initiates the L2 sequence. PCIe link is kept in L2 state\nduring suspend. If Endpoint mode is enabled and the link is up, the\nsoftware cannot proceed with suspend. However, when the PCIe Endpoint\ndriver is probed, but the PCIe link is not up, Tegra can go into suspend\nstate. So, allow system to suspend in this case.\n\nFixes: de2bbf2b71bb (\"PCI: tegra194: Don't allow suspend when Tegra PCIe is in EP mode\")\nSigned-off-by: Vidya Sagar <vidyas@nvidia.com>\nSigned-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>\n---\nV5:\n* None\n\nV4:\n* None\n\nV3:\n* None\n\nV2:\n* None\n\n drivers/pci/controller/dwc/pcie-tegra194.c | 31 +++++++++++++++++-----\n 1 file changed, 25 insertions(+), 6 deletions(-)", "diff": "diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c\nindex ea39e263f4b3..0f669933b108 100644\n--- a/drivers/pci/controller/dwc/pcie-tegra194.c\n+++ b/drivers/pci/controller/dwc/pcie-tegra194.c\n@@ -2274,16 +2274,28 @@ static void tegra_pcie_dw_remove(struct platform_device *pdev)\n \t\tgpiod_set_value(pcie->pex_refclk_sel_gpiod, 0);\n }\n \n-static int tegra_pcie_dw_suspend_late(struct device *dev)\n+static int tegra_pcie_dw_suspend(struct device *dev)\n {\n \tstruct tegra_pcie_dw *pcie = dev_get_drvdata(dev);\n-\tu32 val;\n \n \tif (pcie->of_data->mode == DW_PCIE_EP_TYPE) {\n-\t\tdev_err(dev, \"Failed to Suspend as Tegra PCIe is in EP mode\\n\");\n-\t\treturn -EPERM;\n+\t\tif (pcie->ep_state == EP_STATE_ENABLED) {\n+\t\t\tdev_err(dev, \"Tegra PCIe is in EP mode, suspend not allowed\\n\");\n+\t\t\treturn -EPERM;\n+\t\t}\n+\n+\t\tdisable_irq(pcie->pex_rst_irq);\n+\t\treturn 0;\n \t}\n \n+\treturn 0;\n+}\n+\n+static int tegra_pcie_dw_suspend_late(struct device *dev)\n+{\n+\tstruct tegra_pcie_dw *pcie = dev_get_drvdata(dev);\n+\tu32 val;\n+\n \tif (!pcie->link_state)\n \t\treturn 0;\n \n@@ -2303,6 +2315,9 @@ static int tegra_pcie_dw_suspend_noirq(struct device *dev)\n {\n \tstruct tegra_pcie_dw *pcie = dev_get_drvdata(dev);\n \n+\tif (pcie->of_data->mode == DW_PCIE_EP_TYPE)\n+\t\treturn 0;\n+\n \tif (!pcie->link_state)\n \t\treturn 0;\n \n@@ -2317,6 +2332,9 @@ static int tegra_pcie_dw_resume_noirq(struct device *dev)\n \tstruct tegra_pcie_dw *pcie = dev_get_drvdata(dev);\n \tint ret;\n \n+\tif (pcie->of_data->mode == DW_PCIE_EP_TYPE)\n+\t\treturn 0;\n+\n \tif (!pcie->link_state)\n \t\treturn 0;\n \n@@ -2349,8 +2367,8 @@ static int tegra_pcie_dw_resume_early(struct device *dev)\n \tu32 val;\n \n \tif (pcie->of_data->mode == DW_PCIE_EP_TYPE) {\n-\t\tdev_err(dev, \"Suspend is not supported in EP mode\");\n-\t\treturn -ENOTSUPP;\n+\t\tenable_irq(pcie->pex_rst_irq);\n+\t\treturn 0;\n \t}\n \n \tif (!pcie->link_state)\n@@ -2455,6 +2473,7 @@ static const struct of_device_id tegra_pcie_dw_of_match[] = {\n };\n \n static const struct dev_pm_ops tegra_pcie_dw_pm_ops = {\n+\t.suspend = tegra_pcie_dw_suspend,\n \t.suspend_late = tegra_pcie_dw_suspend_late,\n \t.suspend_noirq = tegra_pcie_dw_suspend_noirq,\n \t.resume_noirq = tegra_pcie_dw_resume_noirq,\n", "prefixes": [ "V5", "12/13" ] }