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GET /api/patches/2194137/?format=api
{ "id": 2194137, "url": "http://patchwork.ozlabs.org/api/patches/2194137/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260206214448.22008-21-philmd@linaro.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260206214448.22008-21-philmd@linaro.org>", "list_archive_url": null, "date": "2026-02-06T21:44:38", "name": "[PULL,20/30] hw/intc/ioapic: Replace legacy st_phys() -> address_space_st()", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "59ea29702092bd43a4655b6d4cff4b947101be47", "submitter": { "id": 85046, "url": "http://patchwork.ozlabs.org/api/people/85046/?format=api", "name": "Philippe Mathieu-Daudé", "email": "philmd@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260206214448.22008-21-philmd@linaro.org/mbox/", "series": [ { "id": 491339, "url": "http://patchwork.ozlabs.org/api/series/491339/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=491339", "date": "2026-02-06T21:44:19", "name": "[PULL,01/30] riscv64/test_boston.py: fix intermitent test timeout", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/491339/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2194137/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2194137/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=S2zdi/54;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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charset=UTF-8", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=2a00:1450:4864:20::433;\n envelope-from=philmd@linaro.org; helo=mail-wr1-x433.google.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "Prefer the address_space_ld/st API over the legacy ld_phys()\nbecause it allow checking for bus access fault. However the\nIOAPIC datasheet (82093AA Order Number: 290566-001) doesn't\nmention any fault occuring when the system bus (ISA bus) is\naccessed. The ISA bus neither offer a way to signal recoverable\naccess faults. Therefore just inline the stl_le_phys() call,\nnot specifying any memory transaction attribute nor expecting\ntransation result, per the definition in\n\"system/memory_ldst_phys_endian.h.inc\":\n\n 42 static inline void ST_PHYS(l)(ARG1_DECL, hwaddr addr, uint32_t val)\n 43 {\n 44 ADDRESS_SPACE_ST(l)(ARG1, addr, val, MEMTXATTRS_UNSPECIFIED, NULL);\n 45 }\n\nNo logical change intended.\n\nSigned-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>\nReviewed-by: Richard Henderson <richard.henderson@linaro.org>\nMessage-Id: <20260204204103.46343-4-philmd@linaro.org>\n---\n hw/intc/ioapic.c | 3 ++-\n 1 file changed, 2 insertions(+), 1 deletion(-)", "diff": "diff --git a/hw/intc/ioapic.c b/hw/intc/ioapic.c\nindex 87ca1af5421..1b3f1e824ac 100644\n--- a/hw/intc/ioapic.c\n+++ b/hw/intc/ioapic.c\n@@ -141,7 +141,8 @@ static void ioapic_service(IOAPICCommonState *s)\n * the IOAPIC message into a MSI one, and its\n * address space will decide whether we need a\n * translation. */\n- stl_le_phys(ioapic_as, info.addr, info.data);\n+ address_space_stl_le(ioapic_as, info.addr, info.data,\n+ MEMTXATTRS_UNSPECIFIED, NULL);\n }\n }\n }\n", "prefixes": [ "PULL", "20/30" ] }