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GET /api/patches/2190690/?format=api
{ "id": 2190690, "url": "http://patchwork.ozlabs.org/api/patches/2190690/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260129-jk-i40e-limit-timestamping-v1-1-0495e6e7d318@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260129-jk-i40e-limit-timestamping-v1-1-0495e6e7d318@intel.com>", "list_archive_url": null, "date": "2026-01-29T21:52:05", "name": "[iwl-next] i40e: only timestamp PTP event packets", "commit_ref": null, "pull_url": null, "state": "under-review", "archived": false, "hash": "d1c5b575356f46d51f9d99db95657242f51813e3", "submitter": { "id": 9784, "url": "http://patchwork.ozlabs.org/api/people/9784/?format=api", "name": "Jacob Keller", "email": "jacob.e.keller@intel.com" }, "delegate": { "id": 109701, "url": "http://patchwork.ozlabs.org/api/users/109701/?format=api", "username": "anguy11", "first_name": "Anthony", "last_name": "Nguyen", "email": "anthony.l.nguyen@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260129-jk-i40e-limit-timestamping-v1-1-0495e6e7d318@intel.com/mbox/", "series": [ { "id": 490304, "url": "http://patchwork.ozlabs.org/api/series/490304/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=490304", "date": "2026-01-29T21:52:05", "name": "[iwl-next] i40e: only timestamp PTP event packets", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/490304/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2190690/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2190690/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@legolas.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=osuosl.org header.i=@osuosl.org header.a=rsa-sha256\n header.s=default header.b=DaPNkjH0;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=osuosl.org\n (client-ip=140.211.166.137; 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a=\"71013286\"", "E=Sophos;i=\"6.21,261,1763452800\"; d=\"scan'208\";a=\"71013286\"", "E=Sophos;i=\"6.21,261,1763452800\"; d=\"scan'208\";a=\"208797888\"" ], "X-ExtLoop1": "1", "From": "Jacob Keller <jacob.e.keller@intel.com>", "Date": "Thu, 29 Jan 2026 13:52:05 -0800", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "7bit", "Message-Id": "<20260129-jk-i40e-limit-timestamping-v1-1-0495e6e7d318@intel.com>", "X-B4-Tracking": "v=1; b=H4sIAAAAAAAC/42NQQ6CMBAAv2L27BqWVkBP/sNwQNzCKi2kbRBD+\n LsNL/A4mWRmhcBeOMD1sILnWYKMLgEdD9D2jesY5ZkY8iw/E5HC1xtFZ4yDWIkYxXKIjZ3EdVj\n pUpvWKMU6gxSYPBtZ9vgd5DOg4yVCnUwvIY7+u19n2v0/g5mQsNCcXypTcvFQN3GRh1M7Wqi3b\n fsBPCfo6c4AAAA=", "X-Change-ID": "20251113-jk-i40e-limit-timestamping-8474fcf33e40", "To": "Intel Wired LAN <intel-wired-lan@lists.osuosl.org>, netdev@vger.kernel.org", "Cc": "przemyslaw.korba@intel.com, Jacob Keller <jacob.e.keller@intel.com>,\n Aleksandr Loktionov <aleksandr.loktionov@intel.com>", "X-Mailer": "b4 0.15-dev-f4b34", "X-Developer-Signature": "v=1; a=openpgp-sha256; l=5306;\n i=jacob.e.keller@intel.com; h=from:subject:message-id;\n bh=mdOjVbsypDRwFTpeTgSO5uLjV0okQUVzWRSA7tx9Iac=;\n b=owGbwMvMwCWWNS3WLp9f4wXjabUkhszqa8tE96gx71XNu1PhvPFZpfN03da7tfV8wbN+zC3Pe\n +TI+E6lo5SFQYyLQVZMkUXBIWTldeMJYVpvnOVg5rAygQxh4OIUgImE6DIy3FfuvdQy86tjbtEP\n qVkNN1iVd+j8mOY3w11C0XjrU2POYwz/1CbcWBx532OTbHsZw6NgtqdKorfuX5Iw3RSvKids9ia\n RCQA=", "X-Developer-Key": "i=jacob.e.keller@intel.com; a=openpgp;\n fpr=204054A9D73390562AEC431E6A965D3E6F0F28E8", "X-Mailman-Original-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1769723565; x=1801259565;\n h=from:date:subject:mime-version:content-transfer-encoding:\n message-id:to:cc;\n bh=mdOjVbsypDRwFTpeTgSO5uLjV0okQUVzWRSA7tx9Iac=;\n b=kPOf0aIcEXjEPPKIh+JPD+cBGpCPNzkfeD6nMoZTFHRyF51hackRLeKL\n EuHL1e2vTJGCfavbyfStY6NQ7p3rT7h5+Oxz6qrelSv0FJaHPWkzA9DbF\n Ixy9EsAvkl+BQUz5j8ToI3OgfzNqwusrtQIjr5b3NjDObbnIneMDiT+et\n D3x83TmW2rXNxI4PlNyQbV84DrbrhbT6W/f2Gr7ivJxTxiomIRelnlFl8\n sta9mqy4Uw7+96spzzBoMdMCKC5ga2weziVwgZklN5Q68LucgX4Td6PxP\n wN4aEahOtZo/4oUFauK00ZXzMQxv7fX2bFF7PgIc3emqhgz05z5F6oaFs\n w==;", "X-Mailman-Original-Authentication-Results": [ "smtp1.osuosl.org;\n dmarc=pass (p=none dis=none)\n header.from=intel.com", "smtp1.osuosl.org;\n dkim=pass (2048-bit key,\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=kPOf0aIc" ], "Subject": "[Intel-wired-lan] [PATCH iwl-next] i40e: only timestamp PTP event\n packets", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.30", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n <intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>,\n <mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>,\n <mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "The i40e_ptp_set_timestamp_mode() function is responsible for configuring\nhardware timestamping. When programming receive timestamping, the logic\nmust determine how to configure the PRTTSYN_CTL1 register for receive\ntimestamping.\n\nThe i40e hardware does not support timestamping all frames. Instead,\ntimestamps are captured into one of the four PRTTSYN_RXTIME registers.\n\nCurrently, the driver configures hardware to timestamp all V2 packets on\nports 319 and 320, including all message types. This timestamps\nsignificantly more packets than is actually requested by the\nHWTSTAMP_FILTER_PTP_V2_EVENT filter type.\n\nThe documentation for HWTSTAMP_FILTER_PTP_V2_EVENT indicates that it should\ntimestamp PTP v2 messages on any layer, including any kind of event\npackets.\n\nTimestamping other packets is acceptable, but not required by the filter.\nDoing so wastes valuable slots in the Rx timestamp registers. For most\napplications this doesn't cause a problem. However, for extremely high\nrates of messages, it becomes possible that one of the critical event\npackets is not timestamped.\n\nThe PTP protocol only requires timestamps for event messages on port 319,\nbut hardware is timestamping on both 319 and 320, and timestamping message\ntypes which do not need a timestamp value.\n\nThe i40e hardware actually has a more strict filtering option. First, only\ntimestamp layer 4 messages on port 319 instead of both 319 and 320. Second,\nnote that hardware has a specific mode to timestamp only event packets\n(those with message type < 8).\n\nUpdate the configuration to use this mode, so that timestamps are captured\nfor only event messages. This replaces the use of the 'wildcard' option of\nthe V2MESSTYPE field which caused timestamping of all message types\nregardless of whether it was an event message.\n\nThis avoids wasting the valuable Rx timestamp register slots on non-event\nframes, and may reduce faults when operating under high event rates.\n\nSigned-off-by: Jacob Keller <jacob.e.keller@intel.com>\nReviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>\n---\n drivers/net/ethernet/intel/i40e/i40e_register.h | 10 ++++++++++\n drivers/net/ethernet/intel/i40e/i40e_ptp.c | 9 +++------\n 2 files changed, 13 insertions(+), 6 deletions(-)\n\n\n---\nbase-commit: 38e28dad667f597c26856f2e0c3e95f70e0ab509\nchange-id: 20251113-jk-i40e-limit-timestamping-8474fcf33e40\n\nBest regards,\n-- \nJacob Keller <jacob.e.keller@intel.com>", "diff": "diff --git a/drivers/net/ethernet/intel/i40e/i40e_register.h b/drivers/net/ethernet/intel/i40e/i40e_register.h\nindex c4051dbcc297..2560c47910d4 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_register.h\n+++ b/drivers/net/ethernet/intel/i40e/i40e_register.h\n@@ -797,8 +797,18 @@\n #define I40E_PRTTSYN_CTL1_V2MESSTYPE0_SHIFT 16\n #define I40E_PRTTSYN_CTL1_V2MESSTYPE0_MASK I40E_MASK(0xF, I40E_PRTTSYN_CTL1_V2MESSTYPE0_SHIFT)\n #define I40E_PRTTSYN_CTL1_TSYNTYPE_SHIFT 24\n+#define I40E_PRTTSYN_CTL1_TSYNTYPE_MASK I40E_MASK(0x3, I40E_PRTTSYN_CTL1_TSYNTYPE_SHIFT)\n+/* Timestamp UDP v1 packets */\n+#define I40E_PRTTSYN_CTL1_TSYNTYPE_V1 \\\n+\tFIELD_PREP(I40E_PRTTSYN_CTL1_TSYNTYPE_MASK, 1)\n+/* Timestamp L2 and UDP v2 packets with message type < 8 */\n+#define I40E_PRTTSYN_CTL1_TSYNTYPE_V2_EVENT \\\n+\tFIELD_PREP(I40E_PRTTSYN_CTL1_TSYNTYPE_MASK, 3)\n #define I40E_PRTTSYN_CTL1_UDP_ENA_SHIFT 26\n #define I40E_PRTTSYN_CTL1_UDP_ENA_MASK I40E_MASK(0x3, I40E_PRTTSYN_CTL1_UDP_ENA_SHIFT)\n+/* Timestamp UDP packets on port 319 */\n+#define I40E_PRTTSYN_CTL1_UDP_ENA_319 \\\n+\tFIELD_PREP(I40E_PRTTSYN_CTL1_UDP_ENA_MASK, 1)\n #define I40E_PRTTSYN_CTL1_TSYNENA_SHIFT 31\n #define I40E_PRTTSYN_CTL1_TSYNENA_MASK I40E_MASK(0x1, I40E_PRTTSYN_CTL1_TSYNENA_SHIFT)\n #define I40E_PRTTSYN_INC_H 0x001E4060 /* Reset: GLOBR */\ndiff --git a/drivers/net/ethernet/intel/i40e/i40e_ptp.c b/drivers/net/ethernet/intel/i40e/i40e_ptp.c\nindex 89abe2f22216..d70adf2e5a1c 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_ptp.c\n+++ b/drivers/net/ethernet/intel/i40e/i40e_ptp.c\n@@ -24,9 +24,6 @@\n #define I40E_PTP_1GB_INCVAL_MULT\t20\n #define I40E_ISGN\t\t\t0x80000000\n \n-#define I40E_PRTTSYN_CTL1_TSYNTYPE_V1 BIT(I40E_PRTTSYN_CTL1_TSYNTYPE_SHIFT)\n-#define I40E_PRTTSYN_CTL1_TSYNTYPE_V2 (2 << \\\n-\t\t\t\t\tI40E_PRTTSYN_CTL1_TSYNTYPE_SHIFT)\n #define I40E_SUBDEV_ID_25G_PTP_PIN\t0xB\n \n enum i40e_ptp_pin {\n@@ -1278,7 +1275,7 @@ static int i40e_ptp_set_timestamp_mode(struct i40e_pf *pf,\n \t\tpf->ptp_rx = true;\n \t\ttsyntype = I40E_PRTTSYN_CTL1_V1MESSTYPE0_MASK |\n \t\t\t I40E_PRTTSYN_CTL1_TSYNTYPE_V1 |\n-\t\t\t I40E_PRTTSYN_CTL1_UDP_ENA_MASK;\n+\t\t\t I40E_PRTTSYN_CTL1_UDP_ENA_319;\n \t\tconfig->rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_EVENT;\n \t\tbreak;\n \tcase HWTSTAMP_FILTER_PTP_V2_EVENT:\n@@ -1295,9 +1292,9 @@ static int i40e_ptp_set_timestamp_mode(struct i40e_pf *pf,\n \tcase HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:\n \t\tpf->ptp_rx = true;\n \t\ttsyntype = I40E_PRTTSYN_CTL1_V2MESSTYPE0_MASK |\n-\t\t\t I40E_PRTTSYN_CTL1_TSYNTYPE_V2;\n+\t\t\t I40E_PRTTSYN_CTL1_TSYNTYPE_V2_EVENT;\n \t\tif (test_bit(I40E_HW_CAP_PTP_L4, pf->hw.caps)) {\n-\t\t\ttsyntype |= I40E_PRTTSYN_CTL1_UDP_ENA_MASK;\n+\t\t\ttsyntype |= I40E_PRTTSYN_CTL1_UDP_ENA_319;\n \t\t\tconfig->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;\n \t\t} else {\n \t\t\tconfig->rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_EVENT;\n", "prefixes": [ "iwl-next" ] }