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{
    "id": 2187673,
    "url": "http://patchwork.ozlabs.org/api/patches/2187673/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260122141652.2444012-1-vivek.behera@siemens.com/",
    "project": {
        "id": 46,
        "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api",
        "name": "Intel Wired Ethernet development",
        "link_name": "intel-wired-lan",
        "list_id": "intel-wired-lan.osuosl.org",
        "list_email": "intel-wired-lan@osuosl.org",
        "web_url": "",
        "scm_url": "",
        "webscm_url": "",
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<20260122141652.2444012-1-vivek.behera@siemens.com>",
    "list_archive_url": null,
    "date": "2026-01-22T14:16:52",
    "name": "[iwl-net,v8] igb: Fix trigger of incorrect irq in igb_xsk_wakeup",
    "commit_ref": null,
    "pull_url": null,
    "state": "under-review",
    "archived": false,
    "hash": "43f1e343aab158149687bf9dc43c9cd2126d45d5",
    "submitter": {
        "id": 92212,
        "url": "http://patchwork.ozlabs.org/api/people/92212/?format=api",
        "name": "Vivek Behera",
        "email": "vivek.behera@siemens.com"
    },
    "delegate": {
        "id": 109701,
        "url": "http://patchwork.ozlabs.org/api/users/109701/?format=api",
        "username": "anguy11",
        "first_name": "Anthony",
        "last_name": "Nguyen",
        "email": "anthony.l.nguyen@intel.com"
    },
    "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260122141652.2444012-1-vivek.behera@siemens.com/mbox/",
    "series": [
        {
            "id": 489388,
            "url": "http://patchwork.ozlabs.org/api/series/489388/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=489388",
            "date": "2026-01-22T14:16:52",
            "name": "[iwl-net,v8] igb: Fix trigger of incorrect irq in igb_xsk_wakeup",
            "version": 8,
            "mbox": "http://patchwork.ozlabs.org/series/489388/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/2187673/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2187673/checks/",
    "tags": {},
    "related": [],
    "headers": {
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        "To": "aleksandr.loktionov@intel.com, jacob.e.keller@intel.com,\n anthony.l.nguyen@intel.com, przemyslaw.kitszel@intel.com,\n maciej.fijalkowski@intel.com, sriram.yagnaraman@ericsson.com,\n kurt@linutronix.de",
        "Cc": "intel-wired-lan@lists.osuosl.org,\n\tvivek.behera@siemens.com",
        "Date": "Thu, 22 Jan 2026 15:16:52 +0100",
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        ],
        "Subject": "[Intel-wired-lan] [PATCH iwl-net v8] igb: Fix trigger of incorrect\n irq in igb_xsk_wakeup",
        "X-BeenThere": "intel-wired-lan@osuosl.org",
        "X-Mailman-Version": "2.1.30",
        "Precedence": "list",
        "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n <intel-wired-lan.osuosl.org>",
        "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>,\n <mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>",
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        "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>,\n <mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>",
        "From": "Vivek Behera via Intel-wired-lan <intel-wired-lan@osuosl.org>",
        "Reply-To": "Vivek Behera <vivek.behera@siemens.com>",
        "Errors-To": "intel-wired-lan-bounces@osuosl.org",
        "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>"
    },
    "content": "The current implementation in the igb_xsk_wakeup expects\nthe Rx and Tx queues to share the same irq. This would lead\nto triggering of incorrect irq in split irq configuration.\nThis patch addresses this issue which could impact environments\nwith 2 active cpu cores\nor when the number of queues is reduced to 2 or less\n\ncat /proc/interrupts | grep eno2\n 167:          0          0          0          0 IR-PCI-MSIX-0000:08:00.0\n 0-edge      eno2\n 168:          0          0          0          0 IR-PCI-MSIX-0000:08:00.0\n 1-edge      eno2-rx-0\n 169:          0          0          0          0 IR-PCI-MSIX-0000:08:00.0\n 2-edge      eno2-rx-1\n 170:          0          0          0          0 IR-PCI-MSIX-0000:08:00.0\n 3-edge      eno2-tx-0\n 171:          0          0          0          0 IR-PCI-MSIX-0000:08:00.0\n 4-edge      eno2-tx-1\n\nFurthermore it uses the flags input argument to trigger either rx, tx or\nboth rx and tx irqs as specified in the ndo_xsk_wakeup api documentation\n\nFixes: 80f6ccf9f116 (\"igb: Introduce XSK data structures and helpers\")\nSigned-off-by: Vivek Behera <vivek.behera@siemens.com>\nReviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>\nSuggested-by: Maciej Fijalkowski <maciej.fijalkowski@intel.com>\nAcked-by: Maciej Fijalkowski <maciej.fijalkowski@intel.com>\n---\nv1: https://lore.kernel.org/intel-wired-lan/20251212131454.124116-1-vivek.behera@siemens.com/\nv2: https://lore.kernel.org/intel-wired-lan/20251215115416.410619-1-vivek.behera@siemens.com/\nv3: https://lore.kernel.org/intel-wired-lan/20251220114936.140473-1-vivek.behera@siemens.com/\nv4: https://lore.kernel.org/intel-wired-lan/20251222115747.230521-1-vivek.behera@siemens.com/\nv5: https://lore.kernel.org/intel-wired-lan/20260112130349.1737901-1-vivek.behera@siemens.com/\nv6: https://lore.kernel.org/intel-wired-lan/20260117145112.2088217-1-vivek.behera@siemens.com/\nv7: https://lore.kernel.org/intel-wired-lan/20260120075053.2260190-1-vivek.behera@siemens.com/\n\nchangelog:\nv1\n- Initial description of the Bug and fixes made in the patch\n\nv1 -> v2\n- Handling of RX and TX Wakeup in igc_xsk_wakeup for a split IRQ configuration\n- Review suggestions by Aleksander: Modified sequence to complete all\n  error checks for rx and tx before updating napi states and triggering irqs\n- Corrected trigger of TX and RX interrupts over E1000_ICS (non msix use case)\n- Added define for Tx interrupt trigger bit mask for E1000_ICS\n\nv2 -> v3\n- Included applicable feedback and suggestions from igc patch\n- Fixed logic in updating eics value when  both TX and RX need wakeup\n\nv3 -> v4\n- Added comments to explain trigerring of both TX and RX with active queue pairs\n- Fixed check of xsk pools in if statement\n\nv4 -> v5\n- Introduced a simplified logic for sequential check for RX and TX\n\nv5 -> v6\n- Further simplifications suggested by Maciej\n- Included review suggestions from reviewers\n\nv6 -> v7\n- Removed redundant braces\n- Updated comment block to improve explanation of implemented logic\n\nv7 -> v8\n- Added acked-by tag\n---\n drivers/net/ethernet/intel/igb/igb_xsk.c | 38 +++++++++++++++++++-----\n 1 file changed, 30 insertions(+), 8 deletions(-)",
    "diff": "diff --git a/drivers/net/ethernet/intel/igb/igb_xsk.c b/drivers/net/ethernet/intel/igb/igb_xsk.c\nindex 30ce5fbb5b77..ce4a7b58cad2 100644\n--- a/drivers/net/ethernet/intel/igb/igb_xsk.c\n+++ b/drivers/net/ethernet/intel/igb/igb_xsk.c\n@@ -524,6 +524,16 @@ bool igb_xmit_zc(struct igb_ring *tx_ring, struct xsk_buff_pool *xsk_pool)\n \treturn nb_pkts < budget;\n }\n \n+static u32 igb_sw_irq_prep(struct igb_q_vector *q_vector)\n+{\n+\tu32 eics = 0;\n+\n+\tif (!napi_if_scheduled_mark_missed(&q_vector->napi))\n+\t\teics = q_vector->eims_value;\n+\n+\treturn eics;\n+}\n+\n int igb_xsk_wakeup(struct net_device *dev, u32 qid, u32 flags)\n {\n \tstruct igb_adapter *adapter = netdev_priv(dev);\n@@ -542,20 +552,32 @@ int igb_xsk_wakeup(struct net_device *dev, u32 qid, u32 flags)\n \n \tring = adapter->tx_ring[qid];\n \n-\tif (test_bit(IGB_RING_FLAG_TX_DISABLED, &ring->flags))\n-\t\treturn -ENETDOWN;\n-\n \tif (!READ_ONCE(ring->xsk_pool))\n \t\treturn -EINVAL;\n \n-\tif (!napi_if_scheduled_mark_missed(&ring->q_vector->napi)) {\n+\tif (flags & XDP_WAKEUP_TX) {\n+\t\tif (test_bit(IGB_RING_FLAG_TX_DISABLED, &ring->flags))\n+\t\t\treturn -ENETDOWN;\n+\n+\t\teics |= igb_sw_irq_prep(ring->q_vector);\n+\t}\n+\n+\tif (flags & XDP_WAKEUP_RX) {\n+\t\t/* If IGB_FLAG_QUEUE_PAIRS is active, the q_vector\n+\t\t * and NAPI is shared between RX and TX.\n+\t\t * If NAPI is already running it would be marked as missed\n+\t\t * from the TX path, making this RX call a NOP\n+\t\t */\n+\t\tring = adapter->rx_ring[qid];\n+\t\teics |= igb_sw_irq_prep(ring->q_vector);\n+\t}\n+\n+\tif (eics) {\n \t\t/* Cause software interrupt */\n-\t\tif (adapter->flags & IGB_FLAG_HAS_MSIX) {\n-\t\t\teics |= ring->q_vector->eims_value;\n+\t\tif (adapter->flags & IGB_FLAG_HAS_MSIX)\n \t\t\twr32(E1000_EICS, eics);\n-\t\t} else {\n+\t\telse\n \t\t\twr32(E1000_ICS, E1000_ICS_RXDMT0);\n-\t\t}\n \t}\n \n \treturn 0;\n",
    "prefixes": [
        "iwl-net",
        "v8"
    ]
}