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GET /api/patches/2148248/?format=api
{ "id": 2148248, "url": "http://patchwork.ozlabs.org/api/patches/2148248/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20251010134424.3835757-8-anshuld@ti.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20251010134424.3835757-8-anshuld@ti.com>", "list_archive_url": null, "date": "2025-10-10T13:44:13", "name": "[v10,07/11] arm: armv8: mmu: add mmu_unmap_reserved_mem", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "bbea5fbe46f9c3a6340567435ac8f9055cd1ff30", "submitter": { "id": 90324, "url": "http://patchwork.ozlabs.org/api/people/90324/?format=api", "name": "Anshul Dalal", "email": "anshuld@ti.com" }, "delegate": { "id": 3651, "url": "http://patchwork.ozlabs.org/api/users/3651/?format=api", "username": "trini", "first_name": "Tom", "last_name": "Rini", "email": "trini@ti.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20251010134424.3835757-8-anshuld@ti.com/mbox/", "series": [ { "id": 477111, "url": "http://patchwork.ozlabs.org/api/series/477111/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=477111", "date": "2025-10-10T13:44:06", "name": "Add support for dynamic MMU configuration", "version": 10, "mbox": "http://patchwork.ozlabs.org/series/477111/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2148248/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2148248/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=ti.com header.i=@ti.com header.a=rsa-sha256\n header.s=ti-com-17Q1 header.b=jJEcTFtS;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=85.214.62.61; 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Fri, 10 Oct 2025 08:44:44 -0500", "from localhost (dhcp-172-24-233-105.dhcp.ti.com [172.24.233.105])\n by lelvem-mr05.itg.ti.com (8.18.1/8.18.1) with ESMTP id 59ADihtc1957494;\n Fri, 10 Oct 2025 08:44:44 -0500" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-2.5 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH,\n DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,\n RCVD_IN_DNSWL_BLOCKED,RCVD_IN_VALIDITY_CERTIFIED_BLOCKED,\n RCVD_IN_VALIDITY_RPBL_BLOCKED,SPF_HELO_PASS,SPF_PASS autolearn=ham\n autolearn_force=no version=3.4.2", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com;\n s=ti-com-17Q1; t=1760103885;\n bh=B8EPJE1O5nvkDkbKRfNbYBkNZY7Yh9kYgzEtfR8yX48=;\n h=From:To:CC:Subject:Date:In-Reply-To:References;\n b=jJEcTFtSkiwIU5/5BWUpQ3ElrZagdqqApTFSI1goeDwKmsLYatFcMPgQwY2YaChZF\n OIHv+26faevwL/+nm2TJQtOmHmTHsK6MDl75uKTbvyNFzhi22Du0/neCJmcjV7TnVb\n cP+ksgozyaltUDTppt9PIlbYVWSKWNM7W9mbXbjk=", "From": "Anshul Dalal <anshuld@ti.com>", "To": "<u-boot@lists.denx.de>", "CC": "Anshul Dalal <anshuld@ti.com>, <d-gole@ti.com>, <b-padhi@ti.com>,\n <vigneshr@ti.com>, <trini@konsulko.com>, <nm@ti.com>,\n <robertcnelson@gmail.com>, <w.egorov@phytec.de>,\n <francesco.dolcini@toradex.com>, <ggiordano@phytec.com>,\n <m-chawdhry@ti.com>, <afd@ti.com>, <bb@ti.com>, <u-kumar1@ti.com>,\n <devarsht@ti.com>, <ilias.apalodimas@linaro.org>, <xypron.glpk@gmx.de>", "Subject": "[PATCH v10 07/11] arm: armv8: mmu: add mmu_unmap_reserved_mem", "Date": "Fri, 10 Oct 2025 19:14:13 +0530", "Message-ID": "<20251010134424.3835757-8-anshuld@ti.com>", "X-Mailer": "git-send-email 2.51.0", "In-Reply-To": "<20251010134424.3835757-1-anshuld@ti.com>", "References": "<20251010134424.3835757-1-anshuld@ti.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-C2ProcessedOrg": "333ef613-75bf-4e12-a4b1-8e3623f5dcea", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.39", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.103.8 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "For armv8, U-Boot uses a static map defined as 'mem_map' for configuring\nthe MMU's page tables, done by mmu_setup.\n\nThough this works well for simpler platforms, it makes creating runtime\ncarveouts by modifying the static array at runtime exceedingly complex\nlike in mach-snapdragon/board.c.\n\nCreation of such carveouts are much better handled by APIs such as\nmmu_change_region_attr once the page tables are configured. Usually such\ncarveouts are configured via the device-tree's reserved-memory node\nwhich provides the address and size for the carveout.\n\nTherefore this patch adds mmu_unmap_reserved_mem which acts as a wrapper\nover mmu_change_region_attr, helping unmap a reserved-memory region.\n\nSigned-off-by: Anshul Dalal <anshuld@ti.com>\nTested-by: Wadim Egorov <w.egorov@phytec.de>\n---\n arch/arm/cpu/armv8/cache_v8.c | 26 ++++++++++++++++++++++++++\n arch/arm/include/asm/armv8/mmu.h | 8 ++++++++\n 2 files changed, 34 insertions(+)", "diff": "diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c\nindex 9b3c37dae82..f2e006a98ab 100644\n--- a/arch/arm/cpu/armv8/cache_v8.c\n+++ b/arch/arm/cpu/armv8/cache_v8.c\n@@ -86,6 +86,32 @@ int mem_map_from_dram_banks(unsigned int index, unsigned int len, u64 attrs)\n \n \treturn 0;\n }\n+\n+int mmu_unmap_reserved_mem(const char *name)\n+{\n+\tvoid *fdt = (void *)gd->fdt_blob;\n+\tchar node_path[128];\n+\tfdt_addr_t addr;\n+\tfdt_size_t size;\n+\tint ret;\n+\n+\tsnprintf(node_path, sizeof(node_path), \"/reserved-memory/%s\", name);\n+\tret = fdt_path_offset(fdt, node_path);\n+\tif (ret < 0)\n+\t\treturn ret;\n+\n+\tif (!fdtdec_get_bool(fdt, ret, \"no-map\"))\n+\t\treturn -EINVAL;\n+\n+\taddr = fdtdec_get_addr_size(fdt, ret, \"reg\", &size);\n+\tif (addr == FDT_ADDR_T_NONE)\n+\t\treturn -1;\n+\n+\tmmu_change_region_attr_nobreak(addr, size, PTE_TYPE_FAULT);\n+\n+\treturn 0;\n+}\n+\n u64 get_tcr(u64 *pips, u64 *pva_bits)\n {\n \tint el = get_effective_el();\ndiff --git a/arch/arm/include/asm/armv8/mmu.h b/arch/arm/include/asm/armv8/mmu.h\nindex 6e7a3366844..ca402c7d74c 100644\n--- a/arch/arm/include/asm/armv8/mmu.h\n+++ b/arch/arm/include/asm/armv8/mmu.h\n@@ -207,6 +207,14 @@ void setup_pgtables(void);\n */\n int mem_map_from_dram_banks(unsigned int index, unsigned int len, u64 attrs);\n \n+/**\n+ * mmu_unmap_reserved_mem() - Unmaps a reserved-memory node as PTE_TYPE_FAULT\n+ * once MMU is configured by mmu_setup.\n+ *\n+ * @name: The name of the node under \"/reserved-memory/\" path\n+ */\n+int mmu_unmap_reserved_mem(const char *name);\n+\n u64 get_tcr(u64 *pips, u64 *pva_bits);\n \n /**\n", "prefixes": [ "v10", "07/11" ] }