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GET /api/patches/2140024/?format=api
{ "id": 2140024, "url": "http://patchwork.ozlabs.org/api/patches/2140024/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20250920161013.31799-2-ansuelsmth@gmail.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20250920161013.31799-2-ansuelsmth@gmail.com>", "list_archive_url": null, "date": "2025-09-20T16:09:41", "name": "[v2,1/5] net: mediatek: mt7531/7988: fix broken PHY turn ON/OFF", "commit_ref": "9b2e1079e7db35155710a401eb52007abe449ad7", "pull_url": null, "state": "accepted", "archived": false, "hash": "790cd8bdcb85518f9fbc1b39feed85a21720a946", "submitter": { "id": 71108, "url": "http://patchwork.ozlabs.org/api/people/71108/?format=api", "name": "Christian Marangi", "email": "ansuelsmth@gmail.com" }, "delegate": { "id": 157425, "url": "http://patchwork.ozlabs.org/api/users/157425/?format=api", "username": "jforissier", "first_name": "Jerome", "last_name": "Forissier", "email": "jerome.forissier@linaro.org" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20250920161013.31799-2-ansuelsmth@gmail.com/mbox/", "series": [ { "id": 474528, "url": "http://patchwork.ozlabs.org/api/series/474528/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=474528", "date": "2025-09-20T16:09:40", "name": "net: mediatek: mt7988: various fixup + MDIO detach", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/474528/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2140024/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2140024/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": 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AGHT+IHx16x+YRbl9P7hqcicwL2xiPmrpFY4LdPvS7CesKR+1rtwSh3KdXXXteD5fgNptvZUkADxyg==", "X-Received": "by 2002:a05:600c:1d1b:b0:45d:98be:ee91 with SMTP id\n 5b1f17b1804b1-467eb8e20damr69355335e9.9.1758384621209;\n Sat, 20 Sep 2025 09:10:21 -0700 (PDT)", "From": "Christian Marangi <ansuelsmth@gmail.com>", "To": "Tom Rini <trini@konsulko.com>, Joe Hershberger <joe.hershberger@ni.com>,\n Ramon Fried <rfried.dev@gmail.com>, Weijie Gao <weijie.gao@mediatek.com>,\n Christian Marangi <ansuelsmth@gmail.com>, u-boot@lists.denx.de", "Subject": "[PATCH v2 1/5] net: mediatek: mt7531/7988: fix broken PHY turn ON/OFF", "Date": "Sat, 20 Sep 2025 18:09:41 +0200", "Message-ID": "<20250920161013.31799-2-ansuelsmth@gmail.com>", "X-Mailer": "git-send-email 2.51.0", "In-Reply-To": "<20250920161013.31799-1-ansuelsmth@gmail.com>", "References": "<20250920161013.31799-1-ansuelsmth@gmail.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.39", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.103.8 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "The PHY for MT7531/MT7988 are never actully turned ON/OFF for the\naffected PHY as we are read/writing to the wrong PHY address.\n\nThis is caused by the fact that we use the MT753X_PHY_ADDR macro 2\ntimes offsetting the address multiple times.\n\nOne in the _setup() function and one in the mt7531_mii_read/write.\n\nDrop the additional usage of MT753X_PHY_ADDR in setup() to correctly\nset the PHY.\n\nSigned-off-by: Christian Marangi <ansuelsmth@gmail.com>\n---\n drivers/net/mtk_eth/mt7531.c | 20 +++++++-------------\n drivers/net/mtk_eth/mt7988.c | 12 +++++-------\n 2 files changed, 12 insertions(+), 20 deletions(-)", "diff": "diff --git a/drivers/net/mtk_eth/mt7531.c b/drivers/net/mtk_eth/mt7531.c\nindex 32d6bebbbdb..965bc3cb7e9 100644\n--- a/drivers/net/mtk_eth/mt7531.c\n+++ b/drivers/net/mtk_eth/mt7531.c\n@@ -22,17 +22,13 @@\n \n static int mt7531_core_reg_read(struct mt753x_switch_priv *priv, u32 reg)\n {\n-\tu8 phy_addr = MT753X_PHY_ADDR(priv->phy_base, 0);\n-\n-\treturn mt7531_mmd_read(priv, phy_addr, 0x1f, reg);\n+\treturn mt7531_mmd_read(priv, 0, 0x1f, reg);\n }\n \n static void mt7531_core_reg_write(struct mt753x_switch_priv *priv, u32 reg,\n \t\t\t\t u32 val)\n {\n-\tu8 phy_addr = MT753X_PHY_ADDR(priv->phy_base, 0);\n-\n-\tmt7531_mmd_write(priv, phy_addr, 0x1f, reg, val);\n+\tmt7531_mmd_write(priv, 0, 0x1f, reg, val);\n }\n \n static void mt7531_core_pll_setup(struct mt753x_switch_priv *priv)\n@@ -171,7 +167,7 @@ static int mt7531_setup(struct mtk_eth_switch_priv *swpriv)\n {\n \tstruct mt753x_switch_priv *priv = (struct mt753x_switch_priv *)swpriv;\n \tu32 i, val, pmcr, port5_sgmii;\n-\tu16 phy_addr, phy_val;\n+\tu16 phy_val;\n \n \tpriv->smi_addr = MT753X_DFL_SMI_ADDR;\n \tpriv->phy_base = (priv->smi_addr + 1) & MT753X_SMI_ADDR_MASK;\n@@ -180,10 +176,9 @@ static int mt7531_setup(struct mtk_eth_switch_priv *swpriv)\n \n \t/* Turn off PHYs */\n \tfor (i = 0; i < MT753X_NUM_PHYS; i++) {\n-\t\tphy_addr = MT753X_PHY_ADDR(priv->phy_base, i);\n-\t\tphy_val = mt7531_mii_read(priv, phy_addr, MII_BMCR);\n+\t\tphy_val = mt7531_mii_read(priv, i, MII_BMCR);\n \t\tphy_val |= BMCR_PDOWN;\n-\t\tmt7531_mii_write(priv, phy_addr, MII_BMCR, phy_val);\n+\t\tmt7531_mii_write(priv, i, MII_BMCR, phy_val);\n \t}\n \n \t/* Force MAC link down before reset */\n@@ -239,10 +234,9 @@ static int mt7531_setup(struct mtk_eth_switch_priv *swpriv)\n \n \t/* Turn on PHYs */\n \tfor (i = 0; i < MT753X_NUM_PHYS; i++) {\n-\t\tphy_addr = MT753X_PHY_ADDR(priv->phy_base, i);\n-\t\tphy_val = mt7531_mii_read(priv, phy_addr, MII_BMCR);\n+\t\tphy_val = mt7531_mii_read(priv, i, MII_BMCR);\n \t\tphy_val &= ~BMCR_PDOWN;\n-\t\tmt7531_mii_write(priv, phy_addr, MII_BMCR, phy_val);\n+\t\tmt7531_mii_write(priv, i, MII_BMCR, phy_val);\n \t}\n \n \tmt7531_phy_setting(priv);\ndiff --git a/drivers/net/mtk_eth/mt7988.c b/drivers/net/mtk_eth/mt7988.c\nindex a416d87840c..87b6ed30cd0 100644\n--- a/drivers/net/mtk_eth/mt7988.c\n+++ b/drivers/net/mtk_eth/mt7988.c\n@@ -61,7 +61,7 @@ static void mt7988_mac_control(struct mtk_eth_switch_priv *swpriv, bool enable)\n static int mt7988_setup(struct mtk_eth_switch_priv *swpriv)\n {\n \tstruct mt753x_switch_priv *priv = (struct mt753x_switch_priv *)swpriv;\n-\tu16 phy_addr, phy_val;\n+\tu16 phy_val;\n \tu32 pmcr;\n \tint i;\n \n@@ -72,10 +72,9 @@ static int mt7988_setup(struct mtk_eth_switch_priv *swpriv)\n \n \t/* Turn off PHYs */\n \tfor (i = 0; i < MT753X_NUM_PHYS; i++) {\n-\t\tphy_addr = MT753X_PHY_ADDR(priv->phy_base, i);\n-\t\tphy_val = mt7531_mii_read(priv, phy_addr, MII_BMCR);\n+\t\tphy_val = mt7531_mii_read(priv, i, MII_BMCR);\n \t\tphy_val |= BMCR_PDOWN;\n-\t\tmt7531_mii_write(priv, phy_addr, MII_BMCR, phy_val);\n+\t\tmt7531_mii_write(priv, i, MII_BMCR, phy_val);\n \t}\n \n \tswitch (priv->epriv.phy_interface) {\n@@ -128,10 +127,9 @@ static int mt7988_setup(struct mtk_eth_switch_priv *swpriv)\n \n \t/* Turn on PHYs */\n \tfor (i = 0; i < MT753X_NUM_PHYS; i++) {\n-\t\tphy_addr = MT753X_PHY_ADDR(priv->phy_base, i);\n-\t\tphy_val = mt7531_mii_read(priv, phy_addr, MII_BMCR);\n+\t\tphy_val = mt7531_mii_read(priv, i, MII_BMCR);\n \t\tphy_val &= ~BMCR_PDOWN;\n-\t\tmt7531_mii_write(priv, phy_addr, MII_BMCR, phy_val);\n+\t\tmt7531_mii_write(priv, i, MII_BMCR, phy_val);\n \t}\n \n \tmt7988_phy_setting(priv);\n", "prefixes": [ "v2", "1/5" ] }