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GET /api/patches/211/?format=api
{ "id": 211, "url": "http://patchwork.ozlabs.org/api/patches/211/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/1220900995-11928-3-git-send-email-becky.bruce@freescale.com/", "project": { "id": 2, "url": "http://patchwork.ozlabs.org/api/projects/2/?format=api", "name": "Linux PPC development", "link_name": "linuxppc-dev", "list_id": "linuxppc-dev.lists.ozlabs.org", "list_email": "linuxppc-dev@lists.ozlabs.org", "web_url": "https://github.com/linuxppc/wiki/wiki", "scm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git", "webscm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/", "list_archive_url_format": "https://lore.kernel.org/linuxppc-dev/{}/", "commit_url_format": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}" }, "msgid": "<1220900995-11928-3-git-send-email-becky.bruce@freescale.com>", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/1220900995-11928-3-git-send-email-becky.bruce@freescale.com/", "date": "2008-09-08T19:09:53", "name": "POWERPC: Move iommu dma ops from dma.c to dma-iommu.c", "commit_ref": "8dd0e95206f7c33bed2aed33ac668335174684e8", "pull_url": null, "state": "accepted", "archived": true, "hash": "c052c80bcadba51d1ad8c863b80c5dd5f689f833", "submitter": { "id": 12, "url": "http://patchwork.ozlabs.org/api/people/12/?format=api", "name": "Becky Bruce", "email": "becky.bruce@freescale.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/1220900995-11928-3-git-send-email-becky.bruce@freescale.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/211/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/211/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linuxppc-dev-bounces+patchwork=ozlabs.org@ozlabs.org>", "X-Original-To": [ "patchwork@ozlabs.org", "linuxppc-dev@ozlabs.org" ], "Delivered-To": [ "patchwork@ozlabs.org", "linuxppc-dev@ozlabs.org" ], "Received": [ "from ozlabs.org (localhost [127.0.0.1])\n\tby ozlabs.org (Postfix) with ESMTP id 74EBEDE2F3\n\tfor <patchwork@ozlabs.org>; Tue, 9 Sep 2008 05:11:00 +1000 (EST)", "from de01egw02.freescale.net (de01egw02.freescale.net\n\t[192.88.165.103])\n\t(using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits))\n\t(Client CN \"de01egw02.freescale.net\",\n\tIssuer \"Thawte Premium Server CA\" (verified OK))\n\tby ozlabs.org (Postfix) with ESMTPS id 3A14EDDDD4\n\tfor <linuxppc-dev@ozlabs.org>; Tue, 9 Sep 2008 05:10:04 +1000 (EST)", "from de01smr01.freescale.net (de01smr01.freescale.net\n\t[10.208.0.31])\n\tby de01egw02.freescale.net (8.12.11/de01egw02) with ESMTP id\n\tm88J9vYo010692\n\tfor <linuxppc-dev@ozlabs.org>; Mon, 8 Sep 2008 12:09:57 -0700 (MST)", "from blarg.am.freescale.net (blarg.am.freescale.net [10.82.19.176])\n\tby de01smr01.freescale.net (8.13.1/8.13.0) with ESMTP id\n\tm88J9u2t009900\n\tfor <linuxppc-dev@ozlabs.org>; Mon, 8 Sep 2008 14:09:57 -0500 (CDT)", "from blarg.am.freescale.net (localhost.localdomain [127.0.0.1])\n\tby blarg.am.freescale.net (8.14.2/8.14.2) with ESMTP id\n\tm88J9u5e012235; Mon, 8 Sep 2008 14:09:56 -0500", "(from bgill@localhost)\n\tby blarg.am.freescale.net (8.14.2/8.14.2/Submit) id m88J9uWx012234;\n\tMon, 8 Sep 2008 14:09:56 -0500" ], "From": "Becky Bruce <becky.bruce@freescale.com>", "To": "linuxppc-dev@ozlabs.org", "Subject": "[PATCH 2/4] POWERPC: Move iommu dma ops from dma.c to dma-iommu.c", "Date": "Mon, 8 Sep 2008 14:09:53 -0500", "Message-Id": "<1220900995-11928-3-git-send-email-becky.bruce@freescale.com>", "X-Mailer": "git-send-email 1.5.5.1", "In-Reply-To": "<1220900995-11928-2-git-send-email-becky.bruce@freescale.com>", "References": "<1220900995-11928-1-git-send-email-becky.bruce@freescale.com>\n\t<1220900995-11928-2-git-send-email-becky.bruce@freescale.com>", "X-BeenThere": "linuxppc-dev@ozlabs.org", "X-Mailman-Version": "2.1.11", "Precedence": "list", "List-Id": "Linux on PowerPC Developers Mail List <linuxppc-dev.ozlabs.org>", "List-Unsubscribe": "<https://ozlabs.org/mailman/options/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@ozlabs.org?subject=unsubscribe>", "List-Archive": "<http://ozlabs.org/pipermail/linuxppc-dev>", "List-Post": "<mailto:linuxppc-dev@ozlabs.org>", "List-Help": "<mailto:linuxppc-dev-request@ozlabs.org?subject=help>", "List-Subscribe": "<https://ozlabs.org/mailman/listinfo/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@ozlabs.org?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Sender": "linuxppc-dev-bounces+patchwork=ozlabs.org@ozlabs.org", "Errors-To": "linuxppc-dev-bounces+patchwork=ozlabs.org@ozlabs.org" }, "content": "32-bit platforms are about to start using dma.c; move the iommu\ndma ops into their own file to make this a bit cleaner.\n\nSigned-off-by: Becky Bruce <becky.bruce@freescale.com>", "diff": "diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile\nindex a8a6724..45570fe 100644\n--- a/arch/powerpc/kernel/Makefile\n+++ b/arch/powerpc/kernel/Makefile\n@@ -71,7 +71,7 @@ obj-y\t\t\t\t+= time.o prom.o traps.o setup-common.o \\\n \t\t\t\t udbg.o misc.o io.o \\\n \t\t\t\t misc_$(CONFIG_WORD_SIZE).o\n obj-$(CONFIG_PPC32)\t\t+= entry_32.o setup_32.o\n-obj-$(CONFIG_PPC64)\t\t+= dma.o iommu.o\n+obj-$(CONFIG_PPC64)\t\t+= dma.o dma-iommu.o iommu.o\n obj-$(CONFIG_KGDB)\t\t+= kgdb.o\n obj-$(CONFIG_PPC_MULTIPLATFORM)\t+= prom_init.o\n obj-$(CONFIG_MODULES)\t\t+= ppc_ksyms.o\ndiff --git a/arch/powerpc/kernel/dma-iommu.c b/arch/powerpc/kernel/dma-iommu.c\nnew file mode 100644\nindex 0000000..01091f1\n--- /dev/null\n+++ b/arch/powerpc/kernel/dma-iommu.c\n@@ -0,0 +1,103 @@\n+/*\n+ * Copyright (C) 2006 Benjamin Herrenschmidt, IBM Corporation\n+ *\n+ * Provide default implementations of the DMA mapping callbacks for\n+ * busses using the iommu infrastructure\n+ */\n+\n+#include <asm/iommu.h>\n+\n+/*\n+ * Generic iommu implementation\n+ */\n+\n+/* Allocates a contiguous real buffer and creates mappings over it.\n+ * Returns the virtual address of the buffer and sets dma_handle\n+ * to the dma address (mapping) of the first page.\n+ */\n+static void *dma_iommu_alloc_coherent(struct device *dev, size_t size,\n+\t\t\t\t dma_addr_t *dma_handle, gfp_t flag)\n+{\n+\treturn iommu_alloc_coherent(dev, dev->archdata.dma_data, size,\n+\t\t\t\t dma_handle, device_to_mask(dev), flag,\n+\t\t\t\t dev->archdata.numa_node);\n+}\n+\n+static void dma_iommu_free_coherent(struct device *dev, size_t size,\n+\t\t\t\t void *vaddr, dma_addr_t dma_handle)\n+{\n+\tiommu_free_coherent(dev->archdata.dma_data, size, vaddr, dma_handle);\n+}\n+\n+/* Creates TCEs for a user provided buffer. The user buffer must be\n+ * contiguous real kernel storage (not vmalloc). The address of the buffer\n+ * passed here is the kernel (virtual) address of the buffer. The buffer\n+ * need not be page aligned, the dma_addr_t returned will point to the same\n+ * byte within the page as vaddr.\n+ */\n+static dma_addr_t dma_iommu_map_single(struct device *dev, void *vaddr,\n+\t\t\t\t size_t size,\n+\t\t\t\t enum dma_data_direction direction,\n+\t\t\t\t struct dma_attrs *attrs)\n+{\n+\treturn iommu_map_single(dev, dev->archdata.dma_data, vaddr, size,\n+\t\t\t\tdevice_to_mask(dev), direction, attrs);\n+}\n+\n+\n+static void dma_iommu_unmap_single(struct device *dev, dma_addr_t dma_handle,\n+\t\t\t\t size_t size,\n+\t\t\t\t enum dma_data_direction direction,\n+\t\t\t\t struct dma_attrs *attrs)\n+{\n+\tiommu_unmap_single(dev->archdata.dma_data, dma_handle, size, direction,\n+\t\t\t attrs);\n+}\n+\n+\n+static int dma_iommu_map_sg(struct device *dev, struct scatterlist *sglist,\n+\t\t\t int nelems, enum dma_data_direction direction,\n+\t\t\t struct dma_attrs *attrs)\n+{\n+\treturn iommu_map_sg(dev, dev->archdata.dma_data, sglist, nelems,\n+\t\t\t device_to_mask(dev), direction, attrs);\n+}\n+\n+static void dma_iommu_unmap_sg(struct device *dev, struct scatterlist *sglist,\n+\t\tint nelems, enum dma_data_direction direction,\n+\t\tstruct dma_attrs *attrs)\n+{\n+\tiommu_unmap_sg(dev->archdata.dma_data, sglist, nelems, direction,\n+\t\t attrs);\n+}\n+\n+/* We support DMA to/from any memory page via the iommu */\n+static int dma_iommu_dma_supported(struct device *dev, u64 mask)\n+{\n+\tstruct iommu_table *tbl = dev->archdata.dma_data;\n+\n+\tif (!tbl || tbl->it_offset > mask) {\n+\t\tprintk(KERN_INFO\n+\t\t \"Warning: IOMMU offset too big for device mask\\n\");\n+\t\tif (tbl)\n+\t\t\tprintk(KERN_INFO\n+\t\t\t \"mask: 0x%08lx, table offset: 0x%08lx\\n\",\n+\t\t\t\tmask, tbl->it_offset);\n+\t\telse\n+\t\t\tprintk(KERN_INFO \"mask: 0x%08lx, table unavailable\\n\",\n+\t\t\t\tmask);\n+\t\treturn 0;\n+\t} else\n+\t\treturn 1;\n+}\n+\n+struct dma_mapping_ops dma_iommu_ops = {\n+\t.alloc_coherent\t= dma_iommu_alloc_coherent,\n+\t.free_coherent\t= dma_iommu_free_coherent,\n+\t.map_single\t= dma_iommu_map_single,\n+\t.unmap_single\t= dma_iommu_unmap_single,\n+\t.map_sg\t\t= dma_iommu_map_sg,\n+\t.unmap_sg\t= dma_iommu_unmap_sg,\n+\t.dma_supported\t= dma_iommu_dma_supported,\n+};\n+EXPORT_SYMBOL(dma_iommu_ops);\ndiff --git a/arch/powerpc/kernel/dma.c b/arch/powerpc/kernel/dma.c\nindex ae5708e..44e3486 100644\n--- a/arch/powerpc/kernel/dma.c\n+++ b/arch/powerpc/kernel/dma.c\n@@ -2,111 +2,15 @@\n * Copyright (C) 2006 Benjamin Herrenschmidt, IBM Corporation\n *\n * Provide default implementations of the DMA mapping callbacks for\n- * directly mapped busses and busses using the iommu infrastructure\n+ * directly mapped busses.\n */\n \n #include <linux/device.h>\n #include <linux/dma-mapping.h>\n #include <asm/bug.h>\n-#include <asm/iommu.h>\n #include <asm/abs_addr.h>\n \n /*\n- * Generic iommu implementation\n- */\n-\n-/* Allocates a contiguous real buffer and creates mappings over it.\n- * Returns the virtual address of the buffer and sets dma_handle\n- * to the dma address (mapping) of the first page.\n- */\n-static void *dma_iommu_alloc_coherent(struct device *dev, size_t size,\n-\t\t\t\t dma_addr_t *dma_handle, gfp_t flag)\n-{\n-\treturn iommu_alloc_coherent(dev, dev->archdata.dma_data, size,\n-\t\t\t\t dma_handle, device_to_mask(dev), flag,\n-\t\t\t\t dev->archdata.numa_node);\n-}\n-\n-static void dma_iommu_free_coherent(struct device *dev, size_t size,\n-\t\t\t\t void *vaddr, dma_addr_t dma_handle)\n-{\n-\tiommu_free_coherent(dev->archdata.dma_data, size, vaddr, dma_handle);\n-}\n-\n-/* Creates TCEs for a user provided buffer. The user buffer must be\n- * contiguous real kernel storage (not vmalloc). The address of the buffer\n- * passed here is the kernel (virtual) address of the buffer. The buffer\n- * need not be page aligned, the dma_addr_t returned will point to the same\n- * byte within the page as vaddr.\n- */\n-static dma_addr_t dma_iommu_map_single(struct device *dev, void *vaddr,\n-\t\t\t\t size_t size,\n-\t\t\t\t enum dma_data_direction direction,\n-\t\t\t\t struct dma_attrs *attrs)\n-{\n-\treturn iommu_map_single(dev, dev->archdata.dma_data, vaddr, size,\n-\t\t\t\tdevice_to_mask(dev), direction, attrs);\n-}\n-\n-\n-static void dma_iommu_unmap_single(struct device *dev, dma_addr_t dma_handle,\n-\t\t\t\t size_t size,\n-\t\t\t\t enum dma_data_direction direction,\n-\t\t\t\t struct dma_attrs *attrs)\n-{\n-\tiommu_unmap_single(dev->archdata.dma_data, dma_handle, size, direction,\n-\t\t\t attrs);\n-}\n-\n-\n-static int dma_iommu_map_sg(struct device *dev, struct scatterlist *sglist,\n-\t\t\t int nelems, enum dma_data_direction direction,\n-\t\t\t struct dma_attrs *attrs)\n-{\n-\treturn iommu_map_sg(dev, dev->archdata.dma_data, sglist, nelems,\n-\t\t\t device_to_mask(dev), direction, attrs);\n-}\n-\n-static void dma_iommu_unmap_sg(struct device *dev, struct scatterlist *sglist,\n-\t\tint nelems, enum dma_data_direction direction,\n-\t\tstruct dma_attrs *attrs)\n-{\n-\tiommu_unmap_sg(dev->archdata.dma_data, sglist, nelems, direction,\n-\t\t attrs);\n-}\n-\n-/* We support DMA to/from any memory page via the iommu */\n-static int dma_iommu_dma_supported(struct device *dev, u64 mask)\n-{\n-\tstruct iommu_table *tbl = dev->archdata.dma_data;\n-\n-\tif (!tbl || tbl->it_offset > mask) {\n-\t\tprintk(KERN_INFO\n-\t\t \"Warning: IOMMU offset too big for device mask\\n\");\n-\t\tif (tbl)\n-\t\t\tprintk(KERN_INFO\n-\t\t\t \"mask: 0x%08lx, table offset: 0x%08lx\\n\",\n-\t\t\t\tmask, tbl->it_offset);\n-\t\telse\n-\t\t\tprintk(KERN_INFO \"mask: 0x%08lx, table unavailable\\n\",\n-\t\t\t\tmask);\n-\t\treturn 0;\n-\t} else\n-\t\treturn 1;\n-}\n-\n-struct dma_mapping_ops dma_iommu_ops = {\n-\t.alloc_coherent\t= dma_iommu_alloc_coherent,\n-\t.free_coherent\t= dma_iommu_free_coherent,\n-\t.map_single\t= dma_iommu_map_single,\n-\t.unmap_single\t= dma_iommu_unmap_single,\n-\t.map_sg\t\t= dma_iommu_map_sg,\n-\t.unmap_sg\t= dma_iommu_unmap_sg,\n-\t.dma_supported\t= dma_iommu_dma_supported,\n-};\n-EXPORT_SYMBOL(dma_iommu_ops);\n-\n-/*\n * Generic direct DMA implementation\n *\n * This implementation supports a per-device offset that can be applied if\n", "prefixes": [] }