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GET /api/patches/2070372/?format=api
{ "id": 2070372, "url": "http://patchwork.ozlabs.org/api/patches/2070372/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20250409024343.2960757-2-maobibo@loongson.cn/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20250409024343.2960757-2-maobibo@loongson.cn>", "list_archive_url": null, "date": "2025-04-09T02:43:43", "name": "[v3,16/16] hw/intc/loongarch_pch: Merge three memory region into one", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "784277ae8a9700796c679cd0185d9de9bcd6cd26", "submitter": { "id": 78914, "url": "http://patchwork.ozlabs.org/api/people/78914/?format=api", "name": "Bibo Mao", "email": "maobibo@loongson.cn" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20250409024343.2960757-2-maobibo@loongson.cn/mbox/", "series": [ { "id": 451861, "url": "http://patchwork.ozlabs.org/api/series/451861/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=451861", "date": "2025-04-09T02:37:00", "name": "hw/intc/loongarch_pch: Cleanup with memory region ops", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/451861/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2070372/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2070372/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)", "Received": [ "from lists.gnu.org (lists.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4ZXS2D418Kz1yHl\n\tfor <incoming@patchwork.ozlabs.org>; Wed, 9 Apr 2025 12:44:04 +1000 (AEST)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1u2LPq-0007Js-Qx; Tue, 08 Apr 2025 22:43:50 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <maobibo@loongson.cn>)\n id 1u2LPp-0007JY-Rj\n for qemu-devel@nongnu.org; Tue, 08 Apr 2025 22:43:49 -0400", "from mail.loongson.cn ([114.242.206.163])\n by eggs.gnu.org with esmtp (Exim 4.90_1)\n (envelope-from <maobibo@loongson.cn>) id 1u2LPn-0000IE-M6\n for qemu-devel@nongnu.org; Tue, 08 Apr 2025 22:43:49 -0400", "from loongson.cn (unknown [10.2.10.34])\n by gateway (Coremail) with SMTP id _____8DxvnPg3vVn1rC1AA--.7744S3;\n Wed, 09 Apr 2025 10:43:44 +0800 (CST)", "from localhost.localdomain (unknown [10.2.10.34])\n by front1 (Coremail) with SMTP id qMiowMDxu8Tf3vVn1sZ1AA--.22064S3;\n Wed, 09 Apr 2025 10:43:44 +0800 (CST)" ], "From": "Bibo Mao <maobibo@loongson.cn>", "To": "Song Gao <gaosong@loongson.cn>", "Cc": "Jiaxun Yang <jiaxun.yang@flygoat.com>,\n\tqemu-devel@nongnu.org", "Subject": "[PATCH v3 16/16] hw/intc/loongarch_pch: Merge three memory region\n into one", "Date": "Wed, 9 Apr 2025 10:43:43 +0800", "Message-Id": "<20250409024343.2960757-2-maobibo@loongson.cn>", "X-Mailer": "git-send-email 2.39.3", "In-Reply-To": "<20250409024343.2960757-1-maobibo@loongson.cn>", "References": "<20250409023711.2960618-1-maobibo@loongson.cn>\n <20250409024343.2960757-1-maobibo@loongson.cn>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-CM-TRANSID": "qMiowMDxu8Tf3vVn1sZ1AA--.22064S3", "X-CM-SenderInfo": "xpdruxter6z05rqj20fqof0/", "X-Coremail-Antispam": "1Uk129KBj93XoWxWF1UtrWrWFy7uw4rtrWkGrX_yoWrtr43pr\n ZxZrn3KF4kJFnrXryvy343XF1kGwn2934293ZIkryIkrnrAr15ZF1kJ34qqFyjk3yDWr1q\n qF4rGa4Yqa1UJagCm3ZEXasCq-sJn29KB7ZKAUJUUUU8529EdanIXcx71UUUUU7KY7ZEXa\n sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU\n 0xBIdaVrnRJUUUk0b4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2\n IYs7xG6rWj6s0DM7CIcVAFz4kK6r106r15M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v\n e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Ar0_tr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI\n 0_Cr0_Gr1UM28EF7xvwVC2z280aVAFwI0_GcCE3s1l84ACjcxK6I8E87Iv6xkF7I0E14v2\n 6rxl6s0DM2AIxVAIcxkEcVAq07x20xvEncxIr21l57IF6xkI12xvs2x26I8E6xACxx1l5I\n 8CrVACY4xI64kE6c02F40Ex7xfMcIj6xIIjxv20xvE14v26rWY6Fy7McIj6I8E87Iv67AK\n xVW8JVWxJwAm72CE4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IYc2Ij64vIr41l42xK82IYc2Ij64\n vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s026x8G\n jcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r1Y6r17MIIYrxkI7VAKI48JMIIF0xvE2I\n x0cI8IcVAFwI0_Xr0_Ar1lIxAIcVC0I7IYx2IY6xkF7I0E14v26r4j6F4UMIIF0xvE42xK\n 8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVW8JVWxJwCI42IY6I8E87Iv6xkF7I\n 0E14v26r4j6r4UJbIYCTnIWIevJa73UjIFyTuYvjxUsdb1UUUUU", "Received-SPF": "pass client-ip=114.242.206.163;\n envelope-from=maobibo@loongson.cn;\n helo=mail.loongson.cn", "X-Spam_score_int": "-18", "X-Spam_score": "-1.9", "X-Spam_bar": "-", "X-Spam_report": "(-1.9 / 5.0 requ) BAYES_00=-1.9,\n RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001,\n RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001,\n SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "Since memory region iomem supports memory access size with 1/2/4/8,\nit can be used for memory region iomem8 and iomem32_high. Now remove\nmemory region iomem8 and iomem32_high, merge them into iomem together.\n\nSigned-off-by: Bibo Mao <maobibo@loongson.cn>\n---\n hw/intc/loongarch_pch_pic.c | 66 +-------------------------\n hw/loongarch/virt.c | 6 ---\n include/hw/intc/loongarch_pic_common.h | 2 -\n 3 files changed, 1 insertion(+), 73 deletions(-)", "diff": "diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c\nindex 903dd4abd7..be248dda48 100644\n--- a/hw/intc/loongarch_pch_pic.c\n+++ b/hw/intc/loongarch_pch_pic.c\n@@ -230,34 +230,6 @@ static void loongarch_pch_pic_write(void *opaque, hwaddr addr,\n }\n }\n \n-static uint64_t loongarch_pch_pic_high_readw(void *opaque, hwaddr addr,\n- unsigned size)\n-{\n- addr += PCH_PIC_INT_STATUS;\n- return loongarch_pch_pic_read(opaque, addr, size);\n-}\n-\n-static void loongarch_pch_pic_high_writew(void *opaque, hwaddr addr,\n- uint64_t value, unsigned size)\n-{\n- addr += PCH_PIC_INT_STATUS;\n- loongarch_pch_pic_write(opaque, addr, value, size);\n-}\n-\n-static uint64_t loongarch_pch_pic_readb(void *opaque, hwaddr addr,\n- unsigned size)\n-{\n- addr += PCH_PIC_ROUTE_ENTRY;\n- return loongarch_pch_pic_read(opaque, addr, size);\n-}\n-\n-static void loongarch_pch_pic_writeb(void *opaque, hwaddr addr,\n- uint64_t data, unsigned size)\n-{\n- addr += PCH_PIC_ROUTE_ENTRY;\n- loongarch_pch_pic_write(opaque, addr, data, size);\n-}\n-\n static const MemoryRegionOps loongarch_pch_pic_ops = {\n .read = loongarch_pch_pic_read,\n .write = loongarch_pch_pic_write,\n@@ -279,34 +251,6 @@ static const MemoryRegionOps loongarch_pch_pic_ops = {\n .endianness = DEVICE_LITTLE_ENDIAN,\n };\n \n-static const MemoryRegionOps loongarch_pch_pic_reg32_high_ops = {\n- .read = loongarch_pch_pic_high_readw,\n- .write = loongarch_pch_pic_high_writew,\n- .valid = {\n- .min_access_size = 4,\n- .max_access_size = 8,\n- },\n- .impl = {\n- .min_access_size = 4,\n- .max_access_size = 4,\n- },\n- .endianness = DEVICE_LITTLE_ENDIAN,\n-};\n-\n-static const MemoryRegionOps loongarch_pch_pic_reg8_ops = {\n- .read = loongarch_pch_pic_readb,\n- .write = loongarch_pch_pic_writeb,\n- .valid = {\n- .min_access_size = 1,\n- .max_access_size = 1,\n- },\n- .impl = {\n- .min_access_size = 1,\n- .max_access_size = 1,\n- },\n- .endianness = DEVICE_LITTLE_ENDIAN,\n-};\n-\n static void loongarch_pch_pic_reset(DeviceState *d)\n {\n LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(d);\n@@ -358,16 +302,8 @@ static void loongarch_pic_realize(DeviceState *dev, Error **errp)\n qdev_init_gpio_in(dev, pch_pic_irq_handler, s->irq_num);\n memory_region_init_io(&s->iomem, OBJECT(dev),\n &loongarch_pch_pic_ops,\n- s, TYPE_LOONGARCH_PIC, 0x100);\n- memory_region_init_io(&s->iomem8, OBJECT(dev), &loongarch_pch_pic_reg8_ops,\n- s, PCH_PIC_NAME(.reg8), 0x2a0);\n- memory_region_init_io(&s->iomem32_high, OBJECT(dev),\n- &loongarch_pch_pic_reg32_high_ops,\n- s, PCH_PIC_NAME(.reg32_part2), 0xc60);\n+ s, TYPE_LOONGARCH_PIC, VIRT_PCH_REG_SIZE);\n sysbus_init_mmio(sbd, &s->iomem);\n- sysbus_init_mmio(sbd, &s->iomem8);\n- sysbus_init_mmio(sbd, &s->iomem32_high);\n-\n }\n \n static void loongarch_pic_class_init(ObjectClass *klass, void *data)\ndiff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c\nindex 1f1cca667e..8988d557bc 100644\n--- a/hw/loongarch/virt.c\n+++ b/hw/loongarch/virt.c\n@@ -428,12 +428,6 @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)\n sysbus_realize_and_unref(d, &error_fatal);\n memory_region_add_subregion(get_system_memory(), VIRT_IOAPIC_REG_BASE,\n sysbus_mmio_get_region(d, 0));\n- memory_region_add_subregion(get_system_memory(),\n- VIRT_IOAPIC_REG_BASE + PCH_PIC_ROUTE_ENTRY,\n- sysbus_mmio_get_region(d, 1));\n- memory_region_add_subregion(get_system_memory(),\n- VIRT_IOAPIC_REG_BASE + PCH_PIC_INT_STATUS,\n- sysbus_mmio_get_region(d, 2));\n \n /* Connect pch_pic irqs to extioi */\n for (i = 0; i < num; i++) {\ndiff --git a/include/hw/intc/loongarch_pic_common.h b/include/hw/intc/loongarch_pic_common.h\nindex ab8ffff780..892c1828b1 100644\n--- a/include/hw/intc/loongarch_pic_common.h\n+++ b/include/hw/intc/loongarch_pic_common.h\n@@ -66,8 +66,6 @@ struct LoongArchPICCommonState {\n uint8_t htmsi_vector[64]; /* 0x200 - 0x238 */\n \n MemoryRegion iomem;\n- MemoryRegion iomem32_high;\n- MemoryRegion iomem8;\n unsigned int irq_num;\n };\n \n", "prefixes": [ "v3", "16/16" ] }