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GET /api/patches/200764/?format=api
{ "id": 200764, "url": "http://patchwork.ozlabs.org/api/patches/200764/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-imx/patch/1353505652-28200-1-git-send-email-s.hauer@pengutronix.de/", "project": { "id": 19, "url": "http://patchwork.ozlabs.org/api/projects/19/?format=api", "name": "Linux IMX development", "link_name": "linux-imx", "list_id": "linux-imx-kernel.lists.patchwork.ozlabs.org", "list_email": "linux-imx-kernel@lists.patchwork.ozlabs.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1353505652-28200-1-git-send-email-s.hauer@pengutronix.de>", "list_archive_url": null, "date": "2012-11-21T13:47:32", "name": "ARM i.MX6: Fix ethernet PLL clocks", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "36b038433e61dc450a8ec1d5924c3b46ebe32f5d", "submitter": { "id": 61, "url": "http://patchwork.ozlabs.org/api/people/61/?format=api", "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-imx/patch/1353505652-28200-1-git-send-email-s.hauer@pengutronix.de/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/200764/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/200764/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org>", "X-Original-To": "incoming-imx@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming-imx@bilbo.ozlabs.org", "Received": [ "from merlin.infradead.org (merlin.infradead.org\n\t[IPv6:2001:4978:20e::2])\n\t(using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits))\n\t(Client did not present a certificate)\n\tby ozlabs.org (Postfix) with ESMTPS id 2E45E2C008F\n\tfor <incoming-imx@patchwork.ozlabs.org>;\n\tThu, 22 Nov 2012 00:50:57 +1100 (EST)", "from localhost ([::1] helo=merlin.infradead.org)\n\tby merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux))\n\tid 1TbAeY-0006gP-Vl; Wed, 21 Nov 2012 13:47:47 +0000", "from metis.ext.pengutronix.de\n\t([2001:6f8:1178:4:290:27ff:fe1d:cc33])\n\tby merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux))\n\tid 1TbAeT-0006g4-Sq for linux-arm-kernel@lists.infradead.org;\n\tWed, 21 Nov 2012 13:47:43 +0000", "from dude.hi.pengutronix.de ([2001:6f8:1178:2:21e:67ff:fe11:9c5c])\n\tby metis.ext.pengutronix.de with esmtp (Exim 4.72)\n\t(envelope-from <sha@pengutronix.de>)\n\tid 1TbAeP-0005LE-3y; Wed, 21 Nov 2012 14:47:37 +0100", "from sha by dude.hi.pengutronix.de with local (Exim 4.80)\n\t(envelope-from <sha@pengutronix.de>)\n\tid 1TbAeO-0007LQ-Lz; Wed, 21 Nov 2012 14:47:36 +0100" ], "From": "Sascha Hauer <s.hauer@pengutronix.de>", "To": "<linux-arm-kernel@lists.infradead.org>", "Subject": "[PATCH] ARM i.MX6: Fix ethernet PLL clocks", "Date": "Wed, 21 Nov 2012 14:47:32 +0100", "Message-Id": "<1353505652-28200-1-git-send-email-s.hauer@pengutronix.de>", "X-Mailer": "git-send-email 1.7.10.4", "MIME-Version": "1.0", "X-SA-Exim-Connect-IP": "2001:6f8:1178:2:21e:67ff:fe11:9c5c", "X-SA-Exim-Mail-From": "sha@pengutronix.de", "X-SA-Exim-Scanned": "No (on metis.ext.pengutronix.de);\n\tSAEximRunCond expanded to false", "X-PTX-Original-Recipient": "linux-arm-kernel@lists.infradead.org", "X-CRM114-Version": "20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ", "X-CRM114-CacheID": "sfid-20121121_084742_440477_470718E4 ", "X-CRM114-Status": "GOOD ( 21.40 )", "X-Spam-Score": "-2.6 (--)", "X-Spam-Report": "SpamAssassin version 3.3.2 on merlin.infradead.org summary:\n\tContent analysis details: (-2.6 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.7 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]", "Cc": "Sascha Hauer <s.hauer@pengutronix.de>, Shawn Guo <shawn.guo@linaro.org>", "X-BeenThere": "linux-arm-kernel@lists.infradead.org", "X-Mailman-Version": "2.1.14", "Precedence": "list", "List-Unsubscribe": "<http://lists.infradead.org/mailman/options/linux-arm-kernel>,\n\t<mailto:linux-arm-kernel-request@lists.infradead.org?subject=unsubscribe>", "List-Archive": "<http://lists.infradead.org/pipermail/linux-arm-kernel/>", "List-Post": "<mailto:linux-arm-kernel@lists.infradead.org>", "List-Help": "<mailto:linux-arm-kernel-request@lists.infradead.org?subject=help>", "List-Subscribe": "<http://lists.infradead.org/mailman/listinfo/linux-arm-kernel>,\n\t<mailto:linux-arm-kernel-request@lists.infradead.org?subject=subscribe>", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Sender": "linux-arm-kernel-bounces@lists.infradead.org", "Errors-To": "linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org", "List-Id": "linux-imx-kernel.lists.patchwork.ozlabs.org" }, "content": "In current code the ethernet PLL (according to code pll8, according to datasheet\npll6) is not handled correctly. The PLL runs at 500MHz and has different outputs.\nOnly the enet reference clock is implemented. This patch changes the PLL so that\nit outputs 500MHz and adds the additional outputs as dividers. This now matches\nthe datasheet which says:\n\n> This PLL synthesizes a low jitter clock from 24 MHz reference clock.\n> The PLL outputs a 500 MHz clock. The reference clocks generated by this PLL are:\n> • Ref_PCIe = 125 MHz\n> • Ref_SATA = 100 MHz\n> • Ref_ethernet, which is configurable based on the PLL_ENET[1:0] register field.\n\nSigned-off-by: Sascha Hauer <s.hauer@pengutronix.de>\n---\n .../devicetree/bindings/clock/imx6q-clock.txt | 5 ++\n arch/arm/mach-imx/clk-imx6q.c | 18 +++++-\n arch/arm/mach-imx/clk-pllv3.c | 59 +-------------------\n 3 files changed, 24 insertions(+), 58 deletions(-)", "diff": "diff --git a/Documentation/devicetree/bindings/clock/imx6q-clock.txt b/Documentation/devicetree/bindings/clock/imx6q-clock.txt\nindex 492bd99..94311e2 100644\n--- a/Documentation/devicetree/bindings/clock/imx6q-clock.txt\n+++ b/Documentation/devicetree/bindings/clock/imx6q-clock.txt\n@@ -198,6 +198,11 @@ clocks and IDs.\n \tusbphy2\t\t\t183\n \tldb_di0_div_3_5\t\t184\n \tldb_di1_div_3_5\t\t185\n+\tsata_ref\t\t186\n+\tsata_ref_100m\t\t187\n+\tpcie_ref\t\t188\n+\tpcie_ref_125m\t\t189\n+\tenet_ref\t\t190\n \n Examples:\n \ndiff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c\nindex 3ec242f..95f8ea5 100644\n--- a/arch/arm/mach-imx/clk-imx6q.c\n+++ b/arch/arm/mach-imx/clk-imx6q.c\n@@ -153,7 +153,7 @@ enum mx6q_clks {\n \tusdhc4, vdo_axi, vpu_axi, cko1, pll1_sys, pll2_bus, pll3_usb_otg,\n \tpll4_audio, pll5_video, pll6_mlb, pll7_usb_host, pll8_enet, ssi1_ipg,\n \tssi2_ipg, ssi3_ipg, rom, usbphy1, usbphy2, ldb_di0_div_3_5, ldb_di1_div_3_5,\n-\tclk_max\n+\tsata_ref, sata_ref_100m, pcie_ref, pcie_ref_125m, enet_ref, clk_max\n };\n \n static struct clk *clk[clk_max];\n@@ -163,6 +163,13 @@ static enum mx6q_clks const clks_init_on[] __initconst = {\n \tmmdc_ch0_axi, rom,\n };\n \n+static struct clk_div_table clk_enet_ref_table[] = {\n+\t{ .val = 0, .div = 20, },\n+\t{ .val = 1, .div = 10, },\n+\t{ .val = 2, .div = 5, },\n+\t{ .val = 3, .div = 4, },\n+};\n+\n int __init mx6q_clocks_init(void)\n {\n \tstruct device_node *np;\n@@ -202,6 +209,15 @@ int __init mx6q_clocks_init(void)\n \tclk[usbphy1] = imx_clk_gate(\"usbphy1\", \"pll3_usb_otg\", base + 0x10, 6);\n \tclk[usbphy2] = imx_clk_gate(\"usbphy2\", \"pll7_usb_host\", base + 0x20, 6);\n \n+\tclk[sata_ref] = imx_clk_gate(\"sata_ref\", \"pll8_enet\", base + 0x20, 20);\n+\tclk[pcie_ref] = imx_clk_gate(\"pcie_ref\", \"pll8_enet\", base + 0x20, 19);\n+\tclk[sata_ref_100m] = imx_clk_fixed_factor(\"sata_ref_100m\", \"sata_ref\", 1, 5);\n+\tclk[pcie_ref_125m] = imx_clk_fixed_factor(\"pcie_ref_100m\", \"pcie_ref\", 1, 4);\n+\n+\tclk[enet_ref] = clk_register_divider_table(NULL, \"enet_ref\", \"pll8_enet\", 0,\n+\t\t\tbase + 0x20, 0, 2, 0, clk_enet_ref_table,\n+\t\t\t&imx_ccm_lock);\n+\n \t/* name parent_name reg idx */\n \tclk[pll2_pfd0_352m] = imx_clk_pfd(\"pll2_pfd0_352m\", \"pll2_bus\", base + 0x100, 0);\n \tclk[pll2_pfd1_594m] = imx_clk_pfd(\"pll2_pfd1_594m\", \"pll2_bus\", base + 0x100, 1);\ndiff --git a/arch/arm/mach-imx/clk-pllv3.c b/arch/arm/mach-imx/clk-pllv3.c\nindex 36aac94..f5e210a 100644\n--- a/arch/arm/mach-imx/clk-pllv3.c\n+++ b/arch/arm/mach-imx/clk-pllv3.c\n@@ -287,66 +287,13 @@ static const struct clk_ops clk_pllv3_av_ops = {\n static unsigned long clk_pllv3_enet_recalc_rate(struct clk_hw *hw,\n \t\t\t\t\t\tunsigned long parent_rate)\n {\n-\tstruct clk_pllv3 *pll = to_clk_pllv3(hw);\n-\tu32 div = readl_relaxed(pll->base) & pll->div_mask;\n-\n-\tswitch (div) {\n-\tcase 0:\n-\t\treturn 25000000;\n-\tcase 1:\n-\t\treturn 50000000;\n-\tcase 2:\n-\t\treturn 100000000;\n-\tcase 3:\n-\t\treturn 125000000;\n-\t}\n-\n-\treturn 0;\n+\treturn 500000000;\n }\n \n static long clk_pllv3_enet_round_rate(struct clk_hw *hw, unsigned long rate,\n \t\t\t\t unsigned long *prate)\n {\n-\tif (rate >= 125000000)\n-\t\trate = 125000000;\n-\telse if (rate >= 100000000)\n-\t\trate = 100000000;\n-\telse if (rate >= 50000000)\n-\t\trate = 50000000;\n-\telse\n-\t\trate = 25000000;\n-\treturn rate;\n-}\n-\n-static int clk_pllv3_enet_set_rate(struct clk_hw *hw, unsigned long rate,\n-\t\tunsigned long parent_rate)\n-{\n-\tstruct clk_pllv3 *pll = to_clk_pllv3(hw);\n-\tu32 val, div;\n-\n-\tswitch (rate) {\n-\tcase 25000000:\n-\t\tdiv = 0;\n-\t\tbreak;\n-\tcase 50000000:\n-\t\tdiv = 1;\n-\t\tbreak;\n-\tcase 100000000:\n-\t\tdiv = 2;\n-\t\tbreak;\n-\tcase 125000000:\n-\t\tdiv = 3;\n-\t\tbreak;\n-\tdefault:\n-\t\treturn -EINVAL;\n-\t}\n-\n-\tval = readl_relaxed(pll->base);\n-\tval &= ~pll->div_mask;\n-\tval |= div;\n-\twritel_relaxed(val, pll->base);\n-\n-\treturn 0;\n+\treturn 500000000;\n }\n \n static const struct clk_ops clk_pllv3_enet_ops = {\n@@ -355,8 +302,6 @@ static const struct clk_ops clk_pllv3_enet_ops = {\n \t.enable\t\t= clk_pllv3_enable,\n \t.disable\t= clk_pllv3_disable,\n \t.recalc_rate\t= clk_pllv3_enet_recalc_rate,\n-\t.round_rate\t= clk_pllv3_enet_round_rate,\n-\t.set_rate\t= clk_pllv3_enet_set_rate,\n };\n \n static const struct clk_ops clk_pllv3_mlb_ops = {\n", "prefixes": [] }