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GET /api/patches/1941034/?format=api
{ "id": 1941034, "url": "http://patchwork.ozlabs.org/api/patches/1941034/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/2a51197270763e51ee17a26be927f091ef01db5e.1716965617.git.ysato@users.sourceforge.jp/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<2a51197270763e51ee17a26be927f091ef01db5e.1716965617.git.ysato@users.sourceforge.jp>", "list_archive_url": null, "date": "2024-05-29T08:01:14", "name": "[DO,NOT,MERGE,v8,28/36] sh: SH7751R SoC Internal peripheral definition dtsi.", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "a8707871caa804ae73fa4cc7d01977d35a23cc48", "submitter": { "id": 7114, "url": "http://patchwork.ozlabs.org/api/people/7114/?format=api", "name": "Yoshinori Sato", "email": "ysato@users.sourceforge.jp" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/2a51197270763e51ee17a26be927f091ef01db5e.1716965617.git.ysato@users.sourceforge.jp/mbox/", "series": [ { "id": 408652, "url": "http://patchwork.ozlabs.org/api/series/408652/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=408652", "date": "2024-05-29T08:00:51", "name": "Device Tree support for SH7751 based board", "version": 8, "mbox": "http://patchwork.ozlabs.org/series/408652/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1941034/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1941034/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-pci+bounces-7982-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2604:1380:45e3:2400::1; helo=sv.mirrors.kernel.org;\n envelope-from=linux-pci+bounces-7982-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)", "smtp.subspace.kernel.org;\n arc=none smtp.client-ip=153.127.30.23", "smtp.subspace.kernel.org;\n dmarc=none (p=none dis=none) header.from=users.sourceforge.jp", "smtp.subspace.kernel.org;\n spf=fail smtp.mailfrom=users.sourceforge.jp" ], "Received": [ "from sv.mirrors.kernel.org (sv.mirrors.kernel.org\n [IPv6:2604:1380:45e3:2400::1])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange X25519 server-signature ECDSA (secp384r1))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4Vq28y3Ssgz20Pr\n\tfor <incoming@patchwork.ozlabs.org>; Wed, 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s=arc-20240116;\n\tt=1716969742; cv=none;\n b=J2ZWz4f4BciHm2x1rbpgDTvd36ipb4ghh6cNtlPs655cRsHOOtjRzl/B+djIvVVEAg7JZirbhw/q+C4ePd6Fs0p7QNtfEtQkapKSpj6l5mAfadOiETNPMWoHK5JZ1vSAY1dolreU1FMOzes8HFCTrrWv/GXUMxIgSNKdqAJGHa8=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1716969742; c=relaxed/simple;\n\tbh=PJg4Z83CmeMDocZYEZNk/vAESEkh9fTfxnSUiOQ3tlw=;\n\th=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References:\n\t MIME-Version;\n b=YJDNErdg5nx7tpM1IiGyMRKCeGH5zyU6GbxY6uN8Jv7AaIY33mS8GRc0rED2RNzICUNKONGMIptW1kTycXUpsk9VL04kcfCtHvYntlhYMCgGiWRl20yHGhtVaA0EXaLZDxKCpQctpskIoMNGTe327+ovA/QCrJgvvijzrLwGblU=", "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dmarc=none (p=none dis=none) header.from=users.sourceforge.jp;\n spf=fail smtp.mailfrom=users.sourceforge.jp;\n arc=none smtp.client-ip=153.127.30.23", "From": "Yoshinori Sato <ysato@users.sourceforge.jp>", "To": "linux-sh@vger.kernel.org", "Cc": "Yoshinori Sato <ysato@users.sourceforge.jp>,\n Damien Le Moal <dlemoal@kernel.org>, Niklas Cassel <cassel@kernel.org>,\n Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>,\n Conor Dooley <conor+dt@kernel.org>,\n Geert Uytterhoeven <geert+renesas@glider.be>,\n Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>,\n David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>,\n Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,\n Maxime Ripard <mripard@kernel.org>, Thomas Zimmermann <tzimmermann@suse.de>,\n Thomas Gleixner <tglx@linutronix.de>, Bjorn Helgaas <bhelgaas@google.com>,\n Lorenzo Pieralisi <lpieralisi@kernel.org>, =?utf-8?q?Krzysztof_Wilczy=C5=84?=\n\t=?utf-8?q?ski?= <kw@linux.com>,\n Greg Kroah-Hartman <gregkh@linuxfoundation.org>,\n Jiri Slaby <jirislaby@kernel.org>, Magnus Damm <magnus.damm@gmail.com>,\n Daniel Lezcano <daniel.lezcano@linaro.org>, Rich Felker <dalias@libc.org>,\n John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>,\n Lee Jones <lee@kernel.org>, Helge Deller <deller@gmx.de>,\n Heiko Stuebner <heiko.stuebner@cherry.de>,\n Neil Armstrong <neil.armstrong@linaro.org>,\n Chris Morgan <macromorgan@hotmail.com>, Sebastian Reichel <sre@kernel.org>,\n Linus Walleij <linus.walleij@linaro.org>, Arnd Bergmann <arnd@arndb.de>,\n Masahiro Yamada <masahiroy@kernel.org>, Baoquan He <bhe@redhat.com>,\n Andrew Morton <akpm@linux-foundation.org>,\n Guenter Roeck <linux@roeck-us.net>, Kefeng Wang <wangkefeng.wang@huawei.com>,\n Stephen Rothwell <sfr@canb.auug.org.au>,\n Azeem Shaikh <azeemshaikh38@gmail.com>, Guo Ren <guoren@kernel.org>,\n Max Filippov <jcmvbkbc@gmail.com>, Jernej Skrabec <jernej.skrabec@gmail.com>,\n Herve Codina <herve.codina@bootlin.com>,\n Andy Shevchenko <andriy.shevchenko@linux.intel.com>,\n Anup Patel <apatel@ventanamicro.com>, Jacky Huang <ychuang3@nuvoton.com>,\n Hugo Villeneuve <hvilleneuve@dimonoff.com>, Jonathan Corbet <corbet@lwn.net>,\n Wolfram Sang <wsa+renesas@sang-engineering.com>, =?utf-8?q?Uwe_Kleine-K?=\n\t=?utf-8?q?=C3=B6nig?= <u.kleine-koenig@pengutronix.de>,\n Christophe JAILLET <christophe.jaillet@wanadoo.fr>,\n Sam Ravnborg <sam@ravnborg.org>,\n Javier Martinez Canillas <javierm@redhat.com>,\n Sergey Shtylyov <s.shtylyov@omp.ru>,\n Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>,\n linux-ide@vger.kernel.org, devicetree@vger.kernel.org,\n linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org,\n linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org,\n linux-pci@vger.kernel.org, linux-serial@vger.kernel.org,\n linux-fbdev@vger.kernel.org", "Subject": "[DO NOT MERGE v8 28/36] sh: SH7751R SoC Internal peripheral\n definition dtsi.", "Date": "Wed, 29 May 2024 17:01:14 +0900", "Message-Id": "\n <2a51197270763e51ee17a26be927f091ef01db5e.1716965617.git.ysato@users.sourceforge.jp>", "X-Mailer": "git-send-email 2.39.2", "In-Reply-To": "<cover.1716965617.git.ysato@users.sourceforge.jp>", "References": "<cover.1716965617.git.ysato@users.sourceforge.jp>", "Precedence": "bulk", "X-Mailing-List": "linux-pci@vger.kernel.org", "List-Id": "<linux-pci.vger.kernel.org>", "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit" }, "content": "SH7751R internal peripherals device tree.\n\nSigned-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>\n---\n arch/sh/boot/dts/sh7751r.dtsi | 105 ++++++++++++++++++++++++++++++++++\n 1 file changed, 105 insertions(+)\n create mode 100644 arch/sh/boot/dts/sh7751r.dtsi", "diff": "diff --git a/arch/sh/boot/dts/sh7751r.dtsi b/arch/sh/boot/dts/sh7751r.dtsi\nnew file mode 100644\nindex 000000000000..61b2af5bebde\n--- /dev/null\n+++ b/arch/sh/boot/dts/sh7751r.dtsi\n@@ -0,0 +1,105 @@\n+// SPDX-License-Identifier: GPL-2.0\n+/*\n+ * Device Tree Source for the SH7751R SoC\n+ */\n+\n+#include <dt-bindings/interrupt-controller/irq.h>\n+#include <dt-bindings/clock/sh7750-cpg.h>\n+\n+/ {\n+\t#address-cells = <1>;\n+\t#size-cells = <1>;\n+\n+\tcpus {\n+\t\t#address-cells = <1>;\n+\t\t#size-cells = <0>;\n+\n+\t\tcpu@0 {\n+\t\t\tcompatible = \"renesas,sh4\", \"renesas,sh2\";\n+\t\t\tdevice_type = \"cpu\";\n+\t\t\treg = <0>;\n+\t\t\tclocks = <&cpg SH7750_CPG_ICK>;\n+\t\t\tclock-names = \"ick\";\n+\t\t\ticache-size = <16384>;\n+\t\t\ticache-line-size = <32>;\n+\t\t\tdcache-size = <32768>;\n+\t\t\tdcache-line-size = <32>;\n+\t\t};\n+\t};\n+\n+\textal: oscillator {\n+\t\t#clock-cells = <0>;\n+\t\tcompatible = \"fixed-clock\";\n+\t\tclock-frequency = <0>;\n+\t\tclock-output-names = \"extal\";\n+\t};\n+\n+\tsoc {\n+\t\tcompatible = \"simple-bus\";\n+\t\tinterrupt-parent = <&shintc>;\n+\t\t#address-cells = <1>;\n+\t\t#size-cells = <1>;\n+\t\tranges;\n+\n+\t\tcpg: clock-controller@ffc00000 {\n+\t\t\t#clock-cells = <1>;\n+\t\t\t#power-domain-cells = <0>;\n+\t\t\tcompatible = \"renesas,sh7751r-cpg\";\n+\t\t\tclocks = <&extal>;\n+\t\t\tclock-names = \"extal\";\n+\t\t\treg = <0xffc00000 20>, <0xfe0a0000 16>;\n+\t\t\treg-names = \"FRQCR\", \"CLKSTP00\";\n+\t\t\trenesas,mode = <0>;\n+\t\t};\n+\n+\t\tshintc: interrupt-controller@ffd00000 {\n+\t\t\tcompatible = \"renesas,sh7751-intc\";\n+\t\t\t#interrupt-cells = <1>;\n+\t\t\tinterrupt-controller;\n+\t\t\treg = <0xffd00000 20>, <0xfe080000 128>;\n+\t\t\treg-names = \"ICR\", \"INTPRI00\";\n+\t\t};\n+\n+\t\t/* sci0 is rarely used, so it is not defined here. */\n+\t\tscif1: serial@ffe80000 {\n+\t\t\tcompatible = \"renesas,scif-sh7751\", \"renesas,scif\";\n+\t\t\treg = <0xffe80000 0x100>;\n+\t\t\tinterrupts = <0x700>,\n+\t\t\t\t <0x720>,\n+\t\t\t\t <0x760>,\n+\t\t\t\t <0x740>;\n+\t\t\tinterrupt-names = \"eri\", \"rxi\", \"txi\", \"bri\";\n+\t\t\tclocks = <&cpg SH7750_MSTP_SCIF>;\n+\t\t\tclock-names = \"fck\";\n+\t\t\tpower-domains = <&cpg>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\t/* Normally ch0 and ch1 are used, so we will define ch0 to ch2 here. */\n+\t\ttmu0: timer@ffd80000 {\n+\t\t\tcompatible = \"renesas,tmu-sh7750\", \"renesas,tmu\";\n+\t\t\treg = <0xffd80000 12>;\n+\t\t\tinterrupts = <0x400>,\n+\t\t\t\t <0x420>,\n+\t\t\t\t <0x440>,\n+\t\t\t\t <0x460>;\n+\t\t\tinterrupt-names = \"tuni0\", \"tuni1\", \"tuni2\", \"ticpi2\";\n+\t\t\tclocks = <&cpg SH7750_MSTP_TMU012>;\n+\t\t\tclock-names = \"fck\";\n+\t\t\tpower-domains = <&cpg>;\n+\t\t\t#renesas,channels = <3>;\n+\t\t};\n+\n+\t\tpcic: pci@fe200000 {\n+\t\t\tcompatible = \"renesas,sh7751-pci\";\n+\t\t\t#address-cells = <3>;\n+\t\t\t#size-cells = <2>;\n+\t\t\t#interrupt-cells = <1>;\n+\t\t\tdevice_type = \"pci\";\n+\t\t\tbus-range = <0 0>;\n+\t\t\treg = <0xfe200000 0x0400>,\n+\t\t\t <0xff800000 0x0100>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\t};\n+};\n", "prefixes": [ "DO", "NOT", "MERGE", "v8", "28/36" ] }