Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/1940995/?format=api
{ "id": 1940995, "url": "http://patchwork.ozlabs.org/api/patches/1940995/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/b1fc49269919c7d6c2e5c607ae29d1a6f2ab40d2.1716965617.git.ysato@users.sourceforge.jp/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<b1fc49269919c7d6c2e5c607ae29d1a6f2ab40d2.1716965617.git.ysato@users.sourceforge.jp>", "list_archive_url": null, "date": "2024-05-29T08:00:59", "name": "[DO,NOT,MERGE,v8,13/36] dt-bindings: clock: sh7750-cpg: Add renesas,sh7750-cpg header.", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "bb702fdb633c4598b675c9b9d9926683a1c3d122", "submitter": { "id": 7114, "url": "http://patchwork.ozlabs.org/api/people/7114/?format=api", "name": "Yoshinori Sato", "email": "ysato@users.sourceforge.jp" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/b1fc49269919c7d6c2e5c607ae29d1a6f2ab40d2.1716965617.git.ysato@users.sourceforge.jp/mbox/", "series": [ { "id": 408652, "url": "http://patchwork.ozlabs.org/api/series/408652/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=408652", "date": "2024-05-29T08:00:51", "name": "Device Tree support for SH7751 based board", "version": 8, "mbox": "http://patchwork.ozlabs.org/series/408652/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1940995/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1940995/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-pci+bounces-7967-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2604:1380:40f1:3f00::1; helo=sy.mirrors.kernel.org;\n envelope-from=linux-pci+bounces-7967-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)", "smtp.subspace.kernel.org;\n arc=none smtp.client-ip=153.127.30.23", "smtp.subspace.kernel.org;\n dmarc=none (p=none dis=none) header.from=users.sourceforge.jp", "smtp.subspace.kernel.org;\n spf=fail smtp.mailfrom=users.sourceforge.jp" ], "Received": [ "from sy.mirrors.kernel.org (sy.mirrors.kernel.org\n [IPv6:2604:1380:40f1:3f00::1])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange X25519 server-signature ECDSA (secp384r1))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4Vq23l0NZvz20Pc\n\tfor <incoming@patchwork.ozlabs.org>; Wed, 29 May 2024 18:04:51 +1000 (AEST)", "from smtp.subspace.kernel.org (wormhole.subspace.kernel.org\n [52.25.139.140])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby sy.mirrors.kernel.org (Postfix) with ESMTPS id 9CBEFB26E6E\n\tfor <incoming@patchwork.ozlabs.org>; Wed, 29 May 2024 08:04:50 +0000 (UTC)", "from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 3B2C8171E47;\n\tWed, 29 May 2024 08:01:55 +0000 (UTC)", "from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp\n [153.127.30.23])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 662F7167DBA;\n\tWed, 29 May 2024 08:01:53 +0000 (UTC)", "from SIOS1075.ysato.name (al128006.dynamic.ppp.asahi-net.or.jp\n [111.234.128.6])\n\tby sakura.ysato.name (Postfix) with ESMTPSA id 5AC691C03A3;\n\tWed, 29 May 2024 17:01:51 +0900 (JST)" ], "ARC-Seal": "i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1716969715; cv=none;\n b=VBgbgPL+4XEYh4ZiZPt38GG5gUJsYLg6hyOcQczaeSynUoca9pOpiUOGu9TrTfoSjujs7QzeLrn6TEPZlu7TC/md+le+3NYK4D6o7uUdlglCj2B61zYydlOX12dpqHL5Dvj/gQSs9nB2+eAqyaF5Cc532cBfAJ/Rxl7YLalendk=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1716969715; c=relaxed/simple;\n\tbh=OX6WPfvRbxJ4483lBOVKEIaW/Ue8Sm+2/1Ot/oI7vsQ=;\n\th=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References:\n\t MIME-Version;\n b=rkcoueQK6RMIiMilKsK/RAiX6m4FTtd0P8iC5Ikyh49wT7tpu+8HFy7b9ShJU1Opn6EVQHnhvIs+PXLf91NATB24jAfH7iYNuzGAiYh+a/F5Ptc1s6VLYe+CvB8YdaXQHMR3ejvtNGZDW/2QhI+ERj6Qkxitt94D0H75g3LTsQ4=", "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dmarc=none (p=none dis=none) header.from=users.sourceforge.jp;\n spf=fail smtp.mailfrom=users.sourceforge.jp;\n arc=none smtp.client-ip=153.127.30.23", "From": "Yoshinori Sato <ysato@users.sourceforge.jp>", "To": "linux-sh@vger.kernel.org", "Cc": "Yoshinori Sato <ysato@users.sourceforge.jp>,\n Damien Le Moal <dlemoal@kernel.org>, Niklas Cassel <cassel@kernel.org>,\n Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>,\n Conor Dooley <conor+dt@kernel.org>,\n Geert Uytterhoeven <geert+renesas@glider.be>,\n Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>,\n David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>,\n Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,\n Maxime Ripard <mripard@kernel.org>, Thomas Zimmermann <tzimmermann@suse.de>,\n Thomas Gleixner <tglx@linutronix.de>, Bjorn Helgaas <bhelgaas@google.com>,\n Lorenzo Pieralisi <lpieralisi@kernel.org>, =?utf-8?q?Krzysztof_Wilczy=C5=84?=\n\t=?utf-8?q?ski?= <kw@linux.com>,\n Greg Kroah-Hartman <gregkh@linuxfoundation.org>,\n Jiri Slaby <jirislaby@kernel.org>, Magnus Damm <magnus.damm@gmail.com>,\n Daniel Lezcano <daniel.lezcano@linaro.org>, Rich Felker <dalias@libc.org>,\n John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>,\n Lee Jones <lee@kernel.org>, Helge Deller <deller@gmx.de>,\n Heiko Stuebner <heiko.stuebner@cherry.de>,\n Neil Armstrong <neil.armstrong@linaro.org>,\n Chris Morgan <macromorgan@hotmail.com>, Sebastian Reichel <sre@kernel.org>,\n Linus Walleij <linus.walleij@linaro.org>, Arnd Bergmann <arnd@arndb.de>,\n Masahiro Yamada <masahiroy@kernel.org>, Baoquan He <bhe@redhat.com>,\n Andrew Morton <akpm@linux-foundation.org>,\n Guenter Roeck <linux@roeck-us.net>, Kefeng Wang <wangkefeng.wang@huawei.com>,\n Stephen Rothwell <sfr@canb.auug.org.au>,\n Azeem Shaikh <azeemshaikh38@gmail.com>, Guo Ren <guoren@kernel.org>,\n Max Filippov <jcmvbkbc@gmail.com>, Jernej Skrabec <jernej.skrabec@gmail.com>,\n Herve Codina <herve.codina@bootlin.com>,\n Andy Shevchenko <andriy.shevchenko@linux.intel.com>,\n Anup Patel <apatel@ventanamicro.com>, Jacky Huang <ychuang3@nuvoton.com>,\n Hugo Villeneuve <hvilleneuve@dimonoff.com>, Jonathan Corbet <corbet@lwn.net>,\n Wolfram Sang <wsa+renesas@sang-engineering.com>, =?utf-8?q?Uwe_Kleine-K?=\n\t=?utf-8?q?=C3=B6nig?= <u.kleine-koenig@pengutronix.de>,\n Christophe JAILLET <christophe.jaillet@wanadoo.fr>,\n Sam Ravnborg <sam@ravnborg.org>,\n Javier Martinez Canillas <javierm@redhat.com>,\n Sergey Shtylyov <s.shtylyov@omp.ru>,\n Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>,\n linux-ide@vger.kernel.org, devicetree@vger.kernel.org,\n linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org,\n linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org,\n linux-pci@vger.kernel.org, linux-serial@vger.kernel.org,\n linux-fbdev@vger.kernel.org", "Subject": "[DO NOT MERGE v8 13/36] dt-bindings: clock: sh7750-cpg: Add\n renesas,sh7750-cpg header.", "Date": "Wed, 29 May 2024 17:00:59 +0900", "Message-Id": "\n <b1fc49269919c7d6c2e5c607ae29d1a6f2ab40d2.1716965617.git.ysato@users.sourceforge.jp>", "X-Mailer": "git-send-email 2.39.2", "In-Reply-To": "<cover.1716965617.git.ysato@users.sourceforge.jp>", "References": "<cover.1716965617.git.ysato@users.sourceforge.jp>", "Precedence": "bulk", "X-Mailing-List": "linux-pci@vger.kernel.org", "List-Id": "<linux-pci.vger.kernel.org>", "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit" }, "content": "SH7750 CPG Clock output define.\n\nSigned-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>\n---\n .../bindings/clock/renesas,sh7750-cpg.yaml | 107 ++++++++++++++++++\n include/dt-bindings/clock/sh7750-cpg.h | 26 +++++\n 2 files changed, 133 insertions(+)\n create mode 100644 Documentation/devicetree/bindings/clock/renesas,sh7750-cpg.yaml\n create mode 100644 include/dt-bindings/clock/sh7750-cpg.h", "diff": "diff --git a/Documentation/devicetree/bindings/clock/renesas,sh7750-cpg.yaml b/Documentation/devicetree/bindings/clock/renesas,sh7750-cpg.yaml\nnew file mode 100644\nindex 000000000000..0cdcab6fb4bc\n--- /dev/null\n+++ b/Documentation/devicetree/bindings/clock/renesas,sh7750-cpg.yaml\n@@ -0,0 +1,107 @@\n+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)\n+%YAML 1.2\n+---\n+$id: http://devicetree.org/schemas/clock/renesas,sh7750-cpg.yaml#\n+$schema: http://devicetree.org/meta-schemas/core.yaml#\n+\n+title: Renesas SH7750/7751 Clock Pulse Generator (CPG)\n+\n+maintainers:\n+ - Yoshinori Sato <ysato@users.sourceforge.jp>\n+\n+description:\n+ The Clock Pulse Generator (CPG) generates core clocks for the SoC. It\n+ includes PLLs, and variable ratio dividers.\n+\n+ The CPG may also provide a Clock Domain for SoC devices, in combination with\n+ the CPG Module Stop (MSTP) Clocks.\n+\n+properties:\n+ compatible:\n+ enum:\n+ - renesas,sh7750-cpg # SH7750\n+ - renesas,sh7750s-cpg # SH775S\n+ - renesas,sh7750r-cpg # SH7750R\n+ - renesas,sh7751-cpg # SH7751\n+ - renesas,sh7751r-cpg # SH7751R\n+\n+ reg:\n+ minItems: 1\n+ maxItems: 2\n+\n+ reg-names: true\n+\n+ clocks:\n+ maxItems: 1\n+\n+ clock-names:\n+ const: extal\n+\n+ '#clock-cells':\n+ const: 1\n+\n+ renesas,mode:\n+ description: Board-specific settings of the MD[0-2] pins on SoC\n+ $ref: /schemas/types.yaml#/definitions/uint32\n+ minimum: 0\n+ maximum: 6\n+\n+ '#power-domain-cells':\n+ const: 0\n+\n+required:\n+ - compatible\n+ - reg\n+ - reg-names\n+ - clocks\n+ - clock-names\n+ - '#clock-cells'\n+\n+allOf:\n+ - if:\n+ properties:\n+ compatible:\n+ contains:\n+ enum:\n+ - renesas,sh7750-cpg\n+ - renesas,sh7750s-cpg\n+ then:\n+ properties:\n+ reg:\n+ maxItems: 1\n+ reg-names:\n+ items:\n+ - const: FRQCR\n+\n+ - if:\n+ properties:\n+ compatible:\n+ contains:\n+ enum:\n+ - renesas,sh7750r-cpg\n+ - renesas,sh7751-cpg\n+ - renesas,sh7751r-cpg\n+ then:\n+ properties:\n+ reg:\n+ minItems: 2\n+ reg-names:\n+ items:\n+ - const: FRQCR\n+ - const: CLKSTP00\n+\n+additionalProperties: false\n+\n+examples:\n+ - |\n+ #include <dt-bindings/clock/sh7750-cpg.h>\n+ cpg: clock-controller@ffc00000 {\n+ compatible = \"renesas,sh7751r-cpg\";\n+ reg = <0xffc00000 20>, <0xfe0a0000 16>;\n+ reg-names = \"FRQCR\", \"CLKSTP00\";\n+ clocks = <&extal>;\n+ clock-names = \"extal\";\n+ renesas,mode = <0>;\n+ #clock-cells = <1>;\n+ #power-domain-cells = <0>;\n+ };\ndiff --git a/include/dt-bindings/clock/sh7750-cpg.h b/include/dt-bindings/clock/sh7750-cpg.h\nnew file mode 100644\nindex 000000000000..ec267be91adf\n--- /dev/null\n+++ b/include/dt-bindings/clock/sh7750-cpg.h\n@@ -0,0 +1,26 @@\n+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)\n+ *\n+ * Copyright 2023 Yoshinori Sato\n+ */\n+\n+#ifndef __DT_BINDINGS_CLOCK_SH7750_H__\n+#define __DT_BINDINGS_CLOCK_SH7750_H__\n+\n+#define SH7750_CPG_PLLOUT\t0\n+\n+#define SH7750_CPG_PCK\t\t1\n+#define SH7750_CPG_BCK\t\t2\n+#define SH7750_CPG_ICK\t\t3\n+\n+#define SH7750_MSTP_SCI\t\t4\n+#define SH7750_MSTP_RTC\t\t5\n+#define SH7750_MSTP_TMU012\t6\n+#define SH7750_MSTP_SCIF\t7\n+#define SH7750_MSTP_DMAC\t8\n+#define SH7750_MSTP_UBC\t\t9\n+#define SH7750_MSTP_SQ\t\t10\n+#define SH7750_CSTP_INTC\t11\n+#define SH7750_CSTP_TMU34\t12\n+#define SH7750_CSTP_PCIC\t13\n+\n+#endif\n", "prefixes": [ "DO", "NOT", "MERGE", "v8", "13/36" ] }