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GET /api/patches/1936160/?format=api
{ "id": 1936160, "url": "http://patchwork.ozlabs.org/api/patches/1936160/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-aspeed/patch/20240516181907.3468796-15-eajames@linux.ibm.com/", "project": { "id": 57, "url": "http://patchwork.ozlabs.org/api/projects/57/?format=api", "name": "Linux ASPEED SoC development", "link_name": "linux-aspeed", "list_id": "linux-aspeed.lists.ozlabs.org", "list_email": "linux-aspeed@lists.ozlabs.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20240516181907.3468796-15-eajames@linux.ibm.com>", "list_archive_url": null, "date": "2024-05-16T18:18:41", "name": "[v3,14/40] fsi: hub: Use common initialization and link enable", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "16cffaef10b37412c84b2cbbe009ffa50f0193d6", "submitter": { "id": 74989, "url": "http://patchwork.ozlabs.org/api/people/74989/?format=api", "name": "Eddie James", "email": "eajames@linux.ibm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-aspeed/patch/20240516181907.3468796-15-eajames@linux.ibm.com/mbox/", "series": [ { "id": 407101, "url": "http://patchwork.ozlabs.org/api/series/407101/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-aspeed/list/?series=407101", "date": "2024-05-16T18:18:31", "name": "fsi: Add interrupt support", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/407101/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1936160/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1936160/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-aspeed@lists.ozlabs.org" ], "Delivered-To": [ "patchwork-incoming@legolas.ozlabs.org", "linux-aspeed@lists.ozlabs.org" ], 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smtpav05.dal12v.mail.ibm.com (smtpav05.dal12v.mail.ibm.com\n [10.241.53.104])\n\tby smtprelay04.wdc07v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id\n 44GIJDvg35455468\n\t(version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK);\n\tThu, 16 May 2024 18:19:16 GMT", "from smtpav05.dal12v.mail.ibm.com (unknown [127.0.0.1])\n\tby IMSVA (Postfix) with ESMTP id C6EAB58080;\n\tThu, 16 May 2024 18:19:11 +0000 (GMT)", "from smtpav05.dal12v.mail.ibm.com (unknown [127.0.0.1])\n\tby IMSVA (Postfix) with ESMTP id 87A0258075;\n\tThu, 16 May 2024 18:19:11 +0000 (GMT)", "from slate16.aus.stglabs.ibm.com (unknown [9.61.107.19])\n\tby smtpav05.dal12v.mail.ibm.com (Postfix) with ESMTP;\n\tThu, 16 May 2024 18:19:11 +0000 (GMT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com;\n h=from : to : cc : subject\n : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding; s=pp1;\n bh=IS0irjXh2U091zKbKR7d+9rVvpukYBODxtV/+wXMALY=;\n b=LAVrrGGIKeMKY1Eg1La1dhURSkr87BqPf/8Kv68jMCoZn8ws3VWZ3duHCRnVi28fOqgp\n +cd/gv8VTCHgKx2aW1Nf98GptbN0EuqxxlbEllipcWKkL7ewdOKrFwxxE4N+rKLwDbkw\n urEeBZAj2LtNucp5AQyTuD/hKQdHZYDa62Bs31KtX1D1i36XhikeFqcQFEg+fxoziQ3D\n Ohju8txrwWR+KywxPG+0DOFCulyjIDWIpZ3DQGcFJm/LEKpzBN8IbnykMK/QyJq0AziK\n 5UbgynHe8hjS8ZSs7MXr8DucldiVY7aLhwUDn0/8/2LskhGvic+lEoK3QnqWLirSrQii 3w==", "From": "Eddie James <eajames@linux.ibm.com>", "To": "linux-fsi@lists.ozlabs.org", "Subject": "[PATCH v3 14/40] fsi: hub: Use common initialization and link enable", "Date": "Thu, 16 May 2024 13:18:41 -0500", "Message-Id": "<20240516181907.3468796-15-eajames@linux.ibm.com>", "X-Mailer": "git-send-email 2.39.3", "In-Reply-To": "<20240516181907.3468796-1-eajames@linux.ibm.com>", "References": "<20240516181907.3468796-1-eajames@linux.ibm.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-TM-AS-GCONF": "00", "X-Proofpoint-GUID": "PERxO3mfmi5SQtAcViUm7s-hG3sfF54E", "X-Proofpoint-ORIG-GUID": "PERxO3mfmi5SQtAcViUm7s-hG3sfF54E", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.11.176.26\n definitions=2024-05-16_07,2024-05-15_01,2023-05-22_02", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n lowpriorityscore=0\n suspectscore=0 bulkscore=0 spamscore=0 malwarescore=0 phishscore=0\n clxscore=1015 mlxlogscore=904 priorityscore=1501 adultscore=0\n impostorscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1\n engine=8.12.0-2405010000 definitions=main-2405160132", "X-BeenThere": "linux-aspeed@lists.ozlabs.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "Linux ASPEED SoC development <linux-aspeed.lists.ozlabs.org>", "List-Unsubscribe": "<https://lists.ozlabs.org/options/linux-aspeed>,\n <mailto:linux-aspeed-request@lists.ozlabs.org?subject=unsubscribe>", "List-Archive": "<http://lists.ozlabs.org/pipermail/linux-aspeed/>", "List-Post": "<mailto:linux-aspeed@lists.ozlabs.org>", "List-Help": "<mailto:linux-aspeed-request@lists.ozlabs.org?subject=help>", "List-Subscribe": "<https://lists.ozlabs.org/listinfo/linux-aspeed>,\n <mailto:linux-aspeed-request@lists.ozlabs.org?subject=subscribe>", "Cc": "andi.shyti@kernel.org, linux-aspeed@lists.ozlabs.org, jk@ozlabs.org,\n alistair@popple.id.au, linux-kernel@vger.kernel.org,\n linux-spi@vger.kernel.org, broonie@kernel.org, andrew@codeconstruct.com.au,\n linux-i2c@vger.kernel.org", "Errors-To": "linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org", "Sender": "\"Linux-aspeed\"\n <linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org>" }, "content": "Set up an FSI regmap for the hub master to use the new common\nmaster initialization and link enable procedures.\n\nSigned-off-by: Eddie James <eajames@linux.ibm.com>\n---\n drivers/fsi/fsi-master-hub.c | 142 ++++++-----------------------------\n 1 file changed, 23 insertions(+), 119 deletions(-)", "diff": "diff --git a/drivers/fsi/fsi-master-hub.c b/drivers/fsi/fsi-master-hub.c\nindex eea8649fee74d..91ad6b7728fa2 100644\n--- a/drivers/fsi/fsi-master-hub.c\n+++ b/drivers/fsi/fsi-master-hub.c\n@@ -9,6 +9,7 @@\n #include <linux/fsi.h>\n #include <linux/module.h>\n #include <linux/of.h>\n+#include <linux/regmap.h>\n #include <linux/slab.h>\n \n #include \"fsi-master.h\"\n@@ -16,8 +17,6 @@\n \n #define FSI_ENGID_HUB_MASTER\t\t0x1c\n \n-#define FSI_LINK_ENABLE_SETUP_TIME\t10\t/* in mS */\n-\n /*\n * FSI hub master support\n *\n@@ -78,134 +77,33 @@ static int hub_master_break(struct fsi_master *master, int link)\n \treturn hub_master_write(master, link, 0, addr, &cmd, sizeof(cmd));\n }\n \n-static int hub_master_link_enable(struct fsi_master *master, int link,\n-\t\t\t\t bool enable)\n-{\n-\tstruct fsi_master_hub *hub = to_fsi_master_hub(master);\n-\tint idx, bit;\n-\t__be32 reg;\n-\tint rc;\n-\n-\tidx = link / 32;\n-\tbit = link % 32;\n-\n-\treg = cpu_to_be32(0x80000000 >> bit);\n-\n-\tif (!enable)\n-\t\treturn fsi_device_write(hub->upstream, FSI_MCENP0 + (4 * idx),\n-\t\t\t\t\t®, 4);\n-\n-\trc = fsi_device_write(hub->upstream, FSI_MSENP0 + (4 * idx), ®, 4);\n-\tif (rc)\n-\t\treturn rc;\n-\n-\tmdelay(FSI_LINK_ENABLE_SETUP_TIME);\n-\n-\treturn 0;\n-}\n-\n static void hub_master_release(struct device *dev)\n {\n \tstruct fsi_master_hub *hub = to_fsi_master_hub(to_fsi_master(dev));\n \n+\tregmap_exit(hub->master.map);\n \tkfree(hub);\n }\n \n-/* mmode encoders */\n-static inline u32 fsi_mmode_crs0(u32 x)\n-{\n-\treturn (x & FSI_MMODE_CRS0MASK) << FSI_MMODE_CRS0SHFT;\n-}\n-\n-static inline u32 fsi_mmode_crs1(u32 x)\n-{\n-\treturn (x & FSI_MMODE_CRS1MASK) << FSI_MMODE_CRS1SHFT;\n-}\n-\n-static int hub_master_init(struct fsi_master_hub *hub)\n-{\n-\tstruct fsi_device *dev = hub->upstream;\n-\t__be32 reg;\n-\tint rc;\n-\n-\treg = cpu_to_be32(FSI_MRESP_RST_ALL_MASTER | FSI_MRESP_RST_ALL_LINK\n-\t\t\t| FSI_MRESP_RST_MCR | FSI_MRESP_RST_PYE);\n-\trc = fsi_device_write(dev, FSI_MRESP0, ®, sizeof(reg));\n-\tif (rc)\n-\t\treturn rc;\n-\n-\t/* Initialize the MFSI (hub master) engine */\n-\treg = cpu_to_be32(FSI_MRESP_RST_ALL_MASTER | FSI_MRESP_RST_ALL_LINK\n-\t\t\t| FSI_MRESP_RST_MCR | FSI_MRESP_RST_PYE);\n-\trc = fsi_device_write(dev, FSI_MRESP0, ®, sizeof(reg));\n-\tif (rc)\n-\t\treturn rc;\n-\n-\treg = cpu_to_be32(FSI_MECTRL_EOAE | FSI_MECTRL_P8_AUTO_TERM);\n-\trc = fsi_device_write(dev, FSI_MECTRL, ®, sizeof(reg));\n-\tif (rc)\n-\t\treturn rc;\n-\n-\treg = cpu_to_be32(FSI_MMODE_EIP | FSI_MMODE_ECRC | FSI_MMODE_EPC\n-\t\t\t| fsi_mmode_crs0(1) | fsi_mmode_crs1(1)\n-\t\t\t| FSI_MMODE_P8_TO_LSB);\n-\trc = fsi_device_write(dev, FSI_MMODE, ®, sizeof(reg));\n-\tif (rc)\n-\t\treturn rc;\n-\n-\treg = cpu_to_be32(0xffff0000);\n-\trc = fsi_device_write(dev, FSI_MDLYR, ®, sizeof(reg));\n-\tif (rc)\n-\t\treturn rc;\n-\n-\treg = cpu_to_be32(~0);\n-\trc = fsi_device_write(dev, FSI_MSENP0, ®, sizeof(reg));\n-\tif (rc)\n-\t\treturn rc;\n-\n-\t/* Leave enabled long enough for master logic to set up */\n-\tmdelay(FSI_LINK_ENABLE_SETUP_TIME);\n-\n-\trc = fsi_device_write(dev, FSI_MCENP0, ®, sizeof(reg));\n-\tif (rc)\n-\t\treturn rc;\n-\n-\trc = fsi_device_read(dev, FSI_MAEB, ®, sizeof(reg));\n-\tif (rc)\n-\t\treturn rc;\n-\n-\treg = cpu_to_be32(FSI_MRESP_RST_ALL_MASTER | FSI_MRESP_RST_ALL_LINK);\n-\trc = fsi_device_write(dev, FSI_MRESP0, ®, sizeof(reg));\n-\tif (rc)\n-\t\treturn rc;\n-\n-\trc = fsi_device_read(dev, FSI_MLEVP0, ®, sizeof(reg));\n-\tif (rc)\n-\t\treturn rc;\n-\n-\t/* Reset the master bridge */\n-\treg = cpu_to_be32(FSI_MRESB_RST_GEN);\n-\trc = fsi_device_write(dev, FSI_MRESB0, ®, sizeof(reg));\n-\tif (rc)\n-\t\treturn rc;\n-\n-\treg = cpu_to_be32(FSI_MRESB_RST_ERR);\n-\treturn fsi_device_write(dev, FSI_MRESB0, ®, sizeof(reg));\n-}\n-\n static int hub_master_probe(struct device *dev)\n {\n+\tstruct regmap_config hub_master_regmap_config;\n \tstruct fsi_device *fsi_dev = to_fsi_dev(dev);\n \tstruct fsi_master_hub *hub;\n+\tstruct regmap *map;\n \tuint32_t reg, links;\n-\t__be32 __reg;\n \tint rc;\n \n-\trc = fsi_device_read(fsi_dev, FSI_MVER, &__reg, sizeof(__reg));\n+\tfsi_master_regmap_config(&hub_master_regmap_config);\n+\thub_master_regmap_config.reg_base = fsi_dev->addr;\n+\tmap = regmap_init_fsi(fsi_dev, &hub_master_regmap_config);\n+\tif (IS_ERR(map))\n+\t\treturn PTR_ERR(map);\n+\n+\trc = regmap_read(map, FSI_MVER, ®);\n \tif (rc)\n-\t\treturn rc;\n+\t\tgoto err_regmap;\n \n-\treg = be32_to_cpu(__reg);\n \tlinks = (reg >> 8) & 0xff;\n \tdev_dbg(dev, \"hub version %08x (%d links)\\n\", reg, links);\n \n@@ -213,7 +111,7 @@ static int hub_master_probe(struct device *dev)\n \t\t\tFSI_HUB_LINK_SIZE * links);\n \tif (rc) {\n \t\tdev_err(dev, \"can't claim slave address range for links\");\n-\t\treturn rc;\n+\t\tgoto err_regmap;\n \t}\n \n \thub = kzalloc(sizeof(*hub), GFP_KERNEL);\n@@ -229,22 +127,24 @@ static int hub_master_probe(struct device *dev)\n \thub->master.dev.parent = dev;\n \thub->master.dev.release = hub_master_release;\n \thub->master.dev.of_node = of_node_get(dev_of_node(dev));\n+\thub->master.map = map;\n \n \thub->master.idx = fsi_dev->slave->link + 1;\n \thub->master.n_links = links;\n-\thub->master.flags = FSI_MASTER_FLAG_NO_BREAK_SID;\n+\thub->master.flags = FSI_MASTER_FLAG_NO_BREAK_SID | FSI_MASTER_FLAG_INTERRUPT;\n \thub->master.read = hub_master_read;\n \thub->master.write = hub_master_write;\n \thub->master.send_break = hub_master_break;\n-\thub->master.link_enable = hub_master_link_enable;\n \n \tdev_set_drvdata(dev, hub);\n \n-\thub_master_init(hub);\n+\trc = fsi_master_init(&hub->master, fsi_dev->slave->master->clock_frequency);\n+\tif (rc)\n+\t\tgoto err_free;\n \n \trc = fsi_master_register(&hub->master);\n \tif (rc)\n-\t\tgoto err_release;\n+\t\tgoto err_free;\n \n \t/* At this point, fsi_master_register performs the device_initialize(),\n \t * and holds the sole reference on master.dev. This means the device\n@@ -256,9 +156,13 @@ static int hub_master_probe(struct device *dev)\n \tget_device(&hub->master.dev);\n \treturn 0;\n \n+err_free:\n+\tkfree(hub);\n err_release:\n \tfsi_slave_release_range(fsi_dev->slave, FSI_HUB_LINK_OFFSET,\n \t\t\tFSI_HUB_LINK_SIZE * links);\n+err_regmap:\n+\tregmap_exit(map);\n \treturn rc;\n }\n \n", "prefixes": [ "v3", "14/40" ] }