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GET /api/patches/1936148/?format=api
{ "id": 1936148, "url": "http://patchwork.ozlabs.org/api/patches/1936148/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-aspeed/patch/20240516181907.3468796-33-eajames@linux.ibm.com/", "project": { "id": 57, "url": "http://patchwork.ozlabs.org/api/projects/57/?format=api", "name": "Linux ASPEED SoC development", "link_name": "linux-aspeed", "list_id": "linux-aspeed.lists.ozlabs.org", "list_email": "linux-aspeed@lists.ozlabs.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20240516181907.3468796-33-eajames@linux.ibm.com>", "list_archive_url": null, "date": "2024-05-16T18:18:59", "name": "[v3,32/40] i2c: fsi: Add interrupt support", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "89c427c7067fb1cb1df75cfea4d11a94f8e702d9", "submitter": { "id": 74989, "url": "http://patchwork.ozlabs.org/api/people/74989/?format=api", "name": "Eddie James", "email": "eajames@linux.ibm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-aspeed/patch/20240516181907.3468796-33-eajames@linux.ibm.com/mbox/", "series": [ { "id": 407101, "url": "http://patchwork.ozlabs.org/api/series/407101/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-aspeed/list/?series=407101", "date": "2024-05-16T18:18:31", "name": "fsi: Add interrupt support", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/407101/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1936148/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1936148/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-aspeed@lists.ozlabs.org" ], "Delivered-To": [ "patchwork-incoming@legolas.ozlabs.org", "linux-aspeed@lists.ozlabs.org" ], "Authentication-Results": [ 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(smtpav05.dal12v.mail.ibm.com\n [10.241.53.104])\n\tby smtprelay01.wdc07v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id\n 44GIJH6o31064598\n\t(version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK);\n\tThu, 16 May 2024 18:19:19 GMT", "from smtpav05.dal12v.mail.ibm.com (unknown [127.0.0.1])\n\tby IMSVA (Postfix) with ESMTP id 211E05805D;\n\tThu, 16 May 2024 18:19:17 +0000 (GMT)", "from smtpav05.dal12v.mail.ibm.com (unknown [127.0.0.1])\n\tby IMSVA (Postfix) with ESMTP id D0B2C58083;\n\tThu, 16 May 2024 18:19:16 +0000 (GMT)", "from slate16.aus.stglabs.ibm.com (unknown [9.61.107.19])\n\tby smtpav05.dal12v.mail.ibm.com (Postfix) with ESMTP;\n\tThu, 16 May 2024 18:19:16 +0000 (GMT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com;\n h=from : to : cc : subject\n : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding; s=pp1;\n bh=YxdI1uYsH7cLX7wJt08viDpVjHn4EWk+CktSg/LfJFE=;\n b=PjB+JW72nd/CpyHAIk1bypeUcMdA2Nrbwah4vCwUjiV8i4SgbRBunBWheB8duU9LxeIO\n NRpyxODNx6u4Ym8AoM9+9KvXsqpw/57K5hqOtBG73xAG5zgqKMSII3NZPh1BFJaKVAQq\n jtptnJJn2fOndpqZe+WDrSH+2Xt50+AVMcaGeQ4m0Ec/GXPhuD0Y0mZPaLFiTxD1RIlf\n tDgFdB2PRBhwAoe54P6LIFvKGNw3X4LLrF+dpiztrDSPsxTMTIA1dUNoeWdmoKfD0nmt\n Qcpwb0u5c6zUwqsOOcJ0aecr0Bqo8KMN+Gt4l8/W28y1csZXrNR50Jst7/ayGyUeiM5E gQ==", "From": "Eddie James <eajames@linux.ibm.com>", "To": "linux-fsi@lists.ozlabs.org", "Subject": "[PATCH v3 32/40] i2c: fsi: Add interrupt support", "Date": "Thu, 16 May 2024 13:18:59 -0500", "Message-Id": "<20240516181907.3468796-33-eajames@linux.ibm.com>", "X-Mailer": "git-send-email 2.39.3", "In-Reply-To": "<20240516181907.3468796-1-eajames@linux.ibm.com>", "References": "<20240516181907.3468796-1-eajames@linux.ibm.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-TM-AS-GCONF": "00", "X-Proofpoint-ORIG-GUID": "e3iekewMegtYRprZq0GSTS1xnVyEoHSL", "X-Proofpoint-GUID": "e3iekewMegtYRprZq0GSTS1xnVyEoHSL", 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"<mailto:linux-aspeed-request@lists.ozlabs.org?subject=help>", "List-Subscribe": "<https://lists.ozlabs.org/listinfo/linux-aspeed>,\n <mailto:linux-aspeed-request@lists.ozlabs.org?subject=subscribe>", "Cc": "andi.shyti@kernel.org, linux-aspeed@lists.ozlabs.org, jk@ozlabs.org,\n alistair@popple.id.au, linux-kernel@vger.kernel.org,\n linux-spi@vger.kernel.org, broonie@kernel.org, andrew@codeconstruct.com.au,\n linux-i2c@vger.kernel.org", "Errors-To": "linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org", "Sender": "\"Linux-aspeed\"\n <linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org>" }, "content": "Optionally support interrupts from the I2C controller so that\nthe driver can wait rather than poll the status register.\n\nSigned-off-by: Eddie James <eajames@linux.ibm.com>\n---\n drivers/i2c/busses/i2c-fsi.c | 215 ++++++++++++++++++++++++++++++---\n include/trace/events/i2c_fsi.h | 45 +++++++\n 2 files changed, 245 insertions(+), 15 deletions(-)\n create mode 100644 include/trace/events/i2c_fsi.h", "diff": "diff --git a/drivers/i2c/busses/i2c-fsi.c b/drivers/i2c/busses/i2c-fsi.c\nindex 614d830419bb8..f8d9bc178ef5b 100644\n--- a/drivers/i2c/busses/i2c-fsi.c\n+++ b/drivers/i2c/busses/i2c-fsi.c\n@@ -23,6 +23,7 @@\n #include <linux/mutex.h>\n #include <linux/of.h>\n #include <linux/slab.h>\n+#include <linux/wait.h>\n \n #define FSI_ENGID_I2C\t\t0x7\n \n@@ -87,6 +88,7 @@\n #define I2C_INT_STOP_ERR\tBIT(7)\n #define I2C_INT_BUSY\t\tBIT(6)\n #define I2C_INT_IDLE\t\tBIT(5)\n+#define I2C_INT_ANY\t\tGENMASK(15, 7)\n \n /* status register */\n #define I2C_STAT_INV_CMD\tBIT(31)\n@@ -148,21 +150,35 @@\n /* choose timeout length from legacy driver; it's well tested */\n #define I2C_ABORT_TIMEOUT\tmsecs_to_jiffies(100)\n \n+struct fsi_i2c_port;\n+\n struct fsi_i2c_master {\n \tstruct fsi_device\t*fsi;\n+\tstruct fsi_i2c_port\t*port;\n \tstruct mutex\t\tlock;\n+\twait_queue_head_t\twait;\n \tu32\t\t\tclock_div;\n \tu8\t\t\tfifo_size;\n+\tbool\t\t\tinterrupts;\n \tbool\t\t\tskip_stop;\n+\tbool\t\t\tabort;\n };\n \n struct fsi_i2c_port {\n \tstruct i2c_adapter\tadapter;\n \tstruct fsi_i2c_master\t*master;\n+\tstruct i2c_msg\t\t*msgs;\n+\tint\t\t\tnmsgs;\n+\tint\t\t\trc;\n+\tint\t\t\ti;\n \tu16\t\t\tport;\n \tu16\t\t\txfrd;\n+\tbool\t\t\twake;\n };\n \n+#define CREATE_TRACE_POINTS\n+#include <trace/events/i2c_fsi.h>\n+\n static int fsi_i2c_read_reg(struct fsi_device *fsi, unsigned int reg,\n \t\t\t u32 *data)\n {\n@@ -192,7 +208,7 @@ static int fsi_i2c_dev_init(struct fsi_i2c_master *i2c)\n \tu32 watermark;\n \tint rc;\n \n-\t/* since we use polling, disable interrupts */\n+\t/* start with interrupts disabled */\n \trc = fsi_i2c_write_reg(i2c->fsi, I2C_FSI_INT_MASK, 0);\n \tif (rc)\n \t\treturn rc;\n@@ -236,22 +252,24 @@ static int fsi_i2c_set_port(struct fsi_i2c_port *port)\n \treturn fsi_i2c_write_reg(fsi, I2C_FSI_RESET_ERR, 0);\n }\n \n-static int fsi_i2c_start(struct fsi_i2c_port *port, struct i2c_msg *msg,\n-\t\t\t bool stop)\n+static int fsi_i2c_start(struct fsi_i2c_port *port)\n {\n \tu32 cmd = I2C_CMD_WITH_START | I2C_CMD_WITH_ADDR;\n+\tstruct i2c_msg *msg = &port->msgs[port->i];\n \n \tport->xfrd = 0;\n \n \tif (msg->flags & I2C_M_RD)\n \t\tcmd |= I2C_CMD_READ;\n \n-\tif (stop || msg->flags & I2C_M_STOP)\n+\tif ((port->i == (port->nmsgs - 1)) || (msg->flags & I2C_M_STOP))\n \t\tcmd |= I2C_CMD_WITH_STOP;\n \n \tcmd |= FIELD_PREP(I2C_CMD_ADDR, msg->addr);\n \tcmd |= FIELD_PREP(I2C_CMD_LEN, msg->len);\n \n+\ttrace_i2c_fsi_start(port, cmd);\n+\n \treturn fsi_i2c_write_reg(port->master->fsi, I2C_FSI_CMD, cmd);\n }\n \n@@ -489,11 +507,38 @@ static int fsi_i2c_abort(struct fsi_i2c_port *port)\n \tif (i2c->skip_stop)\n \t\treturn 0;\n \n+\tif (i2c->interrupts) {\n+\t\ti2c->abort = true;\n+\t\tport->wake = false;\n+\n+\t\trc = fsi_i2c_write_reg(i2c->fsi, I2C_FSI_INT_MASK, I2C_INT_ANY);\n+\t\tif (rc)\n+\t\t\treturn rc;\n+\t}\n+\n \t/* write stop command */\n \trc = fsi_i2c_write_reg(i2c->fsi, I2C_FSI_CMD, cmd);\n \tif (rc)\n \t\treturn rc;\n \n+\tif (i2c->interrupts) {\n+\t\trc = wait_event_interruptible_timeout(i2c->wait, port->wake, I2C_ABORT_TIMEOUT);\n+\t\tif (rc > 0)\n+\t\t\treturn port->rc;\n+\n+\t\tfsi_i2c_write_reg(i2c->fsi, I2C_FSI_INT_MASK, 0);\n+\n+\t\tif (!rc) {\n+\t\t\trc = fsi_i2c_read_reg(i2c->fsi, I2C_FSI_STAT, &status);\n+\t\t\tif (!rc && (status & I2C_STAT_CMD_COMP))\n+\t\t\t\trc = 0;\n+\t\t\telse\n+\t\t\t\trc = -ETIMEDOUT;\n+\t\t}\n+\n+\t\treturn rc;\n+\t}\n+\n \t/* wait until we see command complete in the master */\n \tstart = jiffies;\n \tdo {\n@@ -564,8 +609,59 @@ static int fsi_i2c_handle_status(struct fsi_i2c_port *port,\n \treturn 0;\n }\n \n-static int fsi_i2c_wait(struct fsi_i2c_port *port, struct i2c_msg *msg,\n-\t\t\tunsigned long timeout)\n+static int fsi_i2c_wait_irq(struct fsi_i2c_port *port, unsigned long timeout)\n+{\n+\tint rc;\n+\n+\tport->wake = false;\n+\n+\trc = fsi_i2c_write_reg(port->master->fsi, I2C_FSI_INT_MASK, I2C_INT_ANY);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\trc = wait_event_interruptible_timeout(port->master->wait, port->wake, timeout);\n+\tif (rc > 0) {\n+\t\trc = port->rc;\n+\n+\t\tif (port->master->abort) {\n+\t\t\tint rc2 = fsi_i2c_abort(port);\n+\n+\t\t\tif (rc2)\n+\t\t\t\treturn rc2;\n+\t\t}\n+\n+\t\treturn rc;\n+\t}\n+\n+\t/*\n+\t * The interrupt handler should turn off interrupts once it's done, but in this\n+\t * case we timed out or were interrupted, so mask them off here.\n+\t */\n+\tfsi_i2c_write_reg(port->master->fsi, I2C_FSI_INT_MASK, 0);\n+\n+\tif (!rc) {\n+\t\tu32 status;\n+\n+\t\trc = fsi_i2c_read_reg(port->master->fsi, I2C_FSI_STAT, &status);\n+\t\tif (!rc && (status & I2C_STAT_ANY_RESP)) {\n+\t\t\trc = fsi_i2c_handle_status(port, &port->msgs[port->i], status);\n+\t\t\tif (rc < 0)\n+\t\t\t\treturn rc;\n+\n+\t\t\t/* cmd complete and all data xfrd */\n+\t\t\tif (rc == port->msgs[port->i].len)\n+\t\t\t\treturn 0;\n+\n+\t\t\trc = -ETIMEDOUT;\n+\t\t} else {\n+\t\t\trc = -ETIMEDOUT;\n+\t\t}\n+\t}\n+\n+\treturn rc;\n+}\n+\n+static int fsi_i2c_wait_poll(struct fsi_i2c_port *port, unsigned long timeout)\n {\n \tunsigned long start = jiffies;\n \tu32 status;\n@@ -578,12 +674,12 @@ static int fsi_i2c_wait(struct fsi_i2c_port *port, struct i2c_msg *msg,\n \t\t\treturn rc;\n \n \t\tif (status & I2C_STAT_ANY_RESP) {\n-\t\t\trc = fsi_i2c_handle_status(port, msg, status);\n+\t\t\trc = fsi_i2c_handle_status(port, &port->msgs[port->i], status);\n \t\t\tif (rc < 0)\n \t\t\t\treturn rc;\n \n \t\t\t/* cmd complete and all data xfrd */\n-\t\t\tif (rc == msg->len)\n+\t\t\tif (rc == port->msgs[port->i].len)\n \t\t\t\treturn 0;\n \n \t\t\t/* need to xfr more data, but maybe don't need wait */\n@@ -601,9 +697,7 @@ static int fsi_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,\n {\n \tstruct fsi_i2c_port *port = i2c_get_adapdata(adap);\n \tunsigned long start_time;\n-\tstruct i2c_msg *msg;\n \tint rc;\n-\tint i;\n \n \tmutex_lock(&port->master->lock);\n \n@@ -611,21 +705,28 @@ static int fsi_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,\n \tif (rc)\n \t\tgoto unlock;\n \n-\tfor (i = 0; i < num; i++) {\n-\t\tmsg = msgs + i;\n+\tport->master->port = port;\n+\tport->master->abort = false;\n+\tport->msgs = msgs;\n+\tport->nmsgs = num;\n+\tfor (port->i = 0; port->i < num; ++port->i) {\n \t\tstart_time = jiffies;\n \n-\t\trc = fsi_i2c_start(port, msg, i == num - 1);\n+\t\trc = fsi_i2c_start(port);\n \t\tif (rc)\n \t\t\tgoto unlock;\n \n-\t\trc = fsi_i2c_wait(port, msg,\n-\t\t\t\t adap->timeout - (jiffies - start_time));\n+\t\tif (port->master->interrupts)\n+\t\t\trc = fsi_i2c_wait_irq(port, adap->timeout - (jiffies - start_time));\n+\t\telse\n+\t\t\trc = fsi_i2c_wait_poll(port, adap->timeout - (jiffies - start_time));\n \t\tif (rc)\n \t\t\tgoto unlock;\n \t}\n \n unlock:\n+\tport->msgs = NULL;\n+\tport->master->port = NULL;\n \tmutex_unlock(&port->master->lock);\n \treturn rc ? : num;\n }\n@@ -636,6 +737,85 @@ static u32 fsi_i2c_functionality(struct i2c_adapter *adap)\n \t\tI2C_FUNC_SMBUS_EMUL | I2C_FUNC_SMBUS_BLOCK_DATA;\n }\n \n+static irqreturn_t fsi_i2c_irq(int irq, void *data)\n+{\n+\tstruct fsi_i2c_master *i2c = data;\n+\tstruct fsi_i2c_port *port;\n+\tstruct i2c_msg *msg;\n+\tu32 status;\n+\tint rc;\n+\n+\trc = fsi_i2c_write_reg(i2c->fsi, I2C_FSI_INT_MASK, 0);\n+\tif (rc)\n+\t\treturn IRQ_NONE;\n+\n+\tif (!i2c->port)\n+\t\treturn IRQ_HANDLED;\n+\n+\tport = i2c->port;\n+\trc = fsi_i2c_read_reg(i2c->fsi, I2C_FSI_STAT, &status);\n+\tif (rc)\n+\t\tgoto wake;\n+\n+\ttrace_i2c_fsi_irq(port, status);\n+\n+\tif (i2c->abort) {\n+\t\tif (status & I2C_STAT_CMD_COMP) {\n+\t\t\tport->wake = true;\n+\t\t\tgoto done;\n+\t\t} else {\n+\t\t\trc = fsi_i2c_error_status_to_rc(status);\n+\t\t\tgoto wake;\n+\t\t}\n+\t}\n+\n+\tif (status & I2C_STAT_ERR) {\n+\t\ti2c->abort = true;\n+\t\ti2c->skip_stop = status & I2C_STAT_SKIP_STOP;\n+\t\trc = fsi_i2c_error_status_to_rc(status);\n+\t\tgoto wake;\n+\t}\n+\n+\tif (!port->msgs || port->i >= port->nmsgs) {\n+\t\trc = -ENODEV;\n+\t\tgoto wake;\n+\t}\n+\n+\tmsg = &port->msgs[port->i];\n+\tif (status & I2C_STAT_DAT_REQ) {\n+\t\tu8 fifo_count = FIELD_GET(I2C_STAT_FIFO_COUNT, status);\n+\n+\t\tif (msg->flags & I2C_M_RD)\n+\t\t\trc = fsi_i2c_read_fifo(port, msg, fifo_count);\n+\t\telse\n+\t\t\trc = fsi_i2c_write_fifo(port, msg, fifo_count);\n+\t} else if (status & I2C_STAT_CMD_COMP) {\n+\t\tif (port->xfrd < msg->len) {\n+\t\t\trc = -ENODATA;\n+\t\t} else {\n+\t\t\t++port->i;\n+\t\t\tif (port->i < port->nmsgs) {\n+\t\t\t\trc = fsi_i2c_start(port);\n+\t\t\t} else {\n+\t\t\t\tport->wake = true;\n+\t\t\t\tgoto done;\n+\t\t\t}\n+\t\t}\n+\t}\n+\n+\tif (!rc)\n+\t\trc = fsi_i2c_write_reg(i2c->fsi, I2C_FSI_INT_MASK, I2C_INT_ANY);\n+\n+wake:\n+\tif (rc)\n+\t\tport->wake = true;\n+done:\n+\tport->rc = rc;\n+\tif (port->wake)\n+\t\twake_up_interruptible_all(&i2c->wait);\n+\treturn IRQ_HANDLED;\n+}\n+\n static struct i2c_bus_recovery_info fsi_i2c_bus_recovery_info = {\n \t.recover_bus = i2c_generic_scl_recovery,\n \t.get_scl = fsi_i2c_get_scl,\n@@ -683,6 +863,7 @@ static int fsi_i2c_probe(struct device *dev)\n \t\treturn -ENOMEM;\n \n \tmutex_init(&i2c->lock);\n+\tinit_waitqueue_head(&i2c->wait);\n \ti2c->fsi = to_fsi_dev(dev);\n \ti2c->clock_div = I2C_DEFAULT_CLK_DIV;\n \n@@ -706,6 +887,10 @@ static int fsi_i2c_probe(struct device *dev)\n \tif (rc)\n \t\treturn rc;\n \n+\trc = fsi_device_request_irq(i2c->fsi, fsi_i2c_irq, i2c);\n+\tif (!rc)\n+\t\ti2c->interrupts = true;\n+\n \tports = FIELD_GET(I2C_STAT_MAX_PORT, stat) + 1;\n \tdev_dbg(dev, \"I2C master has %d ports\\n\", ports);\n \ndiff --git a/include/trace/events/i2c_fsi.h b/include/trace/events/i2c_fsi.h\nnew file mode 100644\nindex 0000000000000..ac49ae9be356b\n--- /dev/null\n+++ b/include/trace/events/i2c_fsi.h\n@@ -0,0 +1,45 @@\n+/* SPDX-License-Identifier: GPL-2.0 */\n+\n+#undef TRACE_SYSTEM\n+#define TRACE_SYSTEM i2c_fsi\n+\n+#if !defined(_TRACE_I2C_FSI_H) || defined(TRACE_HEADER_MULTI_READ)\n+#define _TRACE_I2C_FSI_H\n+\n+#include <linux/tracepoint.h>\n+\n+TRACE_EVENT(i2c_fsi_irq,\n+\tTP_PROTO(const struct fsi_i2c_port *port, uint32_t status),\n+\tTP_ARGS(port, status),\n+\tTP_STRUCT__entry(\n+\t\t__field(int, bus)\n+\t\t__field(int, msg_idx)\n+\t\t__field(uint32_t, status)\n+\t),\n+\tTP_fast_assign(\n+\t\t__entry->bus = port->adapter.nr;\n+\t\t__entry->msg_idx = port->i;\n+\t\t__entry->status = status;\n+\t),\n+\tTP_printk(\"i2c-%d [%d] status:%08x\", __entry->bus, __entry->msg_idx, __entry->status)\n+);\n+\n+TRACE_EVENT(i2c_fsi_start,\n+\tTP_PROTO(const struct fsi_i2c_port *port, uint32_t command),\n+\tTP_ARGS(port, command),\n+\tTP_STRUCT__entry(\n+\t\t__field(int, bus)\n+\t\t__field(int, msg_idx)\n+\t\t__field(uint32_t, command)\n+\t),\n+\tTP_fast_assign(\n+\t\t__entry->bus = port->adapter.nr;\n+\t\t__entry->msg_idx = port->i;\n+\t\t__entry->command = command;\n+\t),\n+\tTP_printk(\"i2c-%d [%d] command:%08x\", __entry->bus, __entry->msg_idx, __entry->command)\n+);\n+\n+#endif\n+\n+#include <trace/define_trace.h>\n", "prefixes": [ "v3", "32/40" ] }