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GET /api/patches/1936113/?format=api
{ "id": 1936113, "url": "http://patchwork.ozlabs.org/api/patches/1936113/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-aspeed/patch/20240516181907.3468796-19-eajames@linux.ibm.com/", "project": { "id": 57, "url": "http://patchwork.ozlabs.org/api/projects/57/?format=api", "name": "Linux ASPEED SoC development", "link_name": "linux-aspeed", "list_id": "linux-aspeed.lists.ozlabs.org", "list_email": "linux-aspeed@lists.ozlabs.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20240516181907.3468796-19-eajames@linux.ibm.com>", "list_archive_url": null, "date": "2024-05-16T18:18:45", "name": "[v3,18/40] fsi: aspeed: Don't clear all IRQs during OPB transfers", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "daf7b2bdc1931ef4cc77fbe7a15769f79a3efddd", "submitter": { "id": 74989, "url": "http://patchwork.ozlabs.org/api/people/74989/?format=api", "name": "Eddie James", "email": "eajames@linux.ibm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-aspeed/patch/20240516181907.3468796-19-eajames@linux.ibm.com/mbox/", "series": [ { "id": 407101, "url": "http://patchwork.ozlabs.org/api/series/407101/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-aspeed/list/?series=407101", "date": "2024-05-16T18:18:31", "name": "fsi: Add interrupt support", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/407101/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1936113/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1936113/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-aspeed@lists.ozlabs.org" ], "Delivered-To": [ "patchwork-incoming@legolas.ozlabs.org", "linux-aspeed@lists.ozlabs.org" ], "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256\n header.s=pp1 header.b=NP3iUm1b;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org\n (client-ip=2404:9400:2:0:216:3eff:fee1:b9f1; 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a=rsa-sha256; c=relaxed/relaxed; d=ibm.com;\n h=from : to : cc : subject\n : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding; s=pp1;\n bh=dqdJlR5MaTztZMJgWYsXAeJqjv1L5VBfiwva68G3Zto=;\n b=NP3iUm1blKdCpvnXHDrLH11TD6Ymg20NEoUjZuNbW3hyE0mouwzB64CpqUAXEECPBz3g\n uDzwZO5QqkK4GW76Zwy1GX2EOe2TEyIv01WuOYqBMwMc2+5Ww6gvjrCnKDuQ9Ou1Qa6C\n S5p3atVGprmLOneb2yWgjPo7Q241kV3ZVg3o5RkFPRHnuqrxl/0ED6Q0poToFcSrzUa9\n Gx/AfW7NXvMHojm086iIWw3EEf6zTxa8XzALr+2K6TbdqJnUN5f7wg12AtsHbLfgyj4q\n PwkubH3W/RQhitbtYZJake0EnRejmtICnNePfD122TRihK+3hnZUhefBEDp6klnjE8eP Ag==", "From": "Eddie James <eajames@linux.ibm.com>", "To": "linux-fsi@lists.ozlabs.org", "Subject": "[PATCH v3 18/40] fsi: aspeed: Don't clear all IRQs during OPB\n transfers", "Date": "Thu, 16 May 2024 13:18:45 -0500", "Message-Id": "<20240516181907.3468796-19-eajames@linux.ibm.com>", "X-Mailer": "git-send-email 2.39.3", "In-Reply-To": "<20240516181907.3468796-1-eajames@linux.ibm.com>", "References": "<20240516181907.3468796-1-eajames@linux.ibm.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-TM-AS-GCONF": "00", "X-Proofpoint-ORIG-GUID": "u2pDWQQhoxsFKEfFhDC_C6Oq6MKpP5WB", "X-Proofpoint-GUID": "u2pDWQQhoxsFKEfFhDC_C6Oq6MKpP5WB", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.11.176.26\n definitions=2024-05-16_07,2024-05-15_01,2023-05-22_02", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n priorityscore=1501\n bulkscore=0 lowpriorityscore=0 mlxlogscore=999 mlxscore=0 impostorscore=0\n spamscore=0 phishscore=0 suspectscore=0 clxscore=1015 adultscore=0\n malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1\n engine=8.12.0-2405010000 definitions=main-2405160132", "X-BeenThere": "linux-aspeed@lists.ozlabs.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "Linux ASPEED SoC development <linux-aspeed.lists.ozlabs.org>", "List-Unsubscribe": "<https://lists.ozlabs.org/options/linux-aspeed>,\n <mailto:linux-aspeed-request@lists.ozlabs.org?subject=unsubscribe>", "List-Archive": "<http://lists.ozlabs.org/pipermail/linux-aspeed/>", "List-Post": "<mailto:linux-aspeed@lists.ozlabs.org>", "List-Help": "<mailto:linux-aspeed-request@lists.ozlabs.org?subject=help>", "List-Subscribe": "<https://lists.ozlabs.org/listinfo/linux-aspeed>,\n <mailto:linux-aspeed-request@lists.ozlabs.org?subject=subscribe>", "Cc": "andi.shyti@kernel.org, linux-aspeed@lists.ozlabs.org, jk@ozlabs.org,\n alistair@popple.id.au, linux-kernel@vger.kernel.org,\n linux-spi@vger.kernel.org, broonie@kernel.org, andrew@codeconstruct.com.au,\n linux-i2c@vger.kernel.org", "Errors-To": "linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org", "Sender": "\"Linux-aspeed\"\n <linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org>" }, "content": "In order to support FSI interrupts, the OPB transfer functions should\nnot clear all the IRQs pending. Instead, just write the OPB ACK bit\nto the IRQ status register. As commented, this register invisibly\nmasks the interrupt once the interrupt condition is cleared. Fix this\nby writing 0 before each OPB transfer.\n\nSigned-off-by: Eddie James <eajames@linux.ibm.com>\n---\n drivers/fsi/fsi-master-aspeed.c | 13 +++++++++----\n 1 file changed, 9 insertions(+), 4 deletions(-)", "diff": "diff --git a/drivers/fsi/fsi-master-aspeed.c b/drivers/fsi/fsi-master-aspeed.c\nindex 04aa5cb9b6fad..f840c7c4a56b9 100644\n--- a/drivers/fsi/fsi-master-aspeed.c\n+++ b/drivers/fsi/fsi-master-aspeed.c\n@@ -47,6 +47,11 @@ static const u32 fsi_base = 0xa0000000;\n #define OPB_CLK_SYNC\t0x3c\n #define OPB_IRQ_CLEAR\t0x40\n #define OPB_IRQ_MASK\t0x44\n+/*\n+ * This register does NOT behave in the expected manner. It is expected that writing 1b would clear\n+ * the corresponding interrupt condition. However it also invisibly masks the interrupt! Writing 0b\n+ * unmasks again.\n+ */\n #define OPB_IRQ_STATUS\t0x48\n \n #define OPB0_SELECT\t0x10\n@@ -113,13 +118,14 @@ static int __opb_write(struct fsi_master_aspeed *aspeed, u32 addr,\n \twritel_relaxed(transfer_size, base + OPB0_XFER_SIZE);\n \twritel_relaxed(addr, base + OPB0_FSI_ADDR);\n \twritel_relaxed(val, base + OPB0_FSI_DATA_W);\n-\twritel_relaxed(0x1, base + OPB_IRQ_CLEAR);\n+\twritel_relaxed(0, base + OPB_IRQ_STATUS);\n \twritel(0x1, base + OPB_TRIGGER);\n \n \tret = readl_poll_timeout(base + OPB_IRQ_STATUS, reg,\n \t\t\t\t(reg & OPB0_XFER_ACK_EN) != 0,\n \t\t\t\t0, OPB_POLL_TIMEOUT);\n \n+\twritel(OPB0_XFER_ACK_EN, base + OPB_IRQ_STATUS);\n \tstatus = readl(base + OPB0_STATUS);\n \n \t/* Return error when poll timed out */\n@@ -165,13 +171,14 @@ static int __opb_read(struct fsi_master_aspeed *aspeed, uint32_t addr,\n \twritel_relaxed(CMD_READ, base + OPB0_RW);\n \twritel_relaxed(transfer_size, base + OPB0_XFER_SIZE);\n \twritel_relaxed(addr, base + OPB0_FSI_ADDR);\n-\twritel_relaxed(0x1, base + OPB_IRQ_CLEAR);\n+\twritel_relaxed(0, aspeed->base + OPB_IRQ_STATUS);\n \twritel(0x1, base + OPB_TRIGGER);\n \n \tret = readl_poll_timeout(base + OPB_IRQ_STATUS, reg,\n \t\t\t (reg & OPB0_XFER_ACK_EN) != 0,\n \t\t\t 0, OPB_POLL_TIMEOUT);\n \n+\twritel(OPB0_XFER_ACK_EN, base + OPB_IRQ_STATUS);\n \tstatus = readl(base + OPB0_STATUS);\n \n \tresult = readl(base + OPB0_FSI_DATA_R);\n@@ -530,8 +537,6 @@ static int fsi_master_aspeed_probe(struct platform_device *pdev)\n \t}\n \n \twritel(0x1, aspeed->base + OPB_CLK_SYNC);\n-\twritel(OPB1_XFER_ACK_EN | OPB0_XFER_ACK_EN,\n-\t\t\taspeed->base + OPB_IRQ_MASK);\n \n \twritel(opb_retry_counter, aspeed->base + OPB_RETRY_COUNTER);\n \n", "prefixes": [ "v3", "18/40" ] }