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GET /api/patches/1882157/?format=api
{ "id": 1882157, "url": "http://patchwork.ozlabs.org/api/patches/1882157/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20240103173349.398526-26-alex.bennee@linaro.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20240103173349.398526-26-alex.bennee@linaro.org>", "list_archive_url": null, "date": "2024-01-03T17:33:31", "name": "[v2,25/43] target/riscv: Validate misa_mxl_max only once", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "c74776d7b6bf9979070bba3979413a211be60e87", "submitter": { "id": 39532, "url": "http://patchwork.ozlabs.org/api/people/39532/?format=api", "name": "Alex Bennée", "email": "alex.bennee@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20240103173349.398526-26-alex.bennee@linaro.org/mbox/", "series": [ { "id": 388742, "url": "http://patchwork.ozlabs.org/api/series/388742/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=388742", "date": "2024-01-03T17:33:08", "name": "testing and plugin updates for 9.0 (pre-PR)", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/388742/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1882157/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1882157/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=G78EPmVk;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20230601; t=1704304148; x=1704908948;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc\n :subject:date:message-id:reply-to;\n bh=Fv8i/ZD80zCUMWCrsFxA5ec1+Ry+9mZct9W/s18lf+Y=;\n b=tYZrCo+JTZiU6wHvPm4+Q4lpwxzFemTFGAFP7nzeYt9bOT2tAj5m7EPHP4LpmmRYEN\n ovMWCT4Uzldv9ofWbC2lbD+FO9uGiWhwfE93kFRGgWBNzdVL81iUA5ql0cXUoTM6v4kR\n Nv+va3LoqhyYaBFgi7hWZBNA5OtHJrSpR1I66c9JdNv0fcVjq8+gqttfFK0cRZVogyHl\n s/dXm3NMR7dGZ6AS16D7tISDmoJicdPYk1iiYfYAuRKgm7QxQ99niZl9Hl8BPtMhm9SS\n 5x80eKeCGrdbEx2hGaoO3CP0kScIGCfL6Y7G0Cry9QXfXqc6kdzq7lVZKoK4SbGaZjI0\n 8cHQ==", "X-Gm-Message-State": "AOJu0Yy7E/c9bWNMCCOBRMM1ryonlpnli4hG+vwv7cqX2JBoeK8huqfr\n p+p3tC72Wr5HFcjs3ybXb7zT+hd/tW3uuw==", "X-Google-Smtp-Source": "\n AGHT+IHB2womVRGJeKyIZRLuutqaVIEZpbMeA2e0zso0qnpDk3i078lV3hSK2mrnROOwDfbSnHP0EQ==", "X-Received": "by 2002:a1c:7718:0:b0:40d:5bf5:c8ce with SMTP id\n t24-20020a1c7718000000b0040d5bf5c8cemr6378521wmi.126.1704304147711;\n Wed, 03 Jan 2024 09:49:07 -0800 (PST)", "From": "=?utf-8?q?Alex_Benn=C3=A9e?= <alex.bennee@linaro.org>", "To": "qemu-devel@nongnu.org", "Cc": "qemu-s390x@nongnu.org, qemu-ppc@nongnu.org,\n Richard Henderson <richard.henderson@linaro.org>,\n Song Gao <gaosong@loongson.cn>,\n =?utf-8?q?Marc-Andr=C3=A9_Lureau?= <marcandre.lureau@redhat.com>,\n David Hildenbrand <david@redhat.com>, Aurelien Jarno <aurelien@aurel32.net>,\n Yoshinori Sato <ysato@users.sourceforge.jp>,\n Yanan Wang <wangyanan55@huawei.com>, Bin Meng <bin.meng@windriver.com>,\n Laurent Vivier <lvivier@redhat.com>, Michael Rolnik <mrolnik@gmail.com>,\n Alexandre Iooss <erdnaxe@crans.org>, David Woodhouse <dwmw2@infradead.org>,\n Laurent Vivier <laurent@vivier.eu>, Paolo Bonzini <pbonzini@redhat.com>,\n Brian Cain <bcain@quicinc.com>,\n Daniel Henrique Barboza <danielhb413@gmail.com>,\n Beraldo Leal <bleal@redhat.com>, Paul Durrant <paul@xen.org>,\n Mahmoud Mandour <ma.mandourr@gmail.com>, Thomas Huth <thuth@redhat.com>,\n Liu Zhiwei <zhiwei_liu@linux.alibaba.com>, Cleber Rosa <crosa@redhat.com>,\n kvm@vger.kernel.org, Peter Maydell <peter.maydell@linaro.org>,\n Wainer dos Santos Moschetta <wainersm@redhat.com>, =?utf-8?q?Alex_Benn?=\n\t=?utf-8?q?=C3=A9e?= <alex.bennee@linaro.org>, qemu-arm@nongnu.org,\n Weiwei Li <liwei1518@gmail.com>,\n =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= <philmd@linaro.org>,\n John Snow <jsnow@redhat.com>,\n Daniel Henrique Barboza <dbarboza@ventanamicro.com>,\n Nicholas Piggin <npiggin@gmail.com>, Palmer Dabbelt <palmer@dabbelt.com>,\n Marcel Apfelbaum <marcel.apfelbaum@gmail.com>,\n Ilya Leoshkevich <iii@linux.ibm.com>,\n =?utf-8?q?C=C3=A9dric_Le_Goater?= <clg@kaod.org>,\n \"Edgar E. Iglesias\" <edgar.iglesias@gmail.com>,\n Eduardo Habkost <eduardo@habkost.net>,\n Pierrick Bouvier <pierrick.bouvier@linaro.org>, qemu-riscv@nongnu.org,\n Alistair Francis <alistair.francis@wdc.com>,\n Akihiko Odaki <akihiko.odaki@daynix.com>", "Subject": "[PATCH v2 25/43] target/riscv: Validate misa_mxl_max only once", "Date": "Wed, 3 Jan 2024 17:33:31 +0000", "Message-Id": "<20240103173349.398526-26-alex.bennee@linaro.org>", "X-Mailer": "git-send-email 2.39.2", "In-Reply-To": "<20240103173349.398526-1-alex.bennee@linaro.org>", "References": "<20240103173349.398526-1-alex.bennee@linaro.org>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=UTF-8", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=2a00:1450:4864:20::32b;\n envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x32b.google.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001,\n T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "From: Akihiko Odaki <akihiko.odaki@daynix.com>\n\nmisa_mxl_max is now a class member and initialized only once for each\nclass. This also moves the initialization of gdb_core_xml_file which\nwill be referenced before realization in the future.\n\nSigned-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>\nMessage-Id: <20231213-riscv-v7-4-a760156a337f@daynix.com>\nSigned-off-by: Alex Bennée <alex.bennee@linaro.org>\n---\n target/riscv/cpu.c | 21 +++++++++++++++++++++\n target/riscv/tcg/tcg-cpu.c | 23 -----------------------\n 2 files changed, 21 insertions(+), 23 deletions(-)", "diff": "diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c\nindex 2ab61df2217..b799f133604 100644\n--- a/target/riscv/cpu.c\n+++ b/target/riscv/cpu.c\n@@ -1247,6 +1247,26 @@ static const MISAExtInfo misa_ext_info_arr[] = {\n MISA_EXT_INFO(RVG, \"g\", \"General purpose (IMAFD_Zicsr_Zifencei)\"),\n };\n \n+static void riscv_cpu_validate_misa_mxl(RISCVCPUClass *mcc)\n+{\n+ CPUClass *cc = CPU_CLASS(mcc);\n+\n+ /* Validate that MISA_MXL is set properly. */\n+ switch (mcc->misa_mxl_max) {\n+#ifdef TARGET_RISCV64\n+ case MXL_RV64:\n+ case MXL_RV128:\n+ cc->gdb_core_xml_file = \"riscv-64bit-cpu.xml\";\n+ break;\n+#endif\n+ case MXL_RV32:\n+ cc->gdb_core_xml_file = \"riscv-32bit-cpu.xml\";\n+ break;\n+ default:\n+ g_assert_not_reached();\n+ }\n+}\n+\n static int riscv_validate_misa_info_idx(uint32_t bit)\n {\n int idx;\n@@ -1695,6 +1715,7 @@ static void riscv_cpu_class_init(ObjectClass *c, void *data)\n RISCVCPUClass *mcc = RISCV_CPU_CLASS(c);\n \n mcc->misa_mxl_max = (uint32_t)(uintptr_t)data;\n+ riscv_cpu_validate_misa_mxl(mcc);\n }\n \n static void riscv_isa_string_ext(RISCVCPU *cpu, char **isa_str,\ndiff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c\nindex 7f6712c81a4..eb243e011ca 100644\n--- a/target/riscv/tcg/tcg-cpu.c\n+++ b/target/riscv/tcg/tcg-cpu.c\n@@ -148,27 +148,6 @@ static void riscv_cpu_validate_misa_priv(CPURISCVState *env, Error **errp)\n }\n }\n \n-static void riscv_cpu_validate_misa_mxl(RISCVCPU *cpu)\n-{\n- RISCVCPUClass *mcc = RISCV_CPU_GET_CLASS(cpu);\n- CPUClass *cc = CPU_CLASS(mcc);\n-\n- /* Validate that MISA_MXL is set properly. */\n- switch (mcc->misa_mxl_max) {\n-#ifdef TARGET_RISCV64\n- case MXL_RV64:\n- case MXL_RV128:\n- cc->gdb_core_xml_file = \"riscv-64bit-cpu.xml\";\n- break;\n-#endif\n- case MXL_RV32:\n- cc->gdb_core_xml_file = \"riscv-32bit-cpu.xml\";\n- break;\n- default:\n- g_assert_not_reached();\n- }\n-}\n-\n static void riscv_cpu_validate_priv_spec(RISCVCPU *cpu, Error **errp)\n {\n CPURISCVState *env = &cpu->env;\n@@ -676,8 +655,6 @@ static bool tcg_cpu_realize(CPUState *cs, Error **errp)\n return false;\n }\n \n- riscv_cpu_validate_misa_mxl(cpu);\n-\n #ifndef CONFIG_USER_ONLY\n CPURISCVState *env = &cpu->env;\n Error *local_err = NULL;\n", "prefixes": [ "v2", "25/43" ] }