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GET /api/patches/1850809/?format=api
{ "id": 1850809, "url": "http://patchwork.ozlabs.org/api/patches/1850809/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20231018130716.286638-5-thuth@redhat.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20231018130716.286638-5-thuth@redhat.com>", "list_archive_url": null, "date": "2023-10-18T13:06:55", "name": "[PULL,04/25] target/s390x/cpu topology: handle STSI(15) and build the SYSIB", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "f08721e944ac8bc96d047e06da32f0393cd1f884", "submitter": { "id": 66152, "url": "http://patchwork.ozlabs.org/api/people/66152/?format=api", "name": "Thomas Huth", "email": "thuth@redhat.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20231018130716.286638-5-thuth@redhat.com/mbox/", "series": [ { "id": 378180, "url": "http://patchwork.ozlabs.org/api/series/378180/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=378180", "date": "2023-10-18T13:06:52", "name": "[PULL,01/25] qapi: machine.json: change docs regarding CPU topology", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/378180/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1850809/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1850809/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) 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(UTC)", "from thuth-p1g4.redhat.com (unknown [10.39.192.109])\n by smtp.corp.redhat.com (Postfix) with ESMTP id 001F120268C8;\n Wed, 18 Oct 2023 13:07:23 +0000 (UTC)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com;\n s=mimecast20190719; t=1697634454;\n h=from:from:reply-to:subject:subject:date:date:message-id:message-id:\n to:to:cc:cc:mime-version:mime-version:\n content-transfer-encoding:content-transfer-encoding:\n in-reply-to:in-reply-to:references:references;\n bh=eYZIDoXUgqMMUG170qmCsqPLVAsQw61bZvKJl4lJL0U=;\n b=INow6u8EPDcDmlu2M1cVYHV+hUxXEmtgd+SS+utOFB271zTSTzwU0m1roipJDnAwXJe9bi\n i1xELIU4PzWg4vPDbwhrlNVrtL33peqizrvbSuxjcJF1rhsad4w3ouxvW66kcy9ZmykBew\n 5+7/eey/y2gZbhKaPHJBAu6hTYVxZ1o=", "X-MC-Unique": "rwHVyy6RNI6gQ1vD8D2adA-1", "From": "Thomas Huth <thuth@redhat.com>", "To": "qemu-devel@nongnu.org", "Cc": "Stefan Hajnoczi <stefanha@redhat.com>, qemu-s390x@nongnu.org,\n Nina Schoetterl-Glausch <nsg@linux.ibm.com>", "Subject": "[PULL 04/25] target/s390x/cpu topology: handle STSI(15) and build the\n SYSIB", "Date": "Wed, 18 Oct 2023 15:06:55 +0200", "Message-ID": "<20231018130716.286638-5-thuth@redhat.com>", "In-Reply-To": "<20231018130716.286638-1-thuth@redhat.com>", "References": "<20231018130716.286638-1-thuth@redhat.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-Scanned-By": "MIMEDefang 3.4.1 on 10.11.54.4", "Received-SPF": "pass client-ip=170.10.129.124; envelope-from=thuth@redhat.com;\n helo=us-smtp-delivery-124.mimecast.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001,\n DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001,\n SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "From: Pierre Morel <pmorel@linux.ibm.com>\n\nOn interception of STSI(15.1.x) the System Information Block\n(SYSIB) is built from the list of pre-ordered topology entries.\n\nSigned-off-by: Pierre Morel <pmorel@linux.ibm.com>\nReviewed-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com>\nCo-developed-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com>\nReviewed-by: Thomas Huth <thuth@redhat.com>\nAcked-by: Markus Armbruster <armbru@redhat.com>\nSigned-off-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com>\nMessage-ID: <20231016183925.2384704-5-nsg@linux.ibm.com>\nSigned-off-by: Thomas Huth <thuth@redhat.com>\n---\n MAINTAINERS | 1 +\n qapi/machine-target.json | 14 ++\n include/hw/s390x/cpu-topology.h | 23 +++\n include/hw/s390x/sclp.h | 1 +\n target/s390x/cpu.h | 75 +++++++\n hw/s390x/cpu-topology.c | 2 +\n target/s390x/kvm/kvm.c | 5 +-\n target/s390x/kvm/stsi-topology.c | 334 +++++++++++++++++++++++++++++++\n target/s390x/kvm/meson.build | 3 +-\n 9 files changed, 456 insertions(+), 2 deletions(-)\n create mode 100644 target/s390x/kvm/stsi-topology.c", "diff": "diff --git a/MAINTAINERS b/MAINTAINERS\nindex 8e2e828f7c..cfc37e9af7 100644\n--- a/MAINTAINERS\n+++ b/MAINTAINERS\n@@ -1715,6 +1715,7 @@ M: Nina Schoetterl-Glausch <nsg@linux.ibm.com>\n S: Supported\n F: include/hw/s390x/cpu-topology.h\n F: hw/s390x/cpu-topology.c\n+F: target/s390x/kvm/stsi-topology.c\n \n X86 Machines\n ------------\ndiff --git a/qapi/machine-target.json b/qapi/machine-target.json\nindex f0a6b72414..93cbf1c128 100644\n--- a/qapi/machine-target.json\n+++ b/qapi/machine-target.json\n@@ -361,3 +361,17 @@\n 'TARGET_MIPS',\n 'TARGET_LOONGARCH64',\n 'TARGET_RISCV' ] } }\n+\n+##\n+# @CpuS390Polarization:\n+#\n+# An enumeration of CPU polarization that can be assumed by a virtual\n+# S390 CPU\n+#\n+# Since: 8.2\n+##\n+{ 'enum': 'CpuS390Polarization',\n+ 'prefix': 'S390_CPU_POLARIZATION',\n+ 'data': [ 'horizontal', 'vertical' ],\n+ 'if': 'TARGET_S390X'\n+}\ndiff --git a/include/hw/s390x/cpu-topology.h b/include/hw/s390x/cpu-topology.h\nindex 97b0af2795..f95d26d37c 100644\n--- a/include/hw/s390x/cpu-topology.h\n+++ b/include/hw/s390x/cpu-topology.h\n@@ -15,10 +15,33 @@\n #include \"hw/boards.h\"\n #include \"qapi/qapi-types-machine-target.h\"\n \n+#define S390_TOPOLOGY_CPU_IFL 0x03\n+\n+typedef struct S390TopologyId {\n+ uint8_t sentinel;\n+ uint8_t drawer;\n+ uint8_t book;\n+ uint8_t socket;\n+ uint8_t type;\n+ uint8_t vertical:1;\n+ uint8_t entitlement:2;\n+ uint8_t dedicated;\n+ uint8_t origin;\n+} S390TopologyId;\n+\n+typedef struct S390TopologyEntry {\n+ QTAILQ_ENTRY(S390TopologyEntry) next;\n+ S390TopologyId id;\n+ uint64_t mask;\n+} S390TopologyEntry;\n+\n typedef struct S390Topology {\n uint8_t *cores_per_socket;\n+ CpuS390Polarization polarization;\n } S390Topology;\n \n+typedef QTAILQ_HEAD(, S390TopologyEntry) S390TopologyList;\n+\n #ifdef CONFIG_KVM\n bool s390_has_topology(void);\n void s390_topology_setup_cpu(MachineState *ms, S390CPU *cpu, Error **errp);\ndiff --git a/include/hw/s390x/sclp.h b/include/hw/s390x/sclp.h\nindex cf1f2efae2..c49051e17e 100644\n--- a/include/hw/s390x/sclp.h\n+++ b/include/hw/s390x/sclp.h\n@@ -112,6 +112,7 @@ typedef struct CPUEntry {\n } QEMU_PACKED CPUEntry;\n \n #define SCLP_READ_SCP_INFO_FIXED_CPU_OFFSET 128\n+#define SCLP_READ_SCP_INFO_MNEST 2\n typedef struct ReadInfo {\n SCCBHeader h;\n uint16_t rnmax;\ndiff --git a/target/s390x/cpu.h b/target/s390x/cpu.h\nindex 56f9340914..09bff39fe4 100644\n--- a/target/s390x/cpu.h\n+++ b/target/s390x/cpu.h\n@@ -570,6 +570,29 @@ typedef struct SysIB_322 {\n } SysIB_322;\n QEMU_BUILD_BUG_ON(sizeof(SysIB_322) != 4096);\n \n+/*\n+ * Topology Magnitude fields (MAG) indicates the maximum number of\n+ * topology list entries (TLE) at the corresponding nesting level.\n+ */\n+#define S390_TOPOLOGY_MAG 6\n+#define S390_TOPOLOGY_MAG6 0\n+#define S390_TOPOLOGY_MAG5 1\n+#define S390_TOPOLOGY_MAG4 2\n+#define S390_TOPOLOGY_MAG3 3\n+#define S390_TOPOLOGY_MAG2 4\n+#define S390_TOPOLOGY_MAG1 5\n+/* Configuration topology */\n+typedef struct SysIB_151x {\n+ uint8_t reserved0[2];\n+ uint16_t length;\n+ uint8_t mag[S390_TOPOLOGY_MAG];\n+ uint8_t reserved1;\n+ uint8_t mnest;\n+ uint32_t reserved2;\n+ char tle[];\n+} SysIB_151x;\n+QEMU_BUILD_BUG_ON(sizeof(SysIB_151x) != 16);\n+\n typedef union SysIB {\n SysIB_111 sysib_111;\n SysIB_121 sysib_121;\n@@ -577,9 +600,61 @@ typedef union SysIB {\n SysIB_221 sysib_221;\n SysIB_222 sysib_222;\n SysIB_322 sysib_322;\n+ SysIB_151x sysib_151x;\n } SysIB;\n QEMU_BUILD_BUG_ON(sizeof(SysIB) != 4096);\n \n+/*\n+ * CPU Topology List provided by STSI with fc=15 provides a list\n+ * of two different Topology List Entries (TLE) types to specify\n+ * the topology hierarchy.\n+ *\n+ * - Container Topology List Entry\n+ * Defines a container to contain other Topology List Entries\n+ * of any type, nested containers or CPU.\n+ * - CPU Topology List Entry\n+ * Specifies the CPUs position, type, entitlement and polarization\n+ * of the CPUs contained in the last container TLE.\n+ *\n+ * There can be theoretically up to five levels of containers, QEMU\n+ * uses only three levels, the drawer's, book's and socket's level.\n+ *\n+ * A container with a nesting level (NL) greater than 1 can only\n+ * contain another container of nesting level NL-1.\n+ *\n+ * A container of nesting level 1 (socket), contains as many CPU TLE\n+ * as needed to describe the position and qualities of all CPUs inside\n+ * the container.\n+ * The qualities of a CPU are polarization, entitlement and type.\n+ *\n+ * The CPU TLE defines the position of the CPUs of identical qualities\n+ * using a 64bits mask which first bit has its offset defined by\n+ * the CPU address origin field of the CPU TLE like in:\n+ * CPU address = origin * 64 + bit position within the mask\n+ */\n+/* Container type Topology List Entry */\n+typedef struct SYSIBContainerListEntry {\n+ uint8_t nl;\n+ uint8_t reserved[6];\n+ uint8_t id;\n+} SYSIBContainerListEntry;\n+QEMU_BUILD_BUG_ON(sizeof(SYSIBContainerListEntry) != 8);\n+\n+/* CPU type Topology List Entry */\n+typedef struct SysIBCPUListEntry {\n+ uint8_t nl;\n+ uint8_t reserved0[3];\n+#define SYSIB_TLE_POLARITY_MASK 0x03\n+#define SYSIB_TLE_DEDICATED 0x04\n+ uint8_t flags;\n+ uint8_t type;\n+ uint16_t origin;\n+ uint64_t mask;\n+} SysIBCPUListEntry;\n+QEMU_BUILD_BUG_ON(sizeof(SysIBCPUListEntry) != 16);\n+\n+void insert_stsi_15_1_x(S390CPU *cpu, int sel2, uint64_t addr, uint8_t ar, uintptr_t ra);\n+\n /* MMU defines */\n #define ASCE_ORIGIN (~0xfffULL) /* segment table origin */\n #define ASCE_SUBSPACE 0x200 /* subspace group control */\ndiff --git a/hw/s390x/cpu-topology.c b/hw/s390x/cpu-topology.c\nindex cabd42e779..13168341b6 100644\n--- a/hw/s390x/cpu-topology.c\n+++ b/hw/s390x/cpu-topology.c\n@@ -28,10 +28,12 @@\n * s390_topology is used to keep the topology information.\n * .cores_per_socket: tracks information on the count of cores\n * per socket.\n+ * .polarization: tracks machine polarization.\n */\n S390Topology s390_topology = {\n /* will be initialized after the CPU model is realized */\n .cores_per_socket = NULL,\n+ .polarization = S390_CPU_POLARIZATION_HORIZONTAL,\n };\n \n /**\ndiff --git a/target/s390x/kvm/kvm.c b/target/s390x/kvm/kvm.c\nindex bc5c56a305..53d6300809 100644\n--- a/target/s390x/kvm/kvm.c\n+++ b/target/s390x/kvm/kvm.c\n@@ -1911,9 +1911,12 @@ static int handle_stsi(S390CPU *cpu)\n if (run->s390_stsi.sel1 != 2 || run->s390_stsi.sel2 != 2) {\n return 0;\n }\n- /* Only sysib 3.2.2 needs post-handling for now. */\n insert_stsi_3_2_2(cpu, run->s390_stsi.addr, run->s390_stsi.ar);\n return 0;\n+ case 15:\n+ insert_stsi_15_1_x(cpu, run->s390_stsi.sel2, run->s390_stsi.addr,\n+ run->s390_stsi.ar, RA_IGNORED);\n+ return 0;\n default:\n return 0;\n }\ndiff --git a/target/s390x/kvm/stsi-topology.c b/target/s390x/kvm/stsi-topology.c\nnew file mode 100644\nindex 0000000000..efd2aa71f1\n--- /dev/null\n+++ b/target/s390x/kvm/stsi-topology.c\n@@ -0,0 +1,334 @@\n+/* SPDX-License-Identifier: GPL-2.0-or-later */\n+/*\n+ * QEMU S390x CPU Topology\n+ *\n+ * Copyright IBM Corp. 2022, 2023\n+ * Author(s): Pierre Morel <pmorel@linux.ibm.com>\n+ *\n+ */\n+#include \"qemu/osdep.h\"\n+#include \"cpu.h\"\n+#include \"hw/s390x/sclp.h\"\n+#include \"hw/s390x/cpu-topology.h\"\n+\n+QEMU_BUILD_BUG_ON(S390_CPU_ENTITLEMENT_LOW != 1);\n+QEMU_BUILD_BUG_ON(S390_CPU_ENTITLEMENT_MEDIUM != 2);\n+QEMU_BUILD_BUG_ON(S390_CPU_ENTITLEMENT_HIGH != 3);\n+\n+/**\n+ * fill_container:\n+ * @p: The address of the container TLE to fill\n+ * @level: The level of nesting for this container\n+ * @id: The container receives a unique ID inside its own container\n+ *\n+ * Returns the next free TLE entry.\n+ */\n+static char *fill_container(char *p, int level, int id)\n+{\n+ SYSIBContainerListEntry *tle = (SYSIBContainerListEntry *)p;\n+\n+ tle->nl = level;\n+ tle->id = id;\n+ return p + sizeof(*tle);\n+}\n+\n+/**\n+ * fill_tle_cpu:\n+ * @p: The address of the CPU TLE to fill\n+ * @entry: a pointer to the S390TopologyEntry defining this\n+ * CPU container.\n+ *\n+ * Returns the next free TLE entry.\n+ */\n+static char *fill_tle_cpu(char *p, S390TopologyEntry *entry)\n+{\n+ SysIBCPUListEntry *tle = (SysIBCPUListEntry *)p;\n+ S390TopologyId topology_id = entry->id;\n+\n+ tle->nl = 0;\n+ tle->flags = 0;\n+ if (topology_id.vertical) {\n+ tle->flags |= topology_id.entitlement;\n+ }\n+ if (topology_id.dedicated) {\n+ tle->flags |= SYSIB_TLE_DEDICATED;\n+ }\n+ tle->type = topology_id.type;\n+ tle->origin = cpu_to_be16(topology_id.origin * 64);\n+ tle->mask = cpu_to_be64(entry->mask);\n+ return p + sizeof(*tle);\n+}\n+\n+/*\n+ * Macro to check that the size of data after increment\n+ * will not get bigger than the size of the SysIB.\n+ */\n+#define SYSIB_GUARD(data, x) do { \\\n+ data += x; \\\n+ if (data > sizeof(SysIB)) { \\\n+ return 0; \\\n+ } \\\n+ } while (0)\n+\n+/**\n+ * stsi_topology_fill_sysib:\n+ * @p: A pointer to the position of the first TLE\n+ * @level: The nested level wanted by the guest\n+ *\n+ * Fill the SYSIB with the topology information as described in\n+ * the PoP, nesting containers as appropriate, with the maximum\n+ * nesting limited by @level.\n+ *\n+ * Return value:\n+ * On success: the size of the SysIB_15x after being filled with TLE.\n+ * On error: 0 in the case we would overrun the end of the SysIB.\n+ */\n+static int stsi_topology_fill_sysib(S390TopologyList *topology_list,\n+ char *p, int level)\n+{\n+ S390TopologyEntry *entry;\n+ int last_drawer = -1;\n+ int last_book = -1;\n+ int last_socket = -1;\n+ int drawer_id = 0;\n+ int book_id = 0;\n+ int socket_id = 0;\n+ int n = sizeof(SysIB_151x);\n+\n+ QTAILQ_FOREACH(entry, topology_list, next) {\n+ bool drawer_change = last_drawer != entry->id.drawer;\n+ bool book_change = drawer_change || last_book != entry->id.book;\n+ bool socket_change = book_change || last_socket != entry->id.socket;\n+\n+ if (level > 3 && drawer_change) {\n+ SYSIB_GUARD(n, sizeof(SYSIBContainerListEntry));\n+ p = fill_container(p, 3, drawer_id++);\n+ book_id = 0;\n+ }\n+ if (level > 2 && book_change) {\n+ SYSIB_GUARD(n, sizeof(SYSIBContainerListEntry));\n+ p = fill_container(p, 2, book_id++);\n+ socket_id = 0;\n+ }\n+ if (socket_change) {\n+ SYSIB_GUARD(n, sizeof(SYSIBContainerListEntry));\n+ p = fill_container(p, 1, socket_id++);\n+ }\n+\n+ SYSIB_GUARD(n, sizeof(SysIBCPUListEntry));\n+ p = fill_tle_cpu(p, entry);\n+ last_drawer = entry->id.drawer;\n+ last_book = entry->id.book;\n+ last_socket = entry->id.socket;\n+ }\n+\n+ return n;\n+}\n+\n+/**\n+ * setup_stsi:\n+ * @topology_list: ordered list of groups of CPUs with same properties\n+ * @sysib: pointer to a SysIB to be filled with SysIB_151x data\n+ * @level: Nested level specified by the guest\n+ *\n+ * Setup the SYSIB for STSI 15.1, the header as well as the description\n+ * of the topology.\n+ */\n+static int setup_stsi(S390TopologyList *topology_list, SysIB_151x *sysib,\n+ int level)\n+{\n+ sysib->mnest = level;\n+ switch (level) {\n+ case 4:\n+ sysib->mag[S390_TOPOLOGY_MAG4] = current_machine->smp.drawers;\n+ sysib->mag[S390_TOPOLOGY_MAG3] = current_machine->smp.books;\n+ sysib->mag[S390_TOPOLOGY_MAG2] = current_machine->smp.sockets;\n+ sysib->mag[S390_TOPOLOGY_MAG1] = current_machine->smp.cores;\n+ break;\n+ case 3:\n+ sysib->mag[S390_TOPOLOGY_MAG3] = current_machine->smp.drawers *\n+ current_machine->smp.books;\n+ sysib->mag[S390_TOPOLOGY_MAG2] = current_machine->smp.sockets;\n+ sysib->mag[S390_TOPOLOGY_MAG1] = current_machine->smp.cores;\n+ break;\n+ case 2:\n+ sysib->mag[S390_TOPOLOGY_MAG2] = current_machine->smp.drawers *\n+ current_machine->smp.books *\n+ current_machine->smp.sockets;\n+ sysib->mag[S390_TOPOLOGY_MAG1] = current_machine->smp.cores;\n+ break;\n+ }\n+\n+ return stsi_topology_fill_sysib(topology_list, sysib->tle, level);\n+}\n+\n+/**\n+ * s390_topology_add_cpu_to_entry:\n+ * @entry: Topology entry to setup\n+ * @cpu: the S390CPU to add\n+ *\n+ * Set the core bit inside the topology mask.\n+ */\n+static void s390_topology_add_cpu_to_entry(S390TopologyEntry *entry,\n+ S390CPU *cpu)\n+{\n+ set_bit(63 - (cpu->env.core_id % 64), &entry->mask);\n+}\n+\n+/**\n+ * s390_topology_from_cpu:\n+ * @cpu: S390CPU to calculate the topology id\n+ *\n+ * Initialize the topology id from the CPU environment.\n+ */\n+static S390TopologyId s390_topology_from_cpu(S390CPU *cpu)\n+{\n+ S390TopologyId topology_id = {\n+ .drawer = cpu->env.drawer_id,\n+ .book = cpu->env.book_id,\n+ .socket = cpu->env.socket_id,\n+ .type = S390_TOPOLOGY_CPU_IFL,\n+ .vertical = s390_topology.polarization == S390_CPU_POLARIZATION_VERTICAL,\n+ .entitlement = cpu->env.entitlement,\n+ .dedicated = cpu->env.dedicated,\n+ .origin = cpu->env.core_id / 64,\n+ };\n+\n+ return topology_id;\n+}\n+\n+/**\n+ * s390_topology_id_cmp:\n+ * @l: first S390TopologyId\n+ * @r: second S390TopologyId\n+ *\n+ * Compare two topology ids according to the sorting order specified by the PoP.\n+ *\n+ * Returns a negative number if the first id is less than, 0 if it is equal to\n+ * and positive if it is larger than the second id.\n+ */\n+static int s390_topology_id_cmp(const S390TopologyId *l,\n+ const S390TopologyId *r)\n+{\n+ /*\n+ * lexical order, compare less significant values only if more significant\n+ * ones are equal\n+ */\n+ return l->sentinel - r->sentinel ?:\n+ l->drawer - r->drawer ?:\n+ l->book - r->book ?:\n+ l->socket - r->socket ?:\n+ l->type - r->type ?:\n+ /* logic is inverted for the next three */\n+ r->vertical - l->vertical ?:\n+ r->entitlement - l->entitlement ?:\n+ r->dedicated - l->dedicated ?:\n+ l->origin - r->origin;\n+}\n+\n+static bool s390_topology_id_eq(const S390TopologyId *l,\n+ const S390TopologyId *r)\n+{\n+ return !s390_topology_id_cmp(l, r);\n+}\n+\n+static bool s390_topology_id_lt(const S390TopologyId *l,\n+ const S390TopologyId *r)\n+{\n+ return s390_topology_id_cmp(l, r) < 0;\n+}\n+\n+/**\n+ * s390_topology_fill_list_sorted:\n+ * @topology_list: list to fill\n+ *\n+ * Create S390TopologyEntrys as appropriate from all CPUs and fill the\n+ * topology_list with the entries according to the order specified by the PoP.\n+ */\n+static void s390_topology_fill_list_sorted(S390TopologyList *topology_list)\n+{\n+ CPUState *cs;\n+ S390TopologyEntry sentinel = { .id.sentinel = 1 };\n+\n+ QTAILQ_INIT(topology_list);\n+\n+ QTAILQ_INSERT_HEAD(topology_list, &sentinel, next);\n+\n+ CPU_FOREACH(cs) {\n+ S390TopologyId id = s390_topology_from_cpu(S390_CPU(cs));\n+ S390TopologyEntry *entry = NULL, *tmp;\n+\n+ QTAILQ_FOREACH(tmp, topology_list, next) {\n+ if (s390_topology_id_eq(&id, &tmp->id)) {\n+ entry = tmp;\n+ break;\n+ } else if (s390_topology_id_lt(&id, &tmp->id)) {\n+ entry = g_malloc0(sizeof(*entry));\n+ entry->id = id;\n+ QTAILQ_INSERT_BEFORE(tmp, entry, next);\n+ break;\n+ }\n+ }\n+ assert(entry);\n+ s390_topology_add_cpu_to_entry(entry, S390_CPU(cs));\n+ }\n+\n+ QTAILQ_REMOVE(topology_list, &sentinel, next);\n+}\n+\n+/**\n+ * s390_topology_empty_list:\n+ *\n+ * Clear all entries in the S390Topology list.\n+ */\n+static void s390_topology_empty_list(S390TopologyList *topology_list)\n+{\n+ S390TopologyEntry *entry = NULL;\n+ S390TopologyEntry *tmp = NULL;\n+\n+ QTAILQ_FOREACH_SAFE(entry, topology_list, next, tmp) {\n+ QTAILQ_REMOVE(topology_list, entry, next);\n+ g_free(entry);\n+ }\n+}\n+\n+/**\n+ * insert_stsi_15_1_x:\n+ * @cpu: the CPU doing the call for which we set CC\n+ * @sel2: the selector 2, containing the nested level\n+ * @addr: Guest logical address of the guest SysIB\n+ * @ar: the access register number\n+ * @ra: the return address\n+ *\n+ * Emulate STSI 15.1.x, that is, perform all necessary checks and\n+ * fill the SYSIB.\n+ * In case the topology description is too long to fit into the SYSIB,\n+ * set CC=3 and abort without writing the SYSIB.\n+ */\n+void insert_stsi_15_1_x(S390CPU *cpu, int sel2, uint64_t addr, uint8_t ar, uintptr_t ra)\n+{\n+ S390TopologyList topology_list;\n+ SysIB sysib = {0};\n+ int length;\n+\n+ if (!s390_has_topology() || sel2 < 2 || sel2 > SCLP_READ_SCP_INFO_MNEST) {\n+ setcc(cpu, 3);\n+ return;\n+ }\n+\n+ s390_topology_fill_list_sorted(&topology_list);\n+ length = setup_stsi(&topology_list, &sysib.sysib_151x, sel2);\n+ s390_topology_empty_list(&topology_list);\n+\n+ if (!length) {\n+ setcc(cpu, 3);\n+ return;\n+ }\n+\n+ sysib.sysib_151x.length = cpu_to_be16(length);\n+ if (!s390_cpu_virt_mem_write(cpu, addr, ar, &sysib, length)) {\n+ setcc(cpu, 0);\n+ } else {\n+ s390_cpu_virt_mem_handle_exc(cpu, ra);\n+ }\n+}\ndiff --git a/target/s390x/kvm/meson.build b/target/s390x/kvm/meson.build\nindex d6aca590ae..588a9aa737 100644\n--- a/target/s390x/kvm/meson.build\n+++ b/target/s390x/kvm/meson.build\n@@ -1,7 +1,8 @@\n \n s390x_ss.add(when: 'CONFIG_KVM', if_true: files(\n 'pv.c',\n- 'kvm.c'\n+ 'kvm.c',\n+ 'stsi-topology.c'\n ), if_false: files(\n 'stubs.c'\n ))\n", "prefixes": [ "PULL", "04/25" ] }