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GET /api/patches/1825238/?format=api
{ "id": 1825238, "url": "http://patchwork.ozlabs.org/api/patches/1825238/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20230824092409.1492470-26-gaosong@loongson.cn/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20230824092409.1492470-26-gaosong@loongson.cn>", "list_archive_url": null, "date": "2023-08-24T09:24:03", "name": "[PULL,25/31] target/loongarch: Add avail_LAM to check atomic instructions", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "f5ea749262451b585271d96cc9132cdfa589db81", "submitter": { "id": 82024, "url": "http://patchwork.ozlabs.org/api/people/82024/?format=api", "name": "gaosong", "email": "gaosong@loongson.cn" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20230824092409.1492470-26-gaosong@loongson.cn/mbox/", "series": [ { "id": 370173, "url": "http://patchwork.ozlabs.org/api/series/370173/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=370173", "date": "2023-08-24T09:23:41", "name": "[PULL,01/31] target/loongarch: Log I/O write accesses to CSR registers", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/370173/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1825238/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1825238/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)", "Received": [ "from lists.gnu.org (lists.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4RWd8B01ZRz1yfF\n\tfor <incoming@patchwork.ozlabs.org>; Thu, 24 Aug 2023 19:29:29 +1000 (AEST)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1qZ6ap-0005si-DF; Thu, 24 Aug 2023 05:25:31 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <gaosong@loongson.cn>)\n id 1qZ6aK-0004FK-QS\n for qemu-devel@nongnu.org; Thu, 24 Aug 2023 05:25:10 -0400", "from mail.loongson.cn ([114.242.206.163])\n by eggs.gnu.org with esmtp (Exim 4.90_1)\n (envelope-from <gaosong@loongson.cn>) id 1qZ6aE-0003jL-1V\n for qemu-devel@nongnu.org; Thu, 24 Aug 2023 05:24:59 -0400", "from loongson.cn (unknown [10.2.5.185])\n by gateway (Coremail) with SMTP id _____8DxRvHHIedkk3kbAA--.56132S3;\n Thu, 24 Aug 2023 17:24:23 +0800 (CST)", "from localhost.localdomain (unknown [10.2.5.185])\n by localhost.localdomain (Coremail) with SMTP id\n AQAAf8DxJ826IedkJjhiAA--.40637S27;\n Thu, 24 Aug 2023 17:24:22 +0800 (CST)" ], "From": "Song Gao <gaosong@loongson.cn>", "To": "qemu-devel@nongnu.org", "Cc": "stefanha@redhat.com,\n\trichard.henderson@linaro.org", "Subject": "[PULL 25/31] target/loongarch: Add avail_LAM to check atomic\n instructions", "Date": "Thu, 24 Aug 2023 17:24:03 +0800", "Message-Id": "<20230824092409.1492470-26-gaosong@loongson.cn>", "X-Mailer": "git-send-email 2.39.1", "In-Reply-To": "<20230824092409.1492470-1-gaosong@loongson.cn>", "References": "<20230824092409.1492470-1-gaosong@loongson.cn>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-CM-TRANSID": "AQAAf8DxJ826IedkJjhiAA--.40637S27", "X-CM-SenderInfo": "5jdr20tqj6z05rqj20fqof0/", "X-Coremail-Antispam": "1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7\n ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx\n nUUI43ZEXa7xR_UUUUUUUUU==", "Received-SPF": "pass client-ip=114.242.206.163;\n envelope-from=gaosong@loongson.cn;\n helo=mail.loongson.cn", "X-Spam_score_int": "-18", "X-Spam_score": "-1.9", "X-Spam_bar": "-", "X-Spam_report": "(-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "Signed-off-by: Song Gao <gaosong@loongson.cn>\nReviewed-by: Richard Henderson <richard.henderson@linaro.org>\nMessage-ID: <20230822032724.1353391-14-gaosong@loongson.cn>\nMessage-Id: <20230822071959.35620-8-philmd@linaro.org>\n---\n .../loongarch/insn_trans/trans_atomic.c.inc | 72 +++++++++----------\n target/loongarch/translate.h | 1 +\n 2 files changed, 37 insertions(+), 36 deletions(-)", "diff": "diff --git a/target/loongarch/insn_trans/trans_atomic.c.inc b/target/loongarch/insn_trans/trans_atomic.c.inc\nindex 194818d74d..40085190f6 100644\n--- a/target/loongarch/insn_trans/trans_atomic.c.inc\n+++ b/target/loongarch/insn_trans/trans_atomic.c.inc\n@@ -73,39 +73,39 @@ TRANS(ll_w, ALL, gen_ll, MO_TESL)\n TRANS(sc_w, ALL, gen_sc, MO_TESL)\n TRANS(ll_d, 64, gen_ll, MO_TEUQ)\n TRANS(sc_d, 64, gen_sc, MO_TEUQ)\n-TRANS(amswap_w, 64, gen_am, tcg_gen_atomic_xchg_tl, MO_TESL)\n-TRANS(amswap_d, 64, gen_am, tcg_gen_atomic_xchg_tl, MO_TEUQ)\n-TRANS(amadd_w, 64, gen_am, tcg_gen_atomic_fetch_add_tl, MO_TESL)\n-TRANS(amadd_d, 64, gen_am, tcg_gen_atomic_fetch_add_tl, MO_TEUQ)\n-TRANS(amand_w, 64, gen_am, tcg_gen_atomic_fetch_and_tl, MO_TESL)\n-TRANS(amand_d, 64, gen_am, tcg_gen_atomic_fetch_and_tl, MO_TEUQ)\n-TRANS(amor_w, 64, gen_am, tcg_gen_atomic_fetch_or_tl, MO_TESL)\n-TRANS(amor_d, 64, gen_am, tcg_gen_atomic_fetch_or_tl, MO_TEUQ)\n-TRANS(amxor_w, 64, gen_am, tcg_gen_atomic_fetch_xor_tl, MO_TESL)\n-TRANS(amxor_d, 64, gen_am, tcg_gen_atomic_fetch_xor_tl, MO_TEUQ)\n-TRANS(ammax_w, 64, gen_am, tcg_gen_atomic_fetch_smax_tl, MO_TESL)\n-TRANS(ammax_d, 64, gen_am, tcg_gen_atomic_fetch_smax_tl, MO_TEUQ)\n-TRANS(ammin_w, 64, gen_am, tcg_gen_atomic_fetch_smin_tl, MO_TESL)\n-TRANS(ammin_d, 64, gen_am, tcg_gen_atomic_fetch_smin_tl, MO_TEUQ)\n-TRANS(ammax_wu, 64, gen_am, tcg_gen_atomic_fetch_umax_tl, MO_TESL)\n-TRANS(ammax_du, 64, gen_am, tcg_gen_atomic_fetch_umax_tl, MO_TEUQ)\n-TRANS(ammin_wu, 64, gen_am, tcg_gen_atomic_fetch_umin_tl, MO_TESL)\n-TRANS(ammin_du, 64, gen_am, tcg_gen_atomic_fetch_umin_tl, MO_TEUQ)\n-TRANS(amswap_db_w, 64, gen_am, tcg_gen_atomic_xchg_tl, MO_TESL)\n-TRANS(amswap_db_d, 64, gen_am, tcg_gen_atomic_xchg_tl, MO_TEUQ)\n-TRANS(amadd_db_w, 64, gen_am, tcg_gen_atomic_fetch_add_tl, MO_TESL)\n-TRANS(amadd_db_d, 64, gen_am, tcg_gen_atomic_fetch_add_tl, MO_TEUQ)\n-TRANS(amand_db_w, 64, gen_am, tcg_gen_atomic_fetch_and_tl, MO_TESL)\n-TRANS(amand_db_d, 64, gen_am, tcg_gen_atomic_fetch_and_tl, MO_TEUQ)\n-TRANS(amor_db_w, 64, gen_am, tcg_gen_atomic_fetch_or_tl, MO_TESL)\n-TRANS(amor_db_d, 64, gen_am, tcg_gen_atomic_fetch_or_tl, MO_TEUQ)\n-TRANS(amxor_db_w, 64, gen_am, tcg_gen_atomic_fetch_xor_tl, MO_TESL)\n-TRANS(amxor_db_d, 64, gen_am, tcg_gen_atomic_fetch_xor_tl, MO_TEUQ)\n-TRANS(ammax_db_w, 64, gen_am, tcg_gen_atomic_fetch_smax_tl, MO_TESL)\n-TRANS(ammax_db_d, 64, gen_am, tcg_gen_atomic_fetch_smax_tl, MO_TEUQ)\n-TRANS(ammin_db_w, 64, gen_am, tcg_gen_atomic_fetch_smin_tl, MO_TESL)\n-TRANS(ammin_db_d, 64, gen_am, tcg_gen_atomic_fetch_smin_tl, MO_TEUQ)\n-TRANS(ammax_db_wu, 64, gen_am, tcg_gen_atomic_fetch_umax_tl, MO_TESL)\n-TRANS(ammax_db_du, 64, gen_am, tcg_gen_atomic_fetch_umax_tl, MO_TEUQ)\n-TRANS(ammin_db_wu, 64, gen_am, tcg_gen_atomic_fetch_umin_tl, MO_TESL)\n-TRANS(ammin_db_du, 64, gen_am, tcg_gen_atomic_fetch_umin_tl, MO_TEUQ)\n+TRANS(amswap_w, LAM, gen_am, tcg_gen_atomic_xchg_tl, MO_TESL)\n+TRANS(amswap_d, LAM, gen_am, tcg_gen_atomic_xchg_tl, MO_TEUQ)\n+TRANS(amadd_w, LAM, gen_am, tcg_gen_atomic_fetch_add_tl, MO_TESL)\n+TRANS(amadd_d, LAM, gen_am, tcg_gen_atomic_fetch_add_tl, MO_TEUQ)\n+TRANS(amand_w, LAM, gen_am, tcg_gen_atomic_fetch_and_tl, MO_TESL)\n+TRANS(amand_d, LAM, gen_am, tcg_gen_atomic_fetch_and_tl, MO_TEUQ)\n+TRANS(amor_w, LAM, gen_am, tcg_gen_atomic_fetch_or_tl, MO_TESL)\n+TRANS(amor_d, LAM, gen_am, tcg_gen_atomic_fetch_or_tl, MO_TEUQ)\n+TRANS(amxor_w, LAM, gen_am, tcg_gen_atomic_fetch_xor_tl, MO_TESL)\n+TRANS(amxor_d, LAM, gen_am, tcg_gen_atomic_fetch_xor_tl, MO_TEUQ)\n+TRANS(ammax_w, LAM, gen_am, tcg_gen_atomic_fetch_smax_tl, MO_TESL)\n+TRANS(ammax_d, LAM, gen_am, tcg_gen_atomic_fetch_smax_tl, MO_TEUQ)\n+TRANS(ammin_w, LAM, gen_am, tcg_gen_atomic_fetch_smin_tl, MO_TESL)\n+TRANS(ammin_d, LAM, gen_am, tcg_gen_atomic_fetch_smin_tl, MO_TEUQ)\n+TRANS(ammax_wu, LAM, gen_am, tcg_gen_atomic_fetch_umax_tl, MO_TESL)\n+TRANS(ammax_du, LAM, gen_am, tcg_gen_atomic_fetch_umax_tl, MO_TEUQ)\n+TRANS(ammin_wu, LAM, gen_am, tcg_gen_atomic_fetch_umin_tl, MO_TESL)\n+TRANS(ammin_du, LAM, gen_am, tcg_gen_atomic_fetch_umin_tl, MO_TEUQ)\n+TRANS(amswap_db_w, LAM, gen_am, tcg_gen_atomic_xchg_tl, MO_TESL)\n+TRANS(amswap_db_d, LAM, gen_am, tcg_gen_atomic_xchg_tl, MO_TEUQ)\n+TRANS(amadd_db_w, LAM, gen_am, tcg_gen_atomic_fetch_add_tl, MO_TESL)\n+TRANS(amadd_db_d, LAM, gen_am, tcg_gen_atomic_fetch_add_tl, MO_TEUQ)\n+TRANS(amand_db_w, LAM, gen_am, tcg_gen_atomic_fetch_and_tl, MO_TESL)\n+TRANS(amand_db_d, LAM, gen_am, tcg_gen_atomic_fetch_and_tl, MO_TEUQ)\n+TRANS(amor_db_w, LAM, gen_am, tcg_gen_atomic_fetch_or_tl, MO_TESL)\n+TRANS(amor_db_d, LAM, gen_am, tcg_gen_atomic_fetch_or_tl, MO_TEUQ)\n+TRANS(amxor_db_w, LAM, gen_am, tcg_gen_atomic_fetch_xor_tl, MO_TESL)\n+TRANS(amxor_db_d, LAM, gen_am, tcg_gen_atomic_fetch_xor_tl, MO_TEUQ)\n+TRANS(ammax_db_w, LAM, gen_am, tcg_gen_atomic_fetch_smax_tl, MO_TESL)\n+TRANS(ammax_db_d, LAM, gen_am, tcg_gen_atomic_fetch_smax_tl, MO_TEUQ)\n+TRANS(ammin_db_w, LAM, gen_am, tcg_gen_atomic_fetch_smin_tl, MO_TESL)\n+TRANS(ammin_db_d, LAM, gen_am, tcg_gen_atomic_fetch_smin_tl, MO_TEUQ)\n+TRANS(ammax_db_wu, LAM, gen_am, tcg_gen_atomic_fetch_umax_tl, MO_TESL)\n+TRANS(ammax_db_du, LAM, gen_am, tcg_gen_atomic_fetch_umax_tl, MO_TEUQ)\n+TRANS(ammin_db_wu, LAM, gen_am, tcg_gen_atomic_fetch_umin_tl, MO_TESL)\n+TRANS(ammin_db_du, LAM, gen_am, tcg_gen_atomic_fetch_umin_tl, MO_TEUQ)\ndiff --git a/target/loongarch/translate.h b/target/loongarch/translate.h\nindex f0d7b82932..faf4ce87f9 100644\n--- a/target/loongarch/translate.h\n+++ b/target/loongarch/translate.h\n@@ -21,6 +21,7 @@\n #define avail_FP_SP(C) (FIELD_EX32((C)->cpucfg2, CPUCFG2, FP_SP))\n #define avail_FP_DP(C) (FIELD_EX32((C)->cpucfg2, CPUCFG2, FP_DP))\n #define avail_LSPW(C) (FIELD_EX32((C)->cpucfg2, CPUCFG2, LSPW))\n+#define avail_LAM(C) (FIELD_EX32((C)->cpucfg2, CPUCFG2, LAM))\n \n /*\n * If an operation is being performed on less than TARGET_LONG_BITS,\n", "prefixes": [ "PULL", "25/31" ] }