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GET /api/patches/1825237/?format=api
{ "id": 1825237, "url": "http://patchwork.ozlabs.org/api/patches/1825237/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20230824092409.1492470-17-gaosong@loongson.cn/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20230824092409.1492470-17-gaosong@loongson.cn>", "list_archive_url": null, "date": "2023-08-24T09:23:54", "name": "[PULL,16/31] target/loongarch: Extract set_pc() helper", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "b2a01acd29d4e38d073780691a4d016434691764", "submitter": { "id": 82024, "url": "http://patchwork.ozlabs.org/api/people/82024/?format=api", "name": "gaosong", "email": "gaosong@loongson.cn" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20230824092409.1492470-17-gaosong@loongson.cn/mbox/", "series": [ { "id": 370173, "url": "http://patchwork.ozlabs.org/api/series/370173/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=370173", "date": "2023-08-24T09:23:41", "name": "[PULL,01/31] target/loongarch: Log I/O write accesses to CSR registers", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/370173/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1825237/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1825237/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)", "Received": [ "from lists.gnu.org (lists.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4RWd822lwLz1yfF\n\tfor <incoming@patchwork.ozlabs.org>; Thu, 24 Aug 2023 19:29:22 +1000 (AEST)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1qZ6am-0005FM-5o; Thu, 24 Aug 2023 05:25:28 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <gaosong@loongson.cn>)\n id 1qZ6a8-00042T-4g\n for qemu-devel@nongnu.org; Thu, 24 Aug 2023 05:24:53 -0400", "from mail.loongson.cn ([114.242.206.163])\n by eggs.gnu.org with esmtp (Exim 4.90_1)\n (envelope-from <gaosong@loongson.cn>) id 1qZ6a3-0003az-Fh\n for qemu-devel@nongnu.org; Thu, 24 Aug 2023 05:24:47 -0400", "from loongson.cn (unknown [10.2.5.185])\n by gateway (Coremail) with SMTP id _____8DxRvHDIedkaHkbAA--.56130S3;\n Thu, 24 Aug 2023 17:24:19 +0800 (CST)", "from localhost.localdomain (unknown [10.2.5.185])\n by localhost.localdomain (Coremail) with SMTP id\n AQAAf8DxJ826IedkJjhiAA--.40637S18;\n Thu, 24 Aug 2023 17:24:19 +0800 (CST)" ], "From": "Song Gao <gaosong@loongson.cn>", "To": "qemu-devel@nongnu.org", "Cc": "stefanha@redhat.com, richard.henderson@linaro.org, Jiajie Chen <c@jia.je>,\n\t=?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= <philmd@linaro.org>", "Subject": "[PULL 16/31] target/loongarch: Extract set_pc() helper", "Date": "Thu, 24 Aug 2023 17:23:54 +0800", "Message-Id": "<20230824092409.1492470-17-gaosong@loongson.cn>", "X-Mailer": "git-send-email 2.39.1", "In-Reply-To": "<20230824092409.1492470-1-gaosong@loongson.cn>", "References": "<20230824092409.1492470-1-gaosong@loongson.cn>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=UTF-8", "Content-Transfer-Encoding": "8bit", "X-CM-TRANSID": "AQAAf8DxJ826IedkJjhiAA--.40637S18", "X-CM-SenderInfo": "5jdr20tqj6z05rqj20fqof0/", "X-Coremail-Antispam": "1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7\n ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx\n nUUI43ZEXa7xR_UUUUUUUUU==", "Received-SPF": "pass client-ip=114.242.206.163;\n envelope-from=gaosong@loongson.cn;\n helo=mail.loongson.cn", "X-Spam_score_int": "-18", "X-Spam_score": "-1.9", "X-Spam_bar": "-", "X-Spam_report": "(-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "From: Jiajie Chen <c@jia.je>\n\nSigned-off-by: Jiajie Chen <c@jia.je>\nCo-authored-by: Richard Henderson <richard.henderson@linaro.org>\nReviewed-by: Richard Henderson <richard.henderson@linaro.org>\nSigned-off-by: Song Gao <gaosong@loongson.cn>\nReviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>\nMessage-ID: <20230822032724.1353391-6-gaosong@loongson.cn>\n[PMD: Extract helper from bigger patch]\nSigned-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>\nMessage-Id: <20230822071405.35386-9-philmd@linaro.org>\n---\n target/loongarch/cpu.c | 16 ++++++++--------\n target/loongarch/cpu.h | 5 +++++\n target/loongarch/gdbstub.c | 2 +-\n target/loongarch/op_helper.c | 4 ++--\n 4 files changed, 16 insertions(+), 11 deletions(-)", "diff": "diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c\nindex 822f2a72e5..67eb6c3135 100644\n--- a/target/loongarch/cpu.c\n+++ b/target/loongarch/cpu.c\n@@ -81,7 +81,7 @@ static void loongarch_cpu_set_pc(CPUState *cs, vaddr value)\n LoongArchCPU *cpu = LOONGARCH_CPU(cs);\n CPULoongArchState *env = &cpu->env;\n \n- env->pc = value;\n+ set_pc(env, value);\n }\n \n static vaddr loongarch_cpu_get_pc(CPUState *cs)\n@@ -168,7 +168,7 @@ static void loongarch_cpu_do_interrupt(CPUState *cs)\n set_DERA:\n env->CSR_DERA = env->pc;\n env->CSR_DBG = FIELD_DP64(env->CSR_DBG, CSR_DBG, DST, 1);\n- env->pc = env->CSR_EENTRY + 0x480;\n+ set_pc(env, env->CSR_EENTRY + 0x480);\n break;\n case EXCCODE_INT:\n if (FIELD_EX64(env->CSR_DBG, CSR_DBG, DST)) {\n@@ -249,7 +249,8 @@ static void loongarch_cpu_do_interrupt(CPUState *cs)\n \n /* Find the highest-priority interrupt. */\n vector = 31 - clz32(pending);\n- env->pc = env->CSR_EENTRY + (EXCCODE_EXTERNAL_INT + vector) * vec_size;\n+ set_pc(env, env->CSR_EENTRY + \\\n+ (EXCCODE_EXTERNAL_INT + vector) * vec_size);\n qemu_log_mask(CPU_LOG_INT,\n \"%s: PC \" TARGET_FMT_lx \" ERA \" TARGET_FMT_lx\n \" cause %d\\n\" \" A \" TARGET_FMT_lx \" D \"\n@@ -260,10 +261,9 @@ static void loongarch_cpu_do_interrupt(CPUState *cs)\n env->CSR_ECFG, env->CSR_ESTAT);\n } else {\n if (tlbfill) {\n- env->pc = env->CSR_TLBRENTRY;\n+ set_pc(env, env->CSR_TLBRENTRY);\n } else {\n- env->pc = env->CSR_EENTRY;\n- env->pc += EXCODE_MCODE(cause) * vec_size;\n+ set_pc(env, env->CSR_EENTRY + EXCODE_MCODE(cause) * vec_size);\n }\n qemu_log_mask(CPU_LOG_INT,\n \"%s: PC \" TARGET_FMT_lx \" ERA \" TARGET_FMT_lx\n@@ -324,7 +324,7 @@ static void loongarch_cpu_synchronize_from_tb(CPUState *cs,\n CPULoongArchState *env = &cpu->env;\n \n tcg_debug_assert(!(cs->tcg_cflags & CF_PCREL));\n- env->pc = tb->pc;\n+ set_pc(env, tb->pc);\n }\n \n static void loongarch_restore_state_to_opc(CPUState *cs,\n@@ -334,7 +334,7 @@ static void loongarch_restore_state_to_opc(CPUState *cs,\n LoongArchCPU *cpu = LOONGARCH_CPU(cs);\n CPULoongArchState *env = &cpu->env;\n \n- env->pc = data[0];\n+ set_pc(env, data[0]);\n }\n #endif /* CONFIG_TCG */\n \ndiff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h\nindex 72109095e4..e1562695e8 100644\n--- a/target/loongarch/cpu.h\n+++ b/target/loongarch/cpu.h\n@@ -443,6 +443,11 @@ static inline bool is_va32(CPULoongArchState *env)\n return va32;\n }\n \n+static inline void set_pc(CPULoongArchState *env, uint64_t value)\n+{\n+ env->pc = value;\n+}\n+\n /*\n * LoongArch CPUs hardware flags.\n */\ndiff --git a/target/loongarch/gdbstub.c b/target/loongarch/gdbstub.c\nindex a462e25737..e20b20f99b 100644\n--- a/target/loongarch/gdbstub.c\n+++ b/target/loongarch/gdbstub.c\n@@ -77,7 +77,7 @@ int loongarch_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)\n env->gpr[n] = tmp;\n length = read_length;\n } else if (n == 33) {\n- env->pc = tmp;\n+ set_pc(env, tmp);\n length = read_length;\n }\n return length;\ndiff --git a/target/loongarch/op_helper.c b/target/loongarch/op_helper.c\nindex 60335a05e2..cf84f20aba 100644\n--- a/target/loongarch/op_helper.c\n+++ b/target/loongarch/op_helper.c\n@@ -114,14 +114,14 @@ void helper_ertn(CPULoongArchState *env)\n env->CSR_TLBRERA = FIELD_DP64(env->CSR_TLBRERA, CSR_TLBRERA, ISTLBR, 0);\n env->CSR_CRMD = FIELD_DP64(env->CSR_CRMD, CSR_CRMD, DA, 0);\n env->CSR_CRMD = FIELD_DP64(env->CSR_CRMD, CSR_CRMD, PG, 1);\n- env->pc = env->CSR_TLBRERA;\n+ set_pc(env, env->CSR_TLBRERA);\n qemu_log_mask(CPU_LOG_INT, \"%s: TLBRERA \" TARGET_FMT_lx \"\\n\",\n __func__, env->CSR_TLBRERA);\n } else {\n csr_pplv = FIELD_EX64(env->CSR_PRMD, CSR_PRMD, PPLV);\n csr_pie = FIELD_EX64(env->CSR_PRMD, CSR_PRMD, PIE);\n \n- env->pc = env->CSR_ERA;\n+ set_pc(env, env->CSR_ERA);\n qemu_log_mask(CPU_LOG_INT, \"%s: ERA \" TARGET_FMT_lx \"\\n\",\n __func__, env->CSR_ERA);\n }\n", "prefixes": [ "PULL", "16/31" ] }