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GET /api/patches/1825214/?format=api
{ "id": 1825214, "url": "http://patchwork.ozlabs.org/api/patches/1825214/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20230824092409.1492470-12-gaosong@loongson.cn/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20230824092409.1492470-12-gaosong@loongson.cn>", "list_archive_url": null, "date": "2023-08-24T09:23:49", "name": "[PULL,11/31] target/loongarch: Support LoongArch32 VPPN", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "f9f244b21382ff9876effca6ee6babcf3f13ff20", "submitter": { "id": 82024, "url": "http://patchwork.ozlabs.org/api/people/82024/?format=api", "name": "gaosong", "email": "gaosong@loongson.cn" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20230824092409.1492470-12-gaosong@loongson.cn/mbox/", "series": [ { "id": 370173, "url": "http://patchwork.ozlabs.org/api/series/370173/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=370173", "date": "2023-08-24T09:23:41", "name": "[PULL,01/31] target/loongarch: Log I/O write accesses to CSR registers", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/370173/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1825214/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1825214/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)", "Received": [ "from lists.gnu.org (lists.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4RWd3t4BPyz1yfF\n\tfor <incoming@patchwork.ozlabs.org>; Thu, 24 Aug 2023 19:25:46 +1000 (AEST)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1qZ6ao-0005Wu-9E; Thu, 24 Aug 2023 05:25:30 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <gaosong@loongson.cn>)\n id 1qZ6a0-0003zm-J0\n for qemu-devel@nongnu.org; Thu, 24 Aug 2023 05:24:45 -0400", "from mail.loongson.cn ([114.242.206.163])\n by eggs.gnu.org with esmtp (Exim 4.90_1)\n (envelope-from <gaosong@loongson.cn>) id 1qZ6Zx-0003UP-OC\n for qemu-devel@nongnu.org; Thu, 24 Aug 2023 05:24:40 -0400", "from loongson.cn (unknown [10.2.5.185])\n by gateway (Coremail) with SMTP id _____8Cxc_DBIedkVXkbAA--.56252S3;\n Thu, 24 Aug 2023 17:24:17 +0800 (CST)", "from localhost.localdomain (unknown [10.2.5.185])\n by localhost.localdomain (Coremail) with SMTP id\n AQAAf8DxJ826IedkJjhiAA--.40637S13;\n Thu, 24 Aug 2023 17:24:17 +0800 (CST)" ], "From": "Song Gao <gaosong@loongson.cn>", "To": "qemu-devel@nongnu.org", "Cc": "stefanha@redhat.com, richard.henderson@linaro.org, Jiajie Chen <c@jia.je>", "Subject": "[PULL 11/31] target/loongarch: Support LoongArch32 VPPN", "Date": "Thu, 24 Aug 2023 17:23:49 +0800", "Message-Id": "<20230824092409.1492470-12-gaosong@loongson.cn>", "X-Mailer": "git-send-email 2.39.1", "In-Reply-To": "<20230824092409.1492470-1-gaosong@loongson.cn>", "References": "<20230824092409.1492470-1-gaosong@loongson.cn>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-CM-TRANSID": "AQAAf8DxJ826IedkJjhiAA--.40637S13", "X-CM-SenderInfo": "5jdr20tqj6z05rqj20fqof0/", "X-Coremail-Antispam": "1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7\n ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx\n nUUI43ZEXa7xR_UUUUUUUUU==", "Received-SPF": "pass client-ip=114.242.206.163;\n envelope-from=gaosong@loongson.cn;\n helo=mail.loongson.cn", "X-Spam_score_int": "-18", "X-Spam_score": "-1.9", "X-Spam_bar": "-", "X-Spam_report": "(-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "From: Jiajie Chen <c@jia.je>\n\nVPPN of TLBEHI/TLBREHI is limited to 19 bits in LA32.\n\nSigned-off-by: Jiajie Chen <c@jia.je>\nReviewed-by: Richard Henderson <richard.henderson@linaro.org>\nSigned-off-by: Song Gao <gaosong@loongson.cn>\nMessage-ID: <20230822032724.1353391-4-gaosong@loongson.cn>\nMessage-Id: <20230822071405.35386-4-philmd@linaro.org>\n---\n target/loongarch/cpu-csr.h | 6 ++++--\n target/loongarch/tlb_helper.c | 23 ++++++++++++++++++-----\n 2 files changed, 22 insertions(+), 7 deletions(-)", "diff": "diff --git a/target/loongarch/cpu-csr.h b/target/loongarch/cpu-csr.h\nindex b93f99a9ef..c59d7a9fcb 100644\n--- a/target/loongarch/cpu-csr.h\n+++ b/target/loongarch/cpu-csr.h\n@@ -57,7 +57,8 @@ FIELD(CSR_TLBIDX, PS, 24, 6)\n FIELD(CSR_TLBIDX, NE, 31, 1)\n \n #define LOONGARCH_CSR_TLBEHI 0x11 /* TLB EntryHi */\n-FIELD(CSR_TLBEHI, VPPN, 13, 35)\n+FIELD(CSR_TLBEHI_32, VPPN, 13, 19)\n+FIELD(CSR_TLBEHI_64, VPPN, 13, 35)\n \n #define LOONGARCH_CSR_TLBELO0 0x12 /* TLB EntryLo0 */\n #define LOONGARCH_CSR_TLBELO1 0x13 /* TLB EntryLo1 */\n@@ -164,7 +165,8 @@ FIELD(CSR_TLBRERA, PC, 2, 62)\n #define LOONGARCH_CSR_TLBRELO1 0x8d /* TLB refill entrylo1 */\n #define LOONGARCH_CSR_TLBREHI 0x8e /* TLB refill entryhi */\n FIELD(CSR_TLBREHI, PS, 0, 6)\n-FIELD(CSR_TLBREHI, VPPN, 13, 35)\n+FIELD(CSR_TLBREHI_32, VPPN, 13, 19)\n+FIELD(CSR_TLBREHI_64, VPPN, 13, 35)\n #define LOONGARCH_CSR_TLBRPRMD 0x8f /* TLB refill mode info */\n FIELD(CSR_TLBRPRMD, PPLV, 0, 2)\n FIELD(CSR_TLBRPRMD, PIE, 2, 1)\ndiff --git a/target/loongarch/tlb_helper.c b/target/loongarch/tlb_helper.c\nindex 1f8e7911c7..c8b8b0497f 100644\n--- a/target/loongarch/tlb_helper.c\n+++ b/target/loongarch/tlb_helper.c\n@@ -300,8 +300,13 @@ static void raise_mmu_exception(CPULoongArchState *env, target_ulong address,\n \n if (tlb_error == TLBRET_NOMATCH) {\n env->CSR_TLBRBADV = address;\n- env->CSR_TLBREHI = FIELD_DP64(env->CSR_TLBREHI, CSR_TLBREHI, VPPN,\n- extract64(address, 13, 35));\n+ if (is_la64(env)) {\n+ env->CSR_TLBREHI = FIELD_DP64(env->CSR_TLBREHI, CSR_TLBREHI_64,\n+ VPPN, extract64(address, 13, 35));\n+ } else {\n+ env->CSR_TLBREHI = FIELD_DP64(env->CSR_TLBREHI, CSR_TLBREHI_32,\n+ VPPN, extract64(address, 13, 19));\n+ }\n } else {\n if (!FIELD_EX64(env->CSR_DBG, CSR_DBG, DST)) {\n env->CSR_BADV = address;\n@@ -366,12 +371,20 @@ static void fill_tlb_entry(CPULoongArchState *env, int index)\n \n if (FIELD_EX64(env->CSR_TLBRERA, CSR_TLBRERA, ISTLBR)) {\n csr_ps = FIELD_EX64(env->CSR_TLBREHI, CSR_TLBREHI, PS);\n- csr_vppn = FIELD_EX64(env->CSR_TLBREHI, CSR_TLBREHI, VPPN);\n+ if (is_la64(env)) {\n+ csr_vppn = FIELD_EX64(env->CSR_TLBREHI, CSR_TLBREHI_64, VPPN);\n+ } else {\n+ csr_vppn = FIELD_EX64(env->CSR_TLBREHI, CSR_TLBREHI_32, VPPN);\n+ }\n lo0 = env->CSR_TLBRELO0;\n lo1 = env->CSR_TLBRELO1;\n } else {\n csr_ps = FIELD_EX64(env->CSR_TLBIDX, CSR_TLBIDX, PS);\n- csr_vppn = FIELD_EX64(env->CSR_TLBEHI, CSR_TLBEHI, VPPN);\n+ if (is_la64(env)) {\n+ csr_vppn = FIELD_EX64(env->CSR_TLBEHI, CSR_TLBEHI_64, VPPN);\n+ } else {\n+ csr_vppn = FIELD_EX64(env->CSR_TLBEHI, CSR_TLBEHI_32, VPPN);\n+ }\n lo0 = env->CSR_TLBELO0;\n lo1 = env->CSR_TLBELO1;\n }\n@@ -491,7 +504,7 @@ void helper_tlbfill(CPULoongArchState *env)\n \n if (pagesize == stlb_ps) {\n /* Only write into STLB bits [47:13] */\n- address = entryhi & ~MAKE_64BIT_MASK(0, R_CSR_TLBEHI_VPPN_SHIFT);\n+ address = entryhi & ~MAKE_64BIT_MASK(0, R_CSR_TLBEHI_64_VPPN_SHIFT);\n \n /* Choose one set ramdomly */\n set = get_random_tlb(0, 7);\n", "prefixes": [ "PULL", "11/31" ] }