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GET /api/patches/1768893/?format=api
{ "id": 1768893, "url": "http://patchwork.ozlabs.org/api/patches/1768893/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/patch/1681468167-11689-4-git-send-email-quic_srichara@quicinc.com/", "project": { "id": 42, "url": "http://patchwork.ozlabs.org/api/projects/42/?format=api", "name": "Linux GPIO development", "link_name": "linux-gpio", "list_id": "linux-gpio.vger.kernel.org", "list_email": "linux-gpio@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1681468167-11689-4-git-send-email-quic_srichara@quicinc.com>", "list_archive_url": null, "date": "2023-04-14T10:29:21", "name": "[V3,3/9] dt-bindings: pinctrl: qcom: Add support for ipq5018", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "896b784a109683b25becfd3f1abf17e3da780e90", "submitter": { "id": 84297, "url": "http://patchwork.ozlabs.org/api/people/84297/?format=api", "name": "Sricharan Ramabadhran", "email": "quic_srichara@quicinc.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-gpio/patch/1681468167-11689-4-git-send-email-quic_srichara@quicinc.com/mbox/", "series": [ { "id": 350830, "url": "http://patchwork.ozlabs.org/api/series/350830/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/list/?series=350830", "date": "2023-04-14T10:29:18", "name": "Add minimal boot support for IPQ5018", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/350830/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1768893/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1768893/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linux-gpio-owner@vger.kernel.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", 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srichara-linux.qualcomm.com (10.80.80.8) by\n nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server\n (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n 15.2.986.42; Fri, 14 Apr 2023 03:34:44 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=qcppdkim1;\n bh=I80zwU7ZInjCVuuV0qL/PFaRjJItbxARlTbUSW52oRE=;\n b=LSQtkEh+xapw4485vkOsHhf4+ffIMbXYTb8Gvn6L97mp0UEhDoj20W05wyx6AbAw20RA\n movo65bEm5k3RHnDXNi01HdZICQrFNL2VVGztEXuTa7xRawzbQrHlBC0JrEkBk6sRmjJ\n AzBDjHg8pmEk6nKtSOCnNhzzp4A2fRQFPmyE0c3mUC9utsTc9pSG9K3/a2jVOCgUamla\n jFjSW1fY6egL71igcHrOLxzU/kTGekum3jhJOsfSh11c1k1iWWl0WLHw/YcBp9GyXBj+\n bmjOBzBNWuQgstj7VxlTAhbBG1ecw+vsB56SiwOctv6WQn3rtPzy6tUL651ZNej4WWae 6w==", "From": "Sricharan Ramabadhran <quic_srichara@quicinc.com>", "To": "<agross@kernel.org>, <andersson@kernel.org>,\n <konrad.dybcio@linaro.org>, <robh+dt@kernel.org>,\n <krzysztof.kozlowski+dt@linaro.org>, <mturquette@baylibre.com>,\n <sboyd@kernel.org>, <ulf.hansson@linaro.org>,\n <linus.walleij@linaro.org>, <catalin.marinas@arm.com>,\n <will@kernel.org>, <p.zabel@pengutronix.de>,\n <linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>,\n <linux-kernel@vger.kernel.org>, <linux-mmc@vger.kernel.org>,\n <linux-gpio@vger.kernel.org>,\n <linux-arm-kernel@lists.infradead.org>, <quic_srichara@quicinc.com>", "CC": "Nitheesh Sekar <quic_nsekar@quicinc.com>,\n Varadarajan Narayanan <quic_varada@quicinc.com>", "Subject": "[PATCH V3 3/9] dt-bindings: pinctrl: qcom: Add support for ipq5018", "Date": "Fri, 14 Apr 2023 15:59:21 +0530", "Message-ID": "<1681468167-11689-4-git-send-email-quic_srichara@quicinc.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1681468167-11689-1-git-send-email-quic_srichara@quicinc.com>", "References": "<1681468167-11689-1-git-send-email-quic_srichara@quicinc.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[10.80.80.8]", "X-ClientProxiedBy": "nasanex01a.na.qualcomm.com (10.52.223.231) To\n nalasex01c.na.qualcomm.com (10.47.97.35)", "X-QCInternal": "smtphost", "X-Proofpoint-Virus-Version": [ "vendor=nai engine=6200 definitions=5800\n signatures=585085", "vendor=baseguard\n engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22\n definitions=2023-04-14_04,2023-04-14_01,2023-02-09_01" ], "X-Proofpoint-GUID": "LxEAJ6669YoDILi1u-rGtbX9CQoMgzIe", "X-Proofpoint-ORIG-GUID": "LxEAJ6669YoDILi1u-rGtbX9CQoMgzIe", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n adultscore=0 mlxscore=0\n suspectscore=0 malwarescore=0 spamscore=0 phishscore=0 clxscore=1015\n mlxlogscore=999 priorityscore=1501 lowpriorityscore=0 bulkscore=0\n impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1\n engine=8.12.0-2303200000 definitions=main-2304140095", "X-Spam-Status": "No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED,\n DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS,\n T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6", "X-Spam-Checker-Version": "SpamAssassin 3.4.6 (2021-04-09) on\n lindbergh.monkeyblade.net", "Precedence": "bulk", "List-ID": "<linux-gpio.vger.kernel.org>", "X-Mailing-List": "linux-gpio@vger.kernel.org" }, "content": "Add device tree binding Documentation details for ipq5018\npinctrl driver.\n\nCo-developed-by: Nitheesh Sekar <quic_nsekar@quicinc.com>\nSigned-off-by: Nitheesh Sekar <quic_nsekar@quicinc.com>\nCo-developed-by: Varadarajan Narayanan <quic_varada@quicinc.com>\nSigned-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>\nSigned-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>\n---\n [v3] Fixed review comments and DTS schema warnings\n\n .../bindings/pinctrl/qcom,ipq5018-tlmm.yaml | 129 +++++++++++++++++++++\n 1 file changed, 129 insertions(+)\n create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,ipq5018-tlmm.yaml", "diff": "diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,ipq5018-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,ipq5018-tlmm.yaml\nnew file mode 100644\nindex 0000000..477d5df\n--- /dev/null\n+++ b/Documentation/devicetree/bindings/pinctrl/qcom,ipq5018-tlmm.yaml\n@@ -0,0 +1,129 @@\n+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)\n+%YAML 1.2\n+---\n+$id: http://devicetree.org/schemas/pinctrl/qcom,ipq5018-tlmm.yaml#\n+$schema: http://devicetree.org/meta-schemas/core.yaml#\n+\n+title: Qualcomm IPQ5018 TLMM pin controller\n+\n+maintainers:\n+ - Bjorn Andersson <andersson@kernel.org>\n+ - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>\n+\n+description:\n+ Top Level Mode Multiplexer pin controller in Qualcomm IPQ5018 SoC.\n+\n+properties:\n+ compatible:\n+ const: qcom,ipq5018-tlmm\n+\n+ reg:\n+ maxItems: 1\n+\n+ interrupts:\n+ maxItems: 1\n+\n+ interrupt-controller: true\n+ \"#interrupt-cells\": true\n+ gpio-controller: true\n+ \"#gpio-cells\": true\n+ gpio-ranges: true\n+ wakeup-parent: true\n+\n+ gpio-reserved-ranges:\n+ minItems: 1\n+ maxItems: 33\n+\n+ gpio-line-names:\n+ maxItems: 47\n+\n+patternProperties:\n+ \"-state$\":\n+ oneOf:\n+ - $ref: \"#/$defs/qcom-ipq5018-tlmm-state\"\n+ - patternProperties:\n+ \"-pins$\":\n+ $ref: \"#/$defs/qcom-ipq5018-tlmm-state\"\n+ additionalProperties: false\n+\n+$defs:\n+ qcom-ipq5018-tlmm-state:\n+ type: object\n+ description:\n+ Pinctrl node's client devices use subnodes for desired pin configuration.\n+ Client device subnodes use below standard properties.\n+ $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state\n+\n+ properties:\n+ pins:\n+ description:\n+ List of gpio pins affected by the properties specified in this\n+ subnode.\n+ items:\n+ pattern: \"^gpio([0-9]|[1-3][0-9]|4[0-6])$\"\n+ minItems: 1\n+ maxItems: 8\n+\n+ function:\n+ description:\n+ Specify the alternative function to be configured for the specified\n+ pins.\n+\n+ enum: [ atest_char, audio_pdm0, audio_pdm1, audio_rxbclk, audio_rxd,\n+ audio_rxfsync, audio_rxmclk, audio_txbclk, audio_txd,\n+ audio_txfsync, audio_txmclk, blsp0_i2c, blsp0_spi, blsp0_uart0,\n+ blsp0_uart1, blsp1_i2c0, blsp1_i2c1, blsp1_spi0, blsp1_spi1,\n+ blsp1_uart0, blsp1_uart1, blsp1_uart2, blsp2_i2c0, blsp2_i2c1,\n+ blsp2_spi, blsp2_spi0, blsp2_spi1, btss, burn0, burn1, cri_trng,\n+ cri_trng0, cri_trng1, cxc_clk, cxc_data, dbg_out, eud_gpio,\n+ gcc_plltest, gcc_tlmm, gpio, led0, led2, mac0, mac1, mdc, mdio,\n+ pcie0_clk, pcie0_wake, pcie1_clk, pcie1_wake, pll_test,\n+ prng_rosc, pwm0, pwm1, pwm2, pwm3, qdss_cti_trig_in_a0,\n+ qdss_cti_trig_in_a1, qdss_cti_trig_in_b0, qdss_cti_trig_in_b1,\n+ qdss_cti_trig_out_a0, qdss_cti_trig_out_a1,\n+ qdss_cti_trig_out_b0, qdss_cti_trig_out_b1, qdss_traceclk_a,\n+ qdss_traceclk_b, qdss_tracectl_a, qdss_tracectl_b,\n+ qdss_tracedata_a, qdss_tracedata_b, qspi_clk, qspi_cs,\n+ qspi_data, reset_out, sdc1_clk, sdc1_cmd, sdc1_data, wci_txd,\n+ wci_rxd, wsa_swrm, wsi_clk3, wsi_data3, wsis_reset, xfem ]\n+\n+ bias-pull-down: true\n+ bias-pull-up: true\n+ bias-disable: true\n+ drive-strength: true\n+ input-enable: true\n+ output-high: true\n+ output-low: true\n+\n+ required:\n+ - pins\n+\n+ additionalProperties: false\n+\n+required:\n+ - compatible\n+ - reg\n+\n+additionalProperties: false\n+\n+examples:\n+ - |\n+ #include <dt-bindings/interrupt-controller/arm-gic.h>\n+\n+ tlmm: pinctrl@1000000 {\n+ compatible = \"qcom,ipq5018-tlmm\";\n+ reg = <0x01000000 0x300000>;\n+ gpio-controller;\n+ #gpio-cells = <2>;\n+ gpio-ranges = <&tlmm 0 0 47>;\n+ interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;\n+ interrupt-controller;\n+ #interrupt-cells = <2>;\n+\n+ uart2-state {\n+ pins = \"gpio34\", \"gpio35\";\n+ function = \"blsp2_uart\";\n+ drive-strength = <8>;\n+ bias-pull-down;\n+ };\n+ };\n", "prefixes": [ "V3", "3/9" ] }