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GET /api/patches/1757748/?format=api
{ "id": 1757748, "url": "http://patchwork.ozlabs.org/api/patches/1757748/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20230316072940.29137-4-quic_devipriy@quicinc.com/", "project": { "id": 42, "url": "http://patchwork.ozlabs.org/api/projects/42/?format=api", "name": "Linux GPIO development", "link_name": "linux-gpio", "list_id": "linux-gpio.vger.kernel.org", "list_email": "linux-gpio@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20230316072940.29137-4-quic_devipriy@quicinc.com>", "list_archive_url": null, "date": "2023-03-16T07:29:37", "name": "[V9,3/6] dt-bindings: pinctrl: qcom: Add support for IPQ9574", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "480f3b159fbac71b9169e0cba52aa15f8cdcb11d", "submitter": { "id": 85567, "url": "http://patchwork.ozlabs.org/api/people/85567/?format=api", "name": "Devi Priya", "email": "quic_devipriy@quicinc.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20230316072940.29137-4-quic_devipriy@quicinc.com/mbox/", "series": [ { "id": 346538, "url": "http://patchwork.ozlabs.org/api/series/346538/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/list/?series=346538", "date": "2023-03-16T07:29:34", "name": "Add minimal boot support for IPQ9574", "version": 9, "mbox": "http://patchwork.ozlabs.org/series/346538/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1757748/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1757748/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linux-gpio-owner@vger.kernel.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2620:137:e000::1:20; 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Thu, 16 Mar 2023 00:30:30 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=qcppdkim1;\n bh=T5bqZBj+tZ/HlFYG77Jj/5FgFjB/xFw7Iscr7RVKL/E=;\n b=CGWokx9H3lvbFs2PLaExTRnWxcoqP3c9OW+9LrdC+E7Lb0VNHnbqq4D20i/TDxTYA2U9\n eeIhOrPr4/1VpJKcbohpmBHTFK15KwlJZPn+bkofwyYqOvakLSWMALTkkohehFKMHwks\n 10+++9h9wAdQ+H7Lzge5MXfWO6aAh68CAf90UfupjIULlMqvheOMXzJu4hNvNgFD6y2l\n /+Ee7ROgdv8eijFMlQfNdALfDFvUji2fEq7utKzWjiRbmI1dnQKWIvtMTUvjoHAPhK7h\n 1mW5hLo4+vMr/McdpZ00PKu3sbpUmOMfWQRkfn92BDR8wY4UbdqYOnK5VhpZebdSFhjS WQ==", "From": "Devi Priya <quic_devipriy@quicinc.com>", "To": "<agross@kernel.org>, <andersson@kernel.org>,\n <konrad.dybcio@linaro.org>, <robh+dt@kernel.org>,\n <krzysztof.kozlowski+dt@linaro.org>, <mturquette@baylibre.com>,\n <sboyd@kernel.org>, <linus.walleij@linaro.org>,\n <catalin.marinas@arm.com>, <will@kernel.org>,\n <p.zabel@pengutronix.de>, <shawnguo@kernel.org>, <arnd@arndb.de>,\n <marcel.ziswiler@toradex.com>, <dmitry.baryshkov@linaro.org>,\n <nfraprado@collabora.com>, <broonie@kernel.org>,\n <linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>,\n <linux-kernel@vger.kernel.org>, <linux-clk@vger.kernel.org>,\n <linux-gpio@vger.kernel.org>,\n <linux-arm-kernel@lists.infradead.org>", "CC": "<quic_srichara@quicinc.com>, <quic_gokulsri@quicinc.com>,\n <quic_sjaganat@quicinc.com>, <quic_kathirav@quicinc.com>,\n <quic_arajkuma@quicinc.com>, <quic_anusha@quicinc.com>,\n <quic_poovendh@quicinc.com>", "Subject": "[PATCH V9 3/6] dt-bindings: pinctrl: qcom: Add support for IPQ9574", "Date": "Thu, 16 Mar 2023 12:59:37 +0530", "Message-ID": "<20230316072940.29137-4-quic_devipriy@quicinc.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20230316072940.29137-1-quic_devipriy@quicinc.com>", "References": "<20230316072940.29137-1-quic_devipriy@quicinc.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[10.80.80.8]", "X-ClientProxiedBy": "nasanex01a.na.qualcomm.com (10.52.223.231) To\n nalasex01a.na.qualcomm.com (10.47.209.196)", "X-QCInternal": "smtphost", "X-Proofpoint-Virus-Version": [ "vendor=nai engine=6200 definitions=5800\n signatures=585085", "vendor=baseguard\n engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22\n definitions=2023-03-16_05,2023-03-15_01,2023-02-09_01" ], "X-Proofpoint-ORIG-GUID": "SkamLZEyI2m1sfUaEbsLQj5jK763TPdi", "X-Proofpoint-GUID": "SkamLZEyI2m1sfUaEbsLQj5jK763TPdi", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n malwarescore=0\n mlxlogscore=999 spamscore=0 priorityscore=1501 impostorscore=0\n adultscore=0 phishscore=0 suspectscore=0 bulkscore=0 lowpriorityscore=0\n mlxscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1\n engine=8.12.0-2303150002 definitions=main-2303160062", "X-Spam-Status": "No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED,\n DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS\n autolearn=ham autolearn_force=no version=3.4.6", "X-Spam-Checker-Version": "SpamAssassin 3.4.6 (2021-04-09) on\n lindbergh.monkeyblade.net", "Precedence": "bulk", "List-ID": "<linux-gpio.vger.kernel.org>", "X-Mailing-List": "linux-gpio@vger.kernel.org" }, "content": "Add new binding document for pinctrl on IPQ9574\n\nReviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>\nCo-developed-by: Anusha Rao <quic_anusha@quicinc.com>\nSigned-off-by: Anusha Rao <quic_anusha@quicinc.com>\nSigned-off-by: Devi Priya <quic_devipriy@quicinc.com>\n---\n Changes in V9:\n\t- Added the Reviewed-by tag\n\n .../bindings/pinctrl/qcom,ipq9574-tlmm.yaml | 130 ++++++++++++++++++\n 1 file changed, 130 insertions(+)\n create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,ipq9574-tlmm.yaml", "diff": "diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,ipq9574-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,ipq9574-tlmm.yaml\nnew file mode 100644\nindex 000000000000..f32239d08c32\n--- /dev/null\n+++ b/Documentation/devicetree/bindings/pinctrl/qcom,ipq9574-tlmm.yaml\n@@ -0,0 +1,130 @@\n+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)\n+%YAML 1.2\n+---\n+$id: http://devicetree.org/schemas/pinctrl/qcom,ipq9574-tlmm.yaml#\n+$schema: http://devicetree.org/meta-schemas/core.yaml#\n+\n+title: Qualcomm Technologies, Inc. IPQ9574 TLMM block\n+\n+maintainers:\n+ - Bjorn Andersson <andersson@kernel.org>\n+ - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>\n+\n+description:\n+ Top Level Mode Multiplexer pin controller in Qualcomm IPQ9574 SoC.\n+\n+properties:\n+ compatible:\n+ const: qcom,ipq9574-tlmm\n+\n+ reg:\n+ maxItems: 1\n+\n+ interrupts:\n+ maxItems: 1\n+\n+ interrupt-controller: true\n+ \"#interrupt-cells\": true\n+ gpio-controller: true\n+ \"#gpio-cells\": true\n+ gpio-ranges: true\n+ wakeup-parent: true\n+\n+ gpio-reserved-ranges:\n+ minItems: 1\n+ maxItems: 33\n+\n+ gpio-line-names:\n+ maxItems: 65\n+\n+patternProperties:\n+ \"-state$\":\n+ oneOf:\n+ - $ref: \"#/$defs/qcom-ipq9574-tlmm-state\"\n+ - patternProperties:\n+ \"-pins$\":\n+ $ref: \"#/$defs/qcom-ipq9574-tlmm-state\"\n+ additionalProperties: false\n+\n+$defs:\n+ qcom-ipq9574-tlmm-state:\n+ type: object\n+ description:\n+ Pinctrl node's client devices use subnodes for desired pin configuration.\n+ Client device subnodes use below standard properties.\n+ $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state\n+\n+ properties:\n+ pins:\n+ description:\n+ List of gpio pins affected by the properties specified in this\n+ subnode.\n+ items:\n+ pattern: \"^gpio([0-9]|[1-5][0-9]|6[0-4])$\"\n+ minItems: 1\n+ maxItems: 8\n+\n+ function:\n+ description:\n+ Specify the alternative function to be configured for the specified\n+ pins.\n+\n+ enum: [ atest_char, atest_char0, atest_char1, atest_char2, atest_char3,\n+ audio_pdm0, audio_pdm1, audio_pri, audio_sec, blsp0_spi, blsp0_uart,\n+ blsp1_i2c, blsp1_spi, blsp1_uart, blsp2_i2c, blsp2_spi,\n+ blsp2_uart, blsp3_i2c, blsp3_spi, blsp3_uart, blsp4_i2c,\n+ blsp4_spi, blsp4_uart, blsp5_i2c, blsp5_uart, cri_trng0,\n+ cri_trng1, cri_trng3, cxc0, cxc1, dbg_out, dwc_ddrphy,\n+ gcc_plltest, gcc_tlmm, mac, mdc, mdio, pcie0_clk, pcie0_wake,\n+ pcie1_clk, pcie1_wake, pcie2_clk, pcie2_wake, pcie3_clk, pcie3_wake,\n+ prng_rosc0, prng_rosc1, prng_rosc2, prng_rosc3, pta, pwm,\n+ qdss_cti_trig_in_a0, qdss_cti_trig_in_a1, qdss_cti_trig_in_b0,\n+ qdss_cti_trig_in_b1, qdss_cti_trig_out_a0, qdss_cti_trig_out_a1,\n+ qdss_cti_trig_out_b0, qdss_cti_trig_out_b1, qdss_traceclk_a,\n+ qdss_traceclk_b, qdss_tracectl_a, qdss_tracectl_b, qdss_tracedata_a,\n+ qdss_tracedata_b, qdss_tracedata_b, qspi_clk, qspi_cs, qspi_data,\n+ rx0, rx1, sdc_clk, sdc_cmd, sdc_data, sdc_rclk, tsens_max,\n+ wci20, wci21, wsa_swrm ]\n+\n+ bias-pull-down: true\n+ bias-pull-up: true\n+ bias-disable: true\n+ drive-strength: true\n+ input-enable: true\n+ output-high: true\n+ output-low: true\n+\n+ required:\n+ - pins\n+\n+ additionalProperties: false\n+\n+allOf:\n+ - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#\n+\n+required:\n+ - compatible\n+ - reg\n+\n+additionalProperties: false\n+\n+examples:\n+ - |\n+ #include <dt-bindings/interrupt-controller/arm-gic.h>\n+ tlmm: pinctrl@1000000 {\n+ compatible = \"qcom,ipq9574-tlmm\";\n+ reg = <0x01000000 0x300000>;\n+ interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;\n+ gpio-controller;\n+ #gpio-cells = <2>;\n+ interrupt-controller;\n+ #interrupt-cells = <2>;\n+ gpio-ranges = <&tlmm 0 0 65>;\n+\n+ uart2-state {\n+ pins = \"gpio34\", \"gpio35\";\n+ function = \"blsp2_uart\";\n+ drive-strength = <8>;\n+ bias-pull-down;\n+ };\n+ };\n", "prefixes": [ "V9", "3/6" ] }