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GET /api/patches/1641678/?format=api
{ "id": 1641678, "url": "http://patchwork.ozlabs.org/api/patches/1641678/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-ide/patch/20220610081801.11854-23-Sergey.Semin@baikalelectronics.ru/", "project": { "id": 13, "url": "http://patchwork.ozlabs.org/api/projects/13/?format=api", "name": "Linux IDE development", "link_name": "linux-ide", "list_id": "linux-ide.vger.kernel.org", "list_email": "linux-ide@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20220610081801.11854-23-Sergey.Semin@baikalelectronics.ru>", "list_archive_url": null, "date": "2022-06-10T08:18:00", "name": "[v4,22/23] ata: ahci-dwc: Add Baikal-T1 AHCI SATA interface support", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "b326744102fff313f3561c250e8f1ea961cbd483", "submitter": { "id": 78624, "url": "http://patchwork.ozlabs.org/api/people/78624/?format=api", "name": "Serge Semin", "email": "Sergey.Semin@baikalelectronics.ru" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-ide/patch/20220610081801.11854-23-Sergey.Semin@baikalelectronics.ru/mbox/", "series": [ { "id": 304159, "url": "http://patchwork.ozlabs.org/api/series/304159/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-ide/list/?series=304159", "date": "2022-06-10T08:17:42", "name": "ata: ahci: Add DWC/Baikal-T1 AHCI SATA support", "version": 4, "mbox": "http://patchwork.ozlabs.org/series/304159/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1641678/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1641678/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linux-ide-owner@vger.kernel.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "bilbo.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=baikalelectronics.ru header.i=@baikalelectronics.ru\n header.a=rsa-sha256 header.s=mail header.b=pXq3bHQ6;\n\tdkim-atps=neutral", "ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2620:137:e000::1:20; helo=out1.vger.email;\n envelope-from=linux-ide-owner@vger.kernel.org; receiver=<UNKNOWN>)" ], "Received": [ "from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20])\n\tby bilbo.ozlabs.org (Postfix) with ESMTP id 4LKDQ30W7kz9s09\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 10 Jun 2022 18:19:07 +1000 (AEST)", "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n id S1347361AbiFJITE (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n Fri, 10 Jun 2022 04:19:04 -0400", "from lindbergh.monkeyblade.net ([23.128.96.19]:36276 \"EHLO\n lindbergh.monkeyblade.net\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n with ESMTP id S1347355AbiFJISq (ORCPT\n <rfc822;linux-ide@vger.kernel.org>); Fri, 10 Jun 2022 04:18:46 -0400", "from mail.baikalelectronics.com (mail.baikalelectronics.com\n [87.245.175.230])\n by lindbergh.monkeyblade.net (Postfix) with ESMTP id B11892574C1;\n Fri, 10 Jun 2022 01:18:44 -0700 (PDT)", "from mail (mail.baikal.int [192.168.51.25])\n by mail.baikalelectronics.com (Postfix) with ESMTP id 5F13416A9;\n Fri, 10 Jun 2022 11:19:13 +0300 (MSK)", "from localhost (192.168.53.207) by mail (192.168.51.25) with\n Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 10 Jun 2022 11:18:21 +0300" ], "DKIM-Filter": "OpenDKIM Filter v2.11.0 mail.baikalelectronics.com 5F13416A9", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=baikalelectronics.ru; s=mail; t=1654849153;\n bh=oo0zR+j0fayt6r5bhpsH8DMYzEx8H4D+KwaO0iitby8=;\n h=From:To:CC:Subject:Date:In-Reply-To:References:From;\n b=pXq3bHQ6X1oRNzxI5OlaaubEy82dgF3aESa/lx2rEtMQn0GBxuoo5pRiXXQk9+YtE\n aIjm/odRoUuT0UIkmpusgowx0RLsXJaJlHwdrdS4cijCY9ime1mbKtL7TJ7jep0Vtn\n 08A4oixqVb9TL4LHiOK/dtPE2pkrdEZ4MT+5kVNM=", "From": "Serge Semin <Sergey.Semin@baikalelectronics.ru>", "To": "Damien Le Moal <damien.lemoal@opensource.wdc.com>,\n Hans de Goede <hdegoede@redhat.com>,\n Jens Axboe <axboe@kernel.dk>, Hannes Reinecke <hare@suse.de>,\n Serge Semin <fancer.lancer@gmail.com>", "CC": "Serge Semin <Sergey.Semin@baikalelectronics.ru>,\n Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>,\n Pavel Parkhomenko <Pavel.Parkhomenko@baikalelectronics.ru>,\n Rob Herring <robh+dt@kernel.org>, <linux-ide@vger.kernel.org>,\n <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>", "Subject": "[PATCH v4 22/23] ata: ahci-dwc: Add Baikal-T1 AHCI SATA interface\n support", "Date": "Fri, 10 Jun 2022 11:18:00 +0300", "Message-ID": "<20220610081801.11854-23-Sergey.Semin@baikalelectronics.ru>", "In-Reply-To": "<20220610081801.11854-1-Sergey.Semin@baikalelectronics.ru>", "References": "<20220610081801.11854-1-Sergey.Semin@baikalelectronics.ru>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-ClientProxiedBy": "MAIL.baikal.int (192.168.51.25) To mail (192.168.51.25)", "X-Spam-Status": "No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED,\n DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS,SPF_PASS,\n T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no\n version=3.4.6", "X-Spam-Checker-Version": "SpamAssassin 3.4.6 (2021-04-09) on\n lindbergh.monkeyblade.net", "Precedence": "bulk", "List-ID": "<linux-ide.vger.kernel.org>", "X-Mailing-List": "linux-ide@vger.kernel.org" }, "content": "It's almost fully compatible DWC AHCI SATA IP-core derivative except the\nreference clocks source, which need to be very carefully selected. In\nparticular the DWC AHCI SATA PHY can be clocked either from the pads\nref_pad_clk_{m,p} or from the internal wires ref_alt_clk_{m,n}. In the\nlater case the clock signal is generated from the Baikal-T1 CCU SATA PLL.\nThe clocks source is selected by means of the ref_use_pad wire connected\nto the CCU SATA reference clock CSR.\n\nIn normal situation it would be much more handy to use the internal\nreference clock source, but alas we haven't managed to make the AHCI\ncontroller working well with it so far. So it's preferable to have the\ncontroller clocked from the external clock generator and fallback to the\ninternal clock source only as a last resort. Other than that the\ncontroller is full compatible with the DWC AHCI SATA IP-core.\n\nSigned-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>\nReviewed-by: Hannes Reinecke <hare@suse.de>\n\n---\n\nChangelog v2:\n- Rename 'syscon' property to 'baikal,bt1-syscon'.\n- Change the local objects prefix from 'dwc_ahci_' to 'ahci_dwc_',\n from 'bt1_ahci_' to 'ahci_bt1_'. (@Damien)\n\nChangelog v4:\n- Convert ahci_bt1_plat to being statically defined. (@kbot)\n- Drop Baikal-T1 syscon reference relying on the clock controller\n and the platform setup having the proper clock source selected. (@Rob)\n---\n drivers/ata/Kconfig | 1 +\n drivers/ata/ahci_dwc.c | 55 ++++++++++++++++++++++++++++++++++++++++++\n 2 files changed, 56 insertions(+)", "diff": "diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig\nindex 95e0e022b5bb..249717cdc74f 100644\n--- a/drivers/ata/Kconfig\n+++ b/drivers/ata/Kconfig\n@@ -180,6 +180,7 @@ config AHCI_DWC\n \ttristate \"Synopsys DWC AHCI SATA support\"\n \tselect SATA_HOST\n \tdefault SATA_AHCI_PLATFORM\n+\tselect MFD_SYSCON if (MIPS_BAIKAL_T1 || COMPILE_TEST)\n \thelp\n \t This option enables support for the Synopsys DWC AHCI SATA\n \t controller implementation.\ndiff --git a/drivers/ata/ahci_dwc.c b/drivers/ata/ahci_dwc.c\nindex ab4180b7ed23..ed31c0f6782a 100644\n--- a/drivers/ata/ahci_dwc.c\n+++ b/drivers/ata/ahci_dwc.c\n@@ -13,10 +13,12 @@\n #include <linux/kernel.h>\n #include <linux/libata.h>\n #include <linux/log2.h>\n+#include <linux/mfd/syscon.h>\n #include <linux/module.h>\n #include <linux/of_device.h>\n #include <linux/platform_device.h>\n #include <linux/pm.h>\n+#include <linux/regmap.h>\n \n #include \"ahci.h\"\n \n@@ -90,6 +92,20 @@\n #define AHCI_DWC_PORT_PHYCR\t\t0x74\n #define AHCI_DWC_PORT_PHYSR\t\t0x78\n \n+/* Baikal-T1 AHCI SATA specific registers */\n+#define AHCI_BT1_HOST_PHYCR\t\tAHCI_DWC_HOST_GPCR\n+#define AHCI_BT1_HOST_MPLM_MASK\t\tGENMASK(29, 23)\n+#define AHCI_BT1_HOST_LOSDT_MASK\tGENMASK(22, 20)\n+#define AHCI_BT1_HOST_CRR\t\tBIT(19)\n+#define AHCI_BT1_HOST_CRW\t\tBIT(18)\n+#define AHCI_BT1_HOST_CRCD\t\tBIT(17)\n+#define AHCI_BT1_HOST_CRCA\t\tBIT(16)\n+#define AHCI_BT1_HOST_CRDI_MASK\t\tGENMASK(15, 0)\n+\n+#define AHCI_BT1_HOST_PHYSR\t\tAHCI_DWC_HOST_GPSR\n+#define AHCI_BT1_HOST_CRA\t\tBIT(16)\n+#define AHCI_BT1_HOST_CRDO_MASK\t\tGENMASK(15, 0)\n+\n struct ahci_dwc_plat_data {\n \tunsigned int pflags;\n \tunsigned int hflags;\n@@ -106,6 +122,39 @@ struct ahci_dwc_host_priv {\n \tu32 dmacr[AHCI_MAX_PORTS];\n };\n \n+static int ahci_bt1_init(struct ahci_host_priv *hpriv)\n+{\n+\tstruct ahci_dwc_host_priv *dpriv = hpriv->plat_data;\n+\tint ret;\n+\n+\t/* APB, application and reference clocks are required */\n+\tif (!ahci_platform_find_clk(hpriv, \"pclk\") ||\n+\t !ahci_platform_find_clk(hpriv, \"aclk\") ||\n+\t !ahci_platform_find_clk(hpriv, \"ref\")) {\n+\t\tdev_err(&dpriv->pdev->dev, \"No system clocks specified\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\t/*\n+\t * Fully reset the SATA AXI and ref clocks domain to ensure the state\n+\t * machine is working from scratch especially if the reference clocks\n+\t * source has been changed.\n+\t */\n+\tret = ahci_platform_assert_rsts(hpriv);\n+\tif (ret) {\n+\t\tdev_err(&dpriv->pdev->dev, \"Couldn't assert the resets\\n\");\n+\t\treturn ret;\n+\t}\n+\n+\tret = ahci_platform_deassert_rsts(hpriv);\n+\tif (ret) {\n+\t\tdev_err(&dpriv->pdev->dev, \"Couldn't de-assert the resets\\n\");\n+\t\treturn ret;\n+\t}\n+\n+\treturn 0;\n+}\n+\n static struct ahci_host_priv *ahci_dwc_get_resources(struct platform_device *pdev)\n {\n \tstruct ahci_dwc_host_priv *dpriv;\n@@ -415,9 +464,15 @@ static struct ahci_dwc_plat_data ahci_dwc_plat = {\n \t.pflags = AHCI_PLATFORM_GET_RESETS,\n };\n \n+static struct ahci_dwc_plat_data ahci_bt1_plat = {\n+\t.pflags = AHCI_PLATFORM_GET_RESETS | AHCI_PLATFORM_RST_TRIGGER,\n+\t.init = ahci_bt1_init,\n+};\n+\n static const struct of_device_id ahci_dwc_of_match[] = {\n \t{ .compatible = \"snps,dwc-ahci\", &ahci_dwc_plat },\n \t{ .compatible = \"snps,spear-ahci\", &ahci_dwc_plat },\n+\t{ .compatible = \"baikal,bt1-ahci\", &ahci_bt1_plat },\n \t{},\n };\n MODULE_DEVICE_TABLE(of, ahci_dwc_of_match);\n", "prefixes": [ "v4", "22/23" ] }