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GET /api/patches/1641673/?format=api
{ "id": 1641673, "url": "http://patchwork.ozlabs.org/api/patches/1641673/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-ide/patch/20220610081801.11854-21-Sergey.Semin@baikalelectronics.ru/", "project": { "id": 13, "url": "http://patchwork.ozlabs.org/api/projects/13/?format=api", "name": "Linux IDE development", "link_name": "linux-ide", "list_id": "linux-ide.vger.kernel.org", "list_email": "linux-ide@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20220610081801.11854-21-Sergey.Semin@baikalelectronics.ru>", "list_archive_url": null, "date": "2022-06-10T08:17:58", "name": "[v4,20/23] dt-bindings: ata: ahci: Add Baikal-T1 AHCI SATA controller DT schema", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "8387d7eb00d8c2a4a5dadf5de3f6497e182c1cc2", "submitter": { "id": 78624, "url": "http://patchwork.ozlabs.org/api/people/78624/?format=api", "name": "Serge Semin", "email": "Sergey.Semin@baikalelectronics.ru" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-ide/patch/20220610081801.11854-21-Sergey.Semin@baikalelectronics.ru/mbox/", "series": [ { "id": 304159, "url": "http://patchwork.ozlabs.org/api/series/304159/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-ide/list/?series=304159", "date": "2022-06-10T08:17:42", "name": "ata: ahci: Add DWC/Baikal-T1 AHCI SATA support", "version": 4, "mbox": "http://patchwork.ozlabs.org/series/304159/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1641673/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1641673/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linux-ide-owner@vger.kernel.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "bilbo.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=baikalelectronics.ru header.i=@baikalelectronics.ru\n header.a=rsa-sha256 header.s=mail header.b=SieKX8jF;\n\tdkim-atps=neutral", "ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2620:137:e000::1:20; helo=out1.vger.email;\n envelope-from=linux-ide-owner@vger.kernel.org; receiver=<UNKNOWN>)" ], "Received": [ "from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20])\n\tby bilbo.ozlabs.org (Postfix) with ESMTP id 4LKDPy1dgQz9s09\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 10 Jun 2022 18:19:02 +1000 (AEST)", "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n id S1347469AbiFJIS7 (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n Fri, 10 Jun 2022 04:18:59 -0400", "from lindbergh.monkeyblade.net ([23.128.96.19]:35930 \"EHLO\n lindbergh.monkeyblade.net\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n with ESMTP id S1347328AbiFJISo (ORCPT\n <rfc822;linux-ide@vger.kernel.org>); Fri, 10 Jun 2022 04:18:44 -0400", "from mail.baikalelectronics.com (mail.baikalelectronics.com\n [87.245.175.230])\n by lindbergh.monkeyblade.net (Postfix) with ESMTP id 96126252C01;\n Fri, 10 Jun 2022 01:18:42 -0700 (PDT)", "from mail (mail.baikal.int [192.168.51.25])\n by mail.baikalelectronics.com (Postfix) with ESMTP id F1DD116B0;\n Fri, 10 Jun 2022 11:19:11 +0300 (MSK)", "from localhost (192.168.53.207) by mail (192.168.51.25) with\n Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 10 Jun 2022 11:18:19 +0300" ], "DKIM-Filter": "OpenDKIM Filter v2.11.0 mail.baikalelectronics.com F1DD116B0", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=baikalelectronics.ru; s=mail; t=1654849151;\n bh=nIbWS8m18EfIORygzIeYKoz7E6d1IItNMAhLj0W3lqA=;\n h=From:To:CC:Subject:Date:In-Reply-To:References:From;\n b=SieKX8jFtQpH4LTEw9Q7+Cw1j0yYHRmcQs11qXOx1R7OS0GVq6n78VauzOgAF0k/+\n UzQBL9J/BPYtoGGHOS5qTNgRhmxjwREYeeIQ9mPxOMMZR8pWeFOnDEvan1d/R3V9x+\n JMoNJAUzFl4ex26IWLAEaNtVIXOJOU8ckuNUeozE=", "From": "Serge Semin <Sergey.Semin@baikalelectronics.ru>", "To": "Damien Le Moal <damien.lemoal@opensource.wdc.com>,\n Hans de Goede <hdegoede@redhat.com>,\n Jens Axboe <axboe@kernel.dk>, Hannes Reinecke <hare@suse.de>,\n Serge Semin <fancer.lancer@gmail.com>,\n Rob Herring <robh+dt@kernel.org>,\n Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>", "CC": "Serge Semin <Sergey.Semin@baikalelectronics.ru>,\n Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>,\n Pavel Parkhomenko <Pavel.Parkhomenko@baikalelectronics.ru>,\n <linux-ide@vger.kernel.org>, <linux-kernel@vger.kernel.org>,\n <devicetree@vger.kernel.org>", "Subject": "[PATCH v4 20/23] dt-bindings: ata: ahci: Add Baikal-T1 AHCI SATA\n controller DT schema", "Date": "Fri, 10 Jun 2022 11:17:58 +0300", "Message-ID": "<20220610081801.11854-21-Sergey.Semin@baikalelectronics.ru>", "In-Reply-To": "<20220610081801.11854-1-Sergey.Semin@baikalelectronics.ru>", "References": "<20220610081801.11854-1-Sergey.Semin@baikalelectronics.ru>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-ClientProxiedBy": "MAIL.baikal.int (192.168.51.25) To mail (192.168.51.25)", "X-Spam-Status": "No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED,\n DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS,SPF_PASS,\n T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no\n version=3.4.6", "X-Spam-Checker-Version": "SpamAssassin 3.4.6 (2021-04-09) on\n lindbergh.monkeyblade.net", "Precedence": "bulk", "List-ID": "<linux-ide.vger.kernel.org>", "X-Mailing-List": "linux-ide@vger.kernel.org" }, "content": "Baikal-T1 AHCI controller is based on the DWC AHCI SATA IP-core v4.10a\nwith the next specific settings: two SATA ports, cascaded CSR access based\non two clock domains (APB and AXI), selectable source of the reference\nclock (though stable work is currently available from the external source\nonly), two reset lanes for the application and SATA ports domains. Other\nthan that the device is fully compatible with the generic DWC AHCI SATA\nbindings.\n\nSigned-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>\nReviewed-by: Hannes Reinecke <hare@suse.de>\n\n---\n\nChangelog v2:\n- Rename 'syscon' property to 'baikal,bt1-syscon'.\n- Drop macro usage from the example node.\n\nChangelog v4:\n- Use the DWC AHCI port properties definition from the DWC AHCI SATA\n common schema. (@Rob)\n- Drop Baikal-T1 syscon reference and implement the clock signal\n source in the framework of the clock controller. (@Rob)\n---\n .../bindings/ata/baikal,bt1-ahci.yaml | 116 ++++++++++++++++++\n 1 file changed, 116 insertions(+)\n create mode 100644 Documentation/devicetree/bindings/ata/baikal,bt1-ahci.yaml", "diff": "diff --git a/Documentation/devicetree/bindings/ata/baikal,bt1-ahci.yaml b/Documentation/devicetree/bindings/ata/baikal,bt1-ahci.yaml\nnew file mode 100644\nindex 000000000000..d5fbd7d561d8\n--- /dev/null\n+++ b/Documentation/devicetree/bindings/ata/baikal,bt1-ahci.yaml\n@@ -0,0 +1,116 @@\n+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)\n+%YAML 1.2\n+---\n+$id: http://devicetree.org/schemas/ata/baikal,bt1-ahci.yaml#\n+$schema: http://devicetree.org/meta-schemas/core.yaml#\n+\n+title: Baikal-T1 SoC AHCI SATA controller\n+\n+maintainers:\n+ - Serge Semin <fancer.lancer@gmail.com>\n+\n+description: |\n+ AHCI SATA controller embedded into the Baikal-T1 SoC is based on the\n+ DWC AHCI SATA v4.10a IP-core.\n+\n+allOf:\n+ - $ref: snps,dwc-ahci.yaml#\n+\n+properties:\n+ compatible:\n+ contains:\n+ const: baikal,bt1-ahci\n+\n+ clocks:\n+ items:\n+ - description: Peripheral APB bus clock source\n+ - description: Application AXI BIU clock\n+ - description: SATA Ports reference clock\n+\n+ clock-names:\n+ items:\n+ - const: pclk\n+ - const: aclk\n+ - const: ref\n+\n+ resets:\n+ items:\n+ - description: Application AXI BIU domain reset\n+ - description: SATA Ports clock domain reset\n+\n+ reset-names:\n+ items:\n+ - const: arst\n+ - const: ref\n+\n+ ports-implemented:\n+ maximum: 0x3\n+\n+patternProperties:\n+ \"^sata-port@[0-9a-e]$\":\n+ $ref: /schemas/ata/snps,dwc-ahci.yaml#/$defs/dwc-ahci-port\n+\n+ properties:\n+ reg:\n+ minimum: 0\n+ maximum: 1\n+\n+ snps,tx-ts-max:\n+ $ref: /schemas/types.yaml#/definitions/uint32\n+ description:\n+ Due to having AXI3 bus interface utilized the maximum Tx DMA\n+ transaction size can't exceed 16 beats (AxLEN[3:0]).\n+ enum: [ 1, 2, 4, 8, 16 ]\n+\n+ snps,rx-ts-max:\n+ $ref: /schemas/types.yaml#/definitions/uint32\n+ description:\n+ Due to having AXI3 bus interface utilized the maximum Rx DMA\n+ transaction size can't exceed 16 beats (AxLEN[3:0]).\n+ enum: [ 1, 2, 4, 8, 16 ]\n+\n+ unevaluatedProperties: false\n+\n+required:\n+ - compatible\n+ - reg\n+ - interrupts\n+ - clocks\n+ - clock-names\n+ - resets\n+\n+unevaluatedProperties: false\n+\n+examples:\n+ - |\n+ sata@1f050000 {\n+ compatible = \"baikal,bt1-ahci\", \"snps,dwc-ahci\";\n+ reg = <0x1f050000 0x2000>;\n+ #address-cells = <1>;\n+ #size-cells = <0>;\n+\n+ interrupts = <0 64 4>;\n+\n+ clocks = <&ccu_sys 1>, <&ccu_axi 2>, <&sata_ref_clk>;\n+ clock-names = \"pclk\", \"aclk\", \"ref\";\n+\n+ resets = <&ccu_axi 2>, <&ccu_sys 0>;\n+ reset-names = \"arst\", \"ref\";\n+\n+ ports-implemented = <0x3>;\n+\n+ sata-port@0 {\n+ reg = <0>;\n+\n+ snps,tx-ts-max = <4>;\n+ snps,rx-ts-max = <4>;\n+ };\n+\n+ sata-port@1 {\n+ reg = <1>;\n+\n+ snps,tx-ts-max = <4>;\n+ snps,rx-ts-max = <4>;\n+ };\n+ };\n+...\n", "prefixes": [ "v4", "20/23" ] }