Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/1627237/?format=api
{ "id": 1627237, "url": "http://patchwork.ozlabs.org/api/patches/1627237/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20220505184938.351866-28-danielhb413@gmail.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20220505184938.351866-28-danielhb413@gmail.com>", "list_archive_url": null, "date": "2022-05-05T18:49:35", "name": "[PULL,27/30] target/ppc: Remove msr_hv macro", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "d2b0c4fe2bc9b74349d14f289e933c43aa1f503a", "submitter": { "id": 74265, "url": "http://patchwork.ozlabs.org/api/people/74265/?format=api", "name": "Daniel Henrique Barboza", "email": "danielhb413@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20220505184938.351866-28-danielhb413@gmail.com/mbox/", "series": [ { "id": 298671, "url": "http://patchwork.ozlabs.org/api/series/298671/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=298671", "date": "2022-05-05T18:49:09", "name": "[PULL,01/30] target/ppc: initialize 'val' union in kvm_get_one_spr()", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/298671/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1627237/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1627237/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "bilbo.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20210112 header.b=e7au+DnA;\n\tdkim-atps=neutral", "ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=<UNKNOWN>)" ], "Received": [ "from lists.gnu.org (lists.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby bilbo.ozlabs.org (Postfix) with ESMTPS id 4KvPlw3lsdz9sBF\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 6 May 2022 06:03:55 +1000 (AEST)", "from localhost ([::1]:33578 helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1nmhhX-0001v4-D7\n\tfor incoming@patchwork.ozlabs.org; Thu, 05 May 2022 16:03:51 -0400", "from eggs.gnu.org ([2001:470:142:3::10]:48358)\n by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <danielhb413@gmail.com>)\n id 1nmgZb-0003xM-IY; Thu, 05 May 2022 14:51:38 -0400", "from mail-oa1-x34.google.com ([2001:4860:4864:20::34]:35943)\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from <danielhb413@gmail.com>)\n id 1nmgZY-0004sT-8U; Thu, 05 May 2022 14:51:35 -0400", "by mail-oa1-x34.google.com with SMTP id\n 586e51a60fabf-edeb6c3642so5109680fac.3;\n Thu, 05 May 2022 11:51:31 -0700 (PDT)", "from balboa.ibmuc.com (201-1-57-208.dsl.telesp.net.br.\n [201.1.57.208]) by smtp.gmail.com with ESMTPSA id\n n67-20020aca4046000000b00325cda1ff94sm917146oia.19.2022.05.05.11.51.27\n (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n Thu, 05 May 2022 11:51:29 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112;\n h=from:to:cc:subject:date:message-id:in-reply-to:references\n :mime-version:content-transfer-encoding;\n bh=Chk0RINyrs3VC8UL+UPYQkDpM9x5xllD+vsKhxm4sfM=;\n b=e7au+DnA80YcxCewrvqIIhtYpxiwN6ib+SpfbB5IB02b/KozZ/YLLQxozDjy6dJ5Vn\n Se1qG9hYt4ZqSSZNh4HSi+/9RCe8GEIWzS3rMn9l2vuOxYMR2TVW2S+Vy0YmEmOishoa\n ps/1y9+l2h1VdqQfhjm7pwxFvTyZd2b9ueaHi11+CrzXNJiigfvjr4eDqljKUf2r75Zi\n Dv9MjuIrvC/H7SR5ypN6dXLSsvrHOTgFk7Un/hBfhZa5riZCv1rn9Ry2srNAlQ7OwyQW\n E8FQC5c3PEZABo3tB0+t/3spevY7JNbFowoKNm3DmbGx/kwNN4V6NZPX8lmkfxka4ytq\n uNrA==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20210112;\n h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n :references:mime-version:content-transfer-encoding;\n bh=Chk0RINyrs3VC8UL+UPYQkDpM9x5xllD+vsKhxm4sfM=;\n b=EZSd5jTlAeaIn/tqbN7Xi7CdTxgYXymNfVk30CJyt9bMuz7tdpv6XPy3lFyhn+Xs8S\n uQaKQu/Xhh8u+KAiWucJHynE+JzNcS/D30XP7CB55XXJLm7gq+EwtR+UVncU6tATGFPS\n 0TrIsZNCejhmjKWZC9bEw0bcCFknd4MeoE+Tu/Xv1Cp7mxWeA8muUFUTeoYev8ZQWDJQ\n WdlaMRfc4Biz+TGf0S5+v9Pdss8RUSsFBFkrcPG8yFk1ha81pOjx12TLNk5O89WJV++R\n kuZ6uVlcm96PCfOyYNU2KhjKxUvLhtoLxadHwlJCcdr27Cjhq1fcHee7sYl1wvMFqapV\n xU5Q==", "X-Gm-Message-State": "AOAM5322B4VTpiiwNx7KdrpirgeoFk1z0ZnYdZjjZ5ZRgl1l94znnsVd\n L27/h9Kma8xbbmXmeBzyhmBaWOXzMuY=", "X-Google-Smtp-Source": "\n ABdhPJzVCMq6/DLstsnOIggEL49GYxd80kaeytsJAtaY00JF02ldYf+piuQNTEIILFPo+BrZWw1LIQ==", "X-Received": "by 2002:a05:6870:f728:b0:ed:9d92:7ba3 with SMTP id\n ej40-20020a056870f72800b000ed9d927ba3mr2950371oab.177.1651776690528;\n Thu, 05 May 2022 11:51:30 -0700 (PDT)", "From": "Daniel Henrique Barboza <danielhb413@gmail.com>", "To": "qemu-devel@nongnu.org", "Cc": "qemu-ppc@nongnu.org, danielhb413@gmail.com, peter.maydell@linaro.org,\n richard.henderson@linaro.org,\n =?utf-8?q?V=C3=ADctor_Colombo?= <victor.colombo@eldorado.org.br>", "Subject": "[PULL 27/30] target/ppc: Remove msr_hv macro", "Date": "Thu, 5 May 2022 15:49:35 -0300", "Message-Id": "<20220505184938.351866-28-danielhb413@gmail.com>", "X-Mailer": "git-send-email 2.32.0", "In-Reply-To": "<20220505184938.351866-1-danielhb413@gmail.com>", "References": "<20220505184938.351866-1-danielhb413@gmail.com>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=UTF-8", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=2001:4860:4864:20::34;\n envelope-from=danielhb413@gmail.com; helo=mail-oa1-x34.google.com", "X-Spam_score_int": "-18", "X-Spam_score": "-1.9", "X-Spam_bar": "-", "X-Spam_report": "(-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001,\n T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "\"Qemu-devel\"\n <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>" }, "content": "From: Víctor Colombo <victor.colombo@eldorado.org.br>\n\nmsr_hv macro hides the usage of env->msr, which is a bad\nbehavior. Substitute it with FIELD_EX64 calls that explicitly use\nenv->msr as a parameter.\n\nSuggested-by: Richard Henderson <richard.henderson@linaro.org>\nSigned-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>\nReviewed-by: Richard Henderson <richard.henderson@linaro.org>\nMessage-Id: <20220504210541.115256-20-victor.colombo@eldorado.org.br>\nSigned-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>\n---\n target/ppc/cpu.h | 11 ++++++-----\n target/ppc/cpu_init.c | 6 ++++--\n target/ppc/excp_helper.c | 8 ++++----\n target/ppc/mem_helper.c | 4 ++--\n target/ppc/misc_helper.c | 2 +-\n target/ppc/mmu-radix64.c | 6 +++---\n 6 files changed, 20 insertions(+), 17 deletions(-)", "diff": "diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h\nindex 5ac7d7d68f..9f19b3c0a8 100644\n--- a/target/ppc/cpu.h\n+++ b/target/ppc/cpu.h\n@@ -354,6 +354,12 @@ typedef enum {\n #define MSR_RI 1 /* Recoverable interrupt 1 */\n #define MSR_LE 0 /* Little-endian mode 1 hflags */\n \n+#if defined(TARGET_PPC64)\n+FIELD(MSR, HV, MSR_HV, 1)\n+#define FIELD_EX64_HV(storage) FIELD_EX64(storage, MSR, HV)\n+#else\n+#define FIELD_EX64_HV(storage) 0\n+#endif\n FIELD(MSR, TS, MSR_TS0, 2)\n FIELD(MSR, CM, MSR_CM, 1)\n FIELD(MSR, GS, MSR_GS, 1)\n@@ -489,11 +495,6 @@ FIELD(MSR, LE, MSR_LE, 1)\n #define HFSCR_MSGP PPC_BIT(53) /* Privileged Message Send Facilities */\n #define HFSCR_IC_MSGP 0xA\n \n-#if defined(TARGET_PPC64)\n-#define msr_hv ((env->msr >> MSR_HV) & 1)\n-#else\n-#define msr_hv (0)\n-#endif\n #define msr_de ((env->msr >> MSR_DE) & 1)\n \n #define DBCR0_ICMP (1 << 27)\ndiff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c\nindex 10e7c41bc9..d4c7813de5 100644\n--- a/target/ppc/cpu_init.c\n+++ b/target/ppc/cpu_init.c\n@@ -6305,7 +6305,8 @@ static bool cpu_has_work_POWER9(CPUState *cs)\n if ((env->pending_interrupts & (1u << PPC_INTERRUPT_EXT)) &&\n (env->spr[SPR_LPCR] & LPCR_EEE)) {\n bool heic = !!(env->spr[SPR_LPCR] & LPCR_HEIC);\n- if (!heic || !msr_hv || FIELD_EX64(env->msr, MSR, PR)) {\n+ if (!heic || !FIELD_EX64_HV(env->msr) ||\n+ FIELD_EX64(env->msr, MSR, PR)) {\n return true;\n }\n }\n@@ -6520,7 +6521,8 @@ static bool cpu_has_work_POWER10(CPUState *cs)\n if ((env->pending_interrupts & (1u << PPC_INTERRUPT_EXT)) &&\n (env->spr[SPR_LPCR] & LPCR_EEE)) {\n bool heic = !!(env->spr[SPR_LPCR] & LPCR_HEIC);\n- if (!heic || !msr_hv || FIELD_EX64(env->msr, MSR, PR)) {\n+ if (!heic || !FIELD_EX64_HV(env->msr) ||\n+ FIELD_EX64(env->msr, MSR, PR)) {\n return true;\n }\n }\ndiff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c\nindex aa201c63c6..cb752b184a 100644\n--- a/target/ppc/excp_helper.c\n+++ b/target/ppc/excp_helper.c\n@@ -1715,7 +1715,7 @@ static void ppc_hw_interrupt(CPUPPCState *env)\n if (env->pending_interrupts & (1 << PPC_INTERRUPT_HDECR)) {\n /* LPCR will be clear when not supported so this will work */\n bool hdice = !!(env->spr[SPR_LPCR] & LPCR_HDICE);\n- if ((async_deliver || msr_hv == 0) && hdice) {\n+ if ((async_deliver || !FIELD_EX64_HV(env->msr)) && hdice) {\n /* HDEC clears on delivery */\n env->pending_interrupts &= ~(1 << PPC_INTERRUPT_HDECR);\n powerpc_excp(cpu, POWERPC_EXCP_HDECR);\n@@ -1727,7 +1727,7 @@ static void ppc_hw_interrupt(CPUPPCState *env)\n if (env->pending_interrupts & (1 << PPC_INTERRUPT_HVIRT)) {\n /* LPCR will be clear when not supported so this will work */\n bool hvice = !!(env->spr[SPR_LPCR] & LPCR_HVICE);\n- if ((async_deliver || msr_hv == 0) && hvice) {\n+ if ((async_deliver || !FIELD_EX64_HV(env->msr)) && hvice) {\n powerpc_excp(cpu, POWERPC_EXCP_HVIRT);\n return;\n }\n@@ -1738,9 +1738,9 @@ static void ppc_hw_interrupt(CPUPPCState *env)\n bool lpes0 = !!(env->spr[SPR_LPCR] & LPCR_LPES0);\n bool heic = !!(env->spr[SPR_LPCR] & LPCR_HEIC);\n /* HEIC blocks delivery to the hypervisor */\n- if ((async_deliver && !(heic && msr_hv &&\n+ if ((async_deliver && !(heic && FIELD_EX64_HV(env->msr) &&\n !FIELD_EX64(env->msr, MSR, PR))) ||\n- (env->has_hv_mode && msr_hv == 0 && !lpes0)) {\n+ (env->has_hv_mode && !FIELD_EX64_HV(env->msr) && !lpes0)) {\n if (books_vhyp_promotes_external_to_hvirt(cpu)) {\n powerpc_excp(cpu, POWERPC_EXCP_HVIRT);\n } else {\ndiff --git a/target/ppc/mem_helper.c b/target/ppc/mem_helper.c\nindex 9af135e88e..d1163f316c 100644\n--- a/target/ppc/mem_helper.c\n+++ b/target/ppc/mem_helper.c\n@@ -612,11 +612,11 @@ void helper_tbegin(CPUPPCState *env)\n env->spr[SPR_TEXASR] =\n (1ULL << TEXASR_FAILURE_PERSISTENT) |\n (1ULL << TEXASR_NESTING_OVERFLOW) |\n- (msr_hv << TEXASR_PRIVILEGE_HV) |\n+ (FIELD_EX64_HV(env->msr) << TEXASR_PRIVILEGE_HV) |\n (FIELD_EX64(env->msr, MSR, PR) << TEXASR_PRIVILEGE_PR) |\n (1ULL << TEXASR_FAILURE_SUMMARY) |\n (1ULL << TEXASR_TFIAR_EXACT);\n- env->spr[SPR_TFIAR] = env->nip | (msr_hv << 1) |\n+ env->spr[SPR_TFIAR] = env->nip | (FIELD_EX64_HV(env->msr) << 1) |\n FIELD_EX64(env->msr, MSR, PR);\n env->spr[SPR_TFHAR] = env->nip + 4;\n env->crf[0] = 0xB; /* 0b1010 = transaction failure */\ndiff --git a/target/ppc/misc_helper.c b/target/ppc/misc_helper.c\nindex 06aa716cab..b0a5e7ce76 100644\n--- a/target/ppc/misc_helper.c\n+++ b/target/ppc/misc_helper.c\n@@ -73,7 +73,7 @@ void helper_hfscr_facility_check(CPUPPCState *env, uint32_t bit,\n const char *caller, uint32_t cause)\n {\n #ifdef TARGET_PPC64\n- if ((env->msr_mask & MSR_HVB) && !msr_hv &&\n+ if ((env->msr_mask & MSR_HVB) && !FIELD_EX64(env->msr, MSR, HV) &&\n !(env->spr[SPR_HFSCR] & (1UL << bit))) {\n raise_hv_fu_exception(env, bit, caller, cause, GETPC());\n }\ndiff --git a/target/ppc/mmu-radix64.c b/target/ppc/mmu-radix64.c\nindex e88f51fd34..21ac958e48 100644\n--- a/target/ppc/mmu-radix64.c\n+++ b/target/ppc/mmu-radix64.c\n@@ -37,7 +37,7 @@ static bool ppc_radix64_get_fully_qualified_addr(const CPUPPCState *env,\n return false;\n }\n \n- if (msr_hv) { /* MSR[HV] -> Hypervisor/bare metal */\n+ if (FIELD_EX64(env->msr, MSR, HV)) { /* MSR[HV] -> Hypervisor/bare metal */\n switch (eaddr & R_EADDR_QUADRANT) {\n case R_EADDR_QUADRANT0:\n *lpid = 0;\n@@ -306,7 +306,7 @@ static bool validate_pate(PowerPCCPU *cpu, uint64_t lpid, ppc_v3_pate_t *pate)\n if (!(pate->dw0 & PATE0_HR)) {\n return false;\n }\n- if (lpid == 0 && !msr_hv) {\n+ if (lpid == 0 && !FIELD_EX64(env->msr, MSR, HV)) {\n return false;\n }\n if ((pate->dw0 & PATE1_R_PRTS) < 5) {\n@@ -431,7 +431,7 @@ static int ppc_radix64_process_scoped_xlate(PowerPCCPU *cpu,\n *g_page_size = PRTBE_R_GET_RTS(prtbe0);\n base_addr = prtbe0 & PRTBE_R_RPDB;\n nls = prtbe0 & PRTBE_R_RPDS;\n- if (msr_hv || vhyp_flat_addressing(cpu)) {\n+ if (FIELD_EX64(env->msr, MSR, HV) || vhyp_flat_addressing(cpu)) {\n /*\n * Can treat process table addresses as real addresses\n */\n", "prefixes": [ "PULL", "27/30" ] }