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GET /api/patches/1627192/?format=api
{ "id": 1627192, "url": "http://patchwork.ozlabs.org/api/patches/1627192/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20220505184938.351866-13-danielhb413@gmail.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20220505184938.351866-13-danielhb413@gmail.com>", "list_archive_url": null, "date": "2022-05-05T18:49:20", "name": "[PULL,12/30] target/ppc: Remove msr_le macro", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "2bc901af563b88d55fb40b8a856adea2e7866124", "submitter": { "id": 74265, "url": "http://patchwork.ozlabs.org/api/people/74265/?format=api", "name": "Daniel Henrique Barboza", "email": "danielhb413@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20220505184938.351866-13-danielhb413@gmail.com/mbox/", "series": [ { "id": 298671, "url": "http://patchwork.ozlabs.org/api/series/298671/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=298671", "date": "2022-05-05T18:49:09", "name": "[PULL,01/30] target/ppc: initialize 'val' union in kvm_get_one_spr()", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/298671/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1627192/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1627192/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "bilbo.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20210112 header.b=hqGP397Y;\n\tdkim-atps=neutral", "ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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charset=UTF-8", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=2607:f8b0:4864:20::22d;\n envelope-from=danielhb413@gmail.com; helo=mail-oi1-x22d.google.com", "X-Spam_score_int": "-18", "X-Spam_score": "-1.9", "X-Spam_bar": "-", "X-Spam_report": "(-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001,\n T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "\"Qemu-devel\"\n <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>" }, "content": "From: Víctor Colombo <victor.colombo@eldorado.org.br>\n\nmsr_le macro hides the usage of env->msr, which is a bad behavior\nSubstitute it with FIELD_EX64 calls that explicitly use env->msr\nas a parameter.\n\nSuggested-by: Richard Henderson <richard.henderson@linaro.org>\nSigned-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>\nReviewed-by: Richard Henderson <richard.henderson@linaro.org>\nMessage-Id: <20220504210541.115256-5-victor.colombo@eldorado.org.br>\nSigned-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>\n---\n target/ppc/cpu.h | 2 +-\n target/ppc/cpu_init.c | 2 +-\n target/ppc/gdbstub.c | 2 +-\n target/ppc/mem_helper.c | 16 ++++++++--------\n 4 files changed, 11 insertions(+), 11 deletions(-)", "diff": "diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h\nindex 8f1dc4cb15..c561d664de 100644\n--- a/target/ppc/cpu.h\n+++ b/target/ppc/cpu.h\n@@ -355,6 +355,7 @@ typedef enum {\n #define MSR_LE 0 /* Little-endian mode 1 hflags */\n \n FIELD(MSR, PR, MSR_PR, 1)\n+FIELD(MSR, LE, MSR_LE, 1)\n \n /* PMU bits */\n #define MMCR0_FC PPC_BIT(32) /* Freeze Counters */\n@@ -486,7 +487,6 @@ FIELD(MSR, PR, MSR_PR, 1)\n #define msr_ir ((env->msr >> MSR_IR) & 1)\n #define msr_dr ((env->msr >> MSR_DR) & 1)\n #define msr_ds ((env->msr >> MSR_DS) & 1)\n-#define msr_le ((env->msr >> MSR_LE) & 1)\n #define msr_ts ((env->msr >> MSR_TS1) & 3)\n \n #define DBCR0_ICMP (1 << 27)\ndiff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c\nindex ac16a64846..0c6b83406e 100644\n--- a/target/ppc/cpu_init.c\n+++ b/target/ppc/cpu_init.c\n@@ -7210,7 +7210,7 @@ static bool ppc_cpu_is_big_endian(CPUState *cs)\n \n cpu_synchronize_state(cs);\n \n- return !msr_le;\n+ return !FIELD_EX64(env->msr, MSR, LE);\n }\n \n #ifdef CONFIG_TCG\ndiff --git a/target/ppc/gdbstub.c b/target/ppc/gdbstub.c\nindex 1252429a2a..1a0b9ca82c 100644\n--- a/target/ppc/gdbstub.c\n+++ b/target/ppc/gdbstub.c\n@@ -95,7 +95,7 @@ static int ppc_gdb_register_len(int n)\n void ppc_maybe_bswap_register(CPUPPCState *env, uint8_t *mem_buf, int len)\n {\n #ifndef CONFIG_USER_ONLY\n- if (!msr_le) {\n+ if (!FIELD_EX64(env->msr, MSR, LE)) {\n /* do nothing */\n } else if (len == 4) {\n bswap32s((uint32_t *)mem_buf);\ndiff --git a/target/ppc/mem_helper.c b/target/ppc/mem_helper.c\nindex fba7f84b7a..9af135e88e 100644\n--- a/target/ppc/mem_helper.c\n+++ b/target/ppc/mem_helper.c\n@@ -33,9 +33,9 @@\n static inline bool needs_byteswap(const CPUPPCState *env)\n {\n #if TARGET_BIG_ENDIAN\n- return msr_le;\n+ return FIELD_EX64(env->msr, MSR, LE);\n #else\n- return !msr_le;\n+ return !FIELD_EX64(env->msr, MSR, LE);\n #endif\n }\n \n@@ -470,8 +470,8 @@ uint32_t helper_stqcx_be_parallel(CPUPPCState *env, target_ulong addr,\n #endif\n \n /*\n- * We use msr_le to determine index ordering in a vector. However,\n- * byteswapping is not simply controlled by msr_le. We also need to\n+ * We use MSR_LE to determine index ordering in a vector. However,\n+ * byteswapping is not simply controlled by MSR_LE. We also need to\n * take into account endianness of the target. This is done for the\n * little-endian PPC64 user-mode target.\n */\n@@ -484,7 +484,7 @@ uint32_t helper_stqcx_be_parallel(CPUPPCState *env, target_ulong addr,\n int adjust = HI_IDX * (n_elems - 1); \\\n int sh = sizeof(r->element[0]) >> 1; \\\n int index = (addr & 0xf) >> sh; \\\n- if (msr_le) { \\\n+ if (FIELD_EX64(env->msr, MSR, LE)) { \\\n index = n_elems - index - 1; \\\n } \\\n \\\n@@ -511,7 +511,7 @@ LVE(lvewx, cpu_ldl_data_ra, bswap32, u32)\n int adjust = HI_IDX * (n_elems - 1); \\\n int sh = sizeof(r->element[0]) >> 1; \\\n int index = (addr & 0xf) >> sh; \\\n- if (msr_le) { \\\n+ if (FIELD_EX64(env->msr, MSR, LE)) { \\\n index = n_elems - index - 1; \\\n } \\\n \\\n@@ -545,7 +545,7 @@ void helper_##name(CPUPPCState *env, target_ulong addr, \\\n t.s128 = int128_zero(); \\\n if (nb) { \\\n nb = (nb >= 16) ? 16 : nb; \\\n- if (msr_le && !lj) { \\\n+ if (FIELD_EX64(env->msr, MSR, LE) && !lj) { \\\n for (i = 16; i > 16 - nb; i--) { \\\n t.VsrB(i - 1) = cpu_ldub_data_ra(env, addr, GETPC()); \\\n addr = addr_add(env, addr, 1); \\\n@@ -576,7 +576,7 @@ void helper_##name(CPUPPCState *env, target_ulong addr, \\\n } \\\n \\\n nb = (nb >= 16) ? 16 : nb; \\\n- if (msr_le && !lj) { \\\n+ if (FIELD_EX64(env->msr, MSR, LE) && !lj) { \\\n for (i = 16; i > 16 - nb; i--) { \\\n cpu_stb_data_ra(env, addr, xt->VsrB(i - 1), GETPC()); \\\n addr = addr_add(env, addr, 1); \\\n", "prefixes": [ "PULL", "12/30" ] }