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GET /api/patches/1627188/?format=api
{ "id": 1627188, "url": "http://patchwork.ozlabs.org/api/patches/1627188/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20220505184938.351866-8-danielhb413@gmail.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20220505184938.351866-8-danielhb413@gmail.com>", "list_archive_url": null, "date": "2022-05-05T18:49:15", "name": "[PULL,07/30] ppc/xive: Always recompute the PIPR when pushing an OS context", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "2931a8a17dad56bc8f2fe9c40e40b2f44c3de2fd", "submitter": { "id": 74265, "url": "http://patchwork.ozlabs.org/api/people/74265/?format=api", "name": "Daniel Henrique Barboza", "email": "danielhb413@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20220505184938.351866-8-danielhb413@gmail.com/mbox/", "series": [ { "id": 298671, "url": "http://patchwork.ozlabs.org/api/series/298671/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=298671", "date": "2022-05-05T18:49:09", "name": "[PULL,01/30] target/ppc: initialize 'val' union in kvm_get_one_spr()", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/298671/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1627188/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1627188/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "bilbo.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20210112 header.b=CjKbhySb;\n\tdkim-atps=neutral", "ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20210112;\n h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n :references:mime-version:content-transfer-encoding;\n bh=ceXIRmvDGwZG2ZoRhYTNniMrHQbaZU4/f2aaZDKJUo4=;\n b=VtjagNUFVLh7VcTp2ymVbod1Cxyk6QAjmCM+GgDwOy8uJWHmm9cm4S7tD+Zpxg4p+p\n wYl3VkfytBoeHmbriUnSZ9+r+dYX+9TXUkkcK+kaBRPtChvEiYuElXMR9tH5Sy6tPQJr\n 7FlC+pbDtIzT6sUWfXz/oYtIsKZ/fpDoLL3wf9ZvMVxoUZqqej+20xFSL8or+qSsks0v\n 5zQLe/HQNic5O4ShhzLV5gIUALy15dLPODzYiL/H3nm2LxSOg2oGfp+UbW5F7KcboRzi\n g4TdE+EkuJ+hdVOBs5dT6DI7mv0x/omHs1491NuowwRKgOf4UwHFFzMbSYSUmAZGh+DF\n W3Og==", "X-Gm-Message-State": "AOAM530Q5FVZPlZ7KaGPyHDsFrj52Mc3QuiNxqmmGUj1D5Mbhjbpkp6g\n s6xmo5gP6dsospbrvmxOYgVNAq4k0Bo=", "X-Google-Smtp-Source": "\n ABdhPJz6Cz3411O97cfT5MpRP+VMrBDMkGnXGmwTZDc+Z6QQIbAUOai/O4mppnAdRBYWURq48mo8nA==", "X-Received": "by 2002:a05:6870:d5a2:b0:de:f682:6c4d with SMTP id\n u34-20020a056870d5a200b000def6826c4dmr2930370oao.283.1651776628311;\n Thu, 05 May 2022 11:50:28 -0700 (PDT)", "From": "Daniel Henrique Barboza <danielhb413@gmail.com>", "To": "qemu-devel@nongnu.org", "Cc": "qemu-ppc@nongnu.org, danielhb413@gmail.com, peter.maydell@linaro.org,\n richard.henderson@linaro.org, Frederic Barrat <fbarrat@linux.ibm.com>,\n\t=?utf-8?q?C=C3=A9dric_Le_Goater?= <clg@kaod.org>", "Subject": "[PULL 07/30] ppc/xive: Always recompute the PIPR when pushing an OS\n context", "Date": "Thu, 5 May 2022 15:49:15 -0300", "Message-Id": "<20220505184938.351866-8-danielhb413@gmail.com>", "X-Mailer": "git-send-email 2.32.0", "In-Reply-To": "<20220505184938.351866-1-danielhb413@gmail.com>", "References": "<20220505184938.351866-1-danielhb413@gmail.com>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=UTF-8", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=2001:4860:4864:20::33;\n envelope-from=danielhb413@gmail.com; helo=mail-oa1-x33.google.com", "X-Spam_score_int": "-18", "X-Spam_score": "-1.9", "X-Spam_bar": "-", "X-Spam_report": "(-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001,\n T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "\"Qemu-devel\"\n <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>" }, "content": "From: Frederic Barrat <fbarrat@linux.ibm.com>\n\nThe Post Interrupt Priority Register (PIPR) is not restored like the\nother OS-context related fields of the TIMA when pushing an OS context\non the CPU. It's not needed because it can be calculated from the\nInterrupt Pending Buffer (IPB), which is saved and restored. The PIPR\nmust therefore always be recomputed when pushing an OS context.\n\nThis patch fixes a path on P9 and P10 where it was not done. If there\nwas a pending interrupt when the OS context was pulled, the IPB was\nsaved correctly. When pushing back the context, the code in\nxive_tctx_need_resend() was checking for a interrupt raised while the\ncontext was not on the CPU, saved in the NVT. If one was found, then\nit was merged with the saved IPB and the PIPR updated and everything\nwas fine. However, if there was no interrupt found in the NVT, then\nxive_tctx_ipb_update() was not being called and the PIPR was not\nupdated. This patch fixes it by always calling xive_tctx_ipb_update().\n\nNote that on P10 (xive2.c) and because of the above, there's no longer\nany need to check the CPPR value so it can go away.\n\nReviewed-by: Cédric Le Goater <clg@kaod.org>\nSigned-off-by: Frederic Barrat <fbarrat@linux.ibm.com>\nMessage-Id: <20220429071620.177142-2-fbarrat@linux.ibm.com>\nSigned-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>\n---\n hw/intc/xive.c | 11 ++++++++---\n hw/intc/xive2.c | 16 +++++++++-------\n 2 files changed, 17 insertions(+), 10 deletions(-)", "diff": "diff --git a/hw/intc/xive.c b/hw/intc/xive.c\nindex b8e4c7294d..c729f6a478 100644\n--- a/hw/intc/xive.c\n+++ b/hw/intc/xive.c\n@@ -413,10 +413,15 @@ static void xive_tctx_need_resend(XiveRouter *xrtr, XiveTCTX *tctx,\n /* Reset the NVT value */\n nvt.w4 = xive_set_field32(NVT_W4_IPB, nvt.w4, 0);\n xive_router_write_nvt(xrtr, nvt_blk, nvt_idx, &nvt, 4);\n-\n- /* Merge in current context */\n- xive_tctx_ipb_update(tctx, TM_QW1_OS, ipb);\n }\n+ /*\n+ * Always call xive_tctx_ipb_update(). Even if there were no\n+ * escalation triggered, there could be a pending interrupt which\n+ * was saved when the context was pulled and that we need to take\n+ * into account by recalculating the PIPR (which is not\n+ * saved/restored).\n+ */\n+ xive_tctx_ipb_update(tctx, TM_QW1_OS, ipb);\n }\n \n /*\ndiff --git a/hw/intc/xive2.c b/hw/intc/xive2.c\nindex 3aff42a69e..400fd70aa8 100644\n--- a/hw/intc/xive2.c\n+++ b/hw/intc/xive2.c\n@@ -316,7 +316,6 @@ static void xive2_tctx_need_resend(Xive2Router *xrtr, XiveTCTX *tctx,\n {\n Xive2Nvp nvp;\n uint8_t ipb;\n- uint8_t cppr = 0;\n \n /*\n * Grab the associated thread interrupt context registers in the\n@@ -337,7 +336,7 @@ static void xive2_tctx_need_resend(Xive2Router *xrtr, XiveTCTX *tctx,\n /* Automatically restore thread context registers */\n if (xive2_router_get_config(xrtr) & XIVE2_VP_SAVE_RESTORE &&\n do_restore) {\n- cppr = xive2_tctx_restore_os_ctx(xrtr, tctx, nvp_blk, nvp_idx, &nvp);\n+ xive2_tctx_restore_os_ctx(xrtr, tctx, nvp_blk, nvp_idx, &nvp);\n }\n \n ipb = xive_get_field32(NVP2_W2_IPB, nvp.w2);\n@@ -345,11 +344,14 @@ static void xive2_tctx_need_resend(Xive2Router *xrtr, XiveTCTX *tctx,\n nvp.w2 = xive_set_field32(NVP2_W2_IPB, nvp.w2, 0);\n xive2_router_write_nvp(xrtr, nvp_blk, nvp_idx, &nvp, 2);\n }\n-\n- /* An IPB or CPPR change can trigger a resend */\n- if (ipb || cppr) {\n- xive_tctx_ipb_update(tctx, TM_QW1_OS, ipb);\n- }\n+ /*\n+ * Always call xive_tctx_ipb_update(). Even if there were no\n+ * escalation triggered, there could be a pending interrupt which\n+ * was saved when the context was pulled and that we need to take\n+ * into account by recalculating the PIPR (which is not\n+ * saved/restored).\n+ */\n+ xive_tctx_ipb_update(tctx, TM_QW1_OS, ipb);\n }\n \n /*\n", "prefixes": [ "PULL", "07/30" ] }