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GET /api/patches/1624910/?format=api
{ "id": 1624910, "url": "http://patchwork.ozlabs.org/api/patches/1624910/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20220501142357.16778-6-pali@kernel.org/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20220501142357.16778-6-pali@kernel.org>", "list_archive_url": null, "date": "2022-05-01T14:23:56", "name": "[5/6] board: freescale: p1_p2_rdb_pc: Fix size of FLASH NOR mapping", "commit_ref": null, "pull_url": null, "state": "rejected", "archived": false, "hash": "91b7dda5089f5c23f75d28b4b1f1492311d60c51", "submitter": { "id": 78810, "url": "http://patchwork.ozlabs.org/api/people/78810/?format=api", "name": "Pali Rohár", "email": "pali@kernel.org" }, "delegate": { "id": 3651, "url": "http://patchwork.ozlabs.org/api/users/3651/?format=api", "username": "trini", "first_name": "Tom", "last_name": "Rini", "email": "trini@ti.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20220501142357.16778-6-pali@kernel.org/mbox/", "series": [ { "id": 297864, "url": "http://patchwork.ozlabs.org/api/series/297864/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=297864", "date": "2022-05-01T14:23:51", "name": "board: freescale: p1_p2_rdb_pc: Fix sizes of LBC peripherals", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/297864/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1624910/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1624910/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "bilbo.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=uoTpDDDa;\n\tdkim-atps=neutral", "ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de;\n envelope-from=u-boot-bounces@lists.denx.de; receiver=<UNKNOWN>)", "phobos.denx.de;\n dmarc=pass (p=none dis=none) header.from=kernel.org", "phobos.denx.de;\n spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de", "phobos.denx.de;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.b=\"uoTpDDDa\";\n\tdkim-atps=neutral", "phobos.denx.de;\n dmarc=pass (p=none dis=none) header.from=kernel.org", "phobos.denx.de; spf=pass smtp.mailfrom=pali@kernel.org" ], "Received": [ "from phobos.denx.de (phobos.denx.de\n [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest\n SHA256)\n\t(No client certificate requested)\n\tby bilbo.ozlabs.org (Postfix) with ESMTPS id 4KrpSq5w0Bz9s2R\n\tfor <incoming@patchwork.ozlabs.org>; Mon, 2 May 2022 00:26:51 +1000 (AEST)", "from h2850616.stratoserver.net (localhost [IPv6:::1])\n\tby phobos.denx.de (Postfix) with ESMTP id 3356083F2D;\n\tSun, 1 May 2022 16:26:13 +0200 (CEST)", "by phobos.denx.de (Postfix, from userid 109)\n id 3268F83F05; Sun, 1 May 2022 16:26:06 +0200 (CEST)", "from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75])\n (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n (No client certificate requested)\n by phobos.denx.de (Postfix) with ESMTPS id EC49783F13\n for <u-boot@lists.denx.de>; Sun, 1 May 2022 16:25:58 +0200 (CEST)", "from smtp.kernel.org (relay.kernel.org [52.25.139.140])\n (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n (No client certificate requested)\n by ams.source.kernel.org (Postfix) with ESMTPS id 808A4B80CE1;\n Sun, 1 May 2022 14:25:58 +0000 (UTC)", "by smtp.kernel.org (Postfix) with ESMTPSA id 16B5EC385B1;\n Sun, 1 May 2022 14:25:57 +0000 (UTC)", "by pali.im (Postfix)\n id C5B71942; Sun, 1 May 2022 16:25:56 +0200 (CEST)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-2.7 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH,\n DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,\n SPF_PASS autolearn=ham autolearn_force=no version=3.4.2", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org;\n s=k20201202; t=1651415157;\n bh=IrwRRtaOh7q/ZZVXwABPj1pLYC35p/+HVHe+MJOXdgQ=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n b=uoTpDDDaWB2mNZMC+JEehsrPsRLMJvQpvAoM0CfsMg3bJwDUROl7sOudDXc0x/0ww\n 8ZxZlQkmfBDmvJd1QZnC65UzBvbFuxwsnN97tXatQ6GOyN+c7osAsJc+ZnplHrdzr3\n 3/UcjPPyE8UvqCe7+M1dEcltlL7j0BoLxRmYP1Of01qpNd43P08wl6ixzxMP5dAqdT\n 5dTSyUhHqx+9LBpHy4mEyrpC7xsc9T7bQcnZJW9VvyB9/7KsmqzwCrY/yCc4JPg+GG\n 2ckwdf0HyOawt4VGExQQXjDwLc1znrbdI6zLULBxHY3aEBF1TNh/NQpdvwPUDJ1DDY\n jNOqYdtZ4FCYg==", "From": "=?utf-8?q?Pali_Roh=C3=A1r?= <pali@kernel.org>", "To": "Tom Rini <trini@konsulko.com>", "Cc": "u-boot@lists.denx.de", "Subject": "[PATCH 5/6] board: freescale: p1_p2_rdb_pc: Fix size of FLASH NOR\n mapping", "Date": "Sun, 1 May 2022 16:23:56 +0200", "Message-Id": "<20220501142357.16778-6-pali@kernel.org>", "X-Mailer": "git-send-email 2.20.1", "In-Reply-To": "<20220501142357.16778-1-pali@kernel.org>", "References": "<20220501142357.16778-1-pali@kernel.org>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=UTF-8", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.39", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.103.5 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "FLASH NOR on P1020RDB-PD has size of 64 MB. On all other P1/P2 RDB boards\nit has only size of 16 MB. So fix this size in TLB, LAW and LBC OR\nregisters.\n\nSigned-off-by: Pali Rohár <pali@kernel.org>\n---\n board/freescale/p1_p2_rdb_pc/law.c | 4 ++++\n board/freescale/p1_p2_rdb_pc/tlb.c | 6 ++++++\n include/configs/p1_p2_rdb_pc.h | 7 +++++++\n 3 files changed, 17 insertions(+)", "diff": "diff --git a/board/freescale/p1_p2_rdb_pc/law.c b/board/freescale/p1_p2_rdb_pc/law.c\nindex 901145ded3b0..80adf21a1183 100644\n--- a/board/freescale/p1_p2_rdb_pc/law.c\n+++ b/board/freescale/p1_p2_rdb_pc/law.c\n@@ -13,7 +13,11 @@ struct law_entry law_table[] = {\n #ifdef CONFIG_VSC7385_ENET\n \tSET_LAW(CONFIG_SYS_VSC7385_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_LBC),\n #endif\n+#ifdef CONFIG_TARGET_P1020RDB_PD\n \tSET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_64M, LAW_TRGT_IF_LBC),\n+#else\n+\tSET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_LBC),\n+#endif\n #ifdef CONFIG_SYS_NAND_BASE_PHYS\n \tSET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_32K, LAW_TRGT_IF_LBC),\n #endif\ndiff --git a/board/freescale/p1_p2_rdb_pc/tlb.c b/board/freescale/p1_p2_rdb_pc/tlb.c\nindex ca47e15067a4..5bbeae302ad0 100644\n--- a/board/freescale/p1_p2_rdb_pc/tlb.c\n+++ b/board/freescale/p1_p2_rdb_pc/tlb.c\n@@ -39,9 +39,15 @@ struct fsl_e_tlb_entry tlb_table[] = {\n #ifndef CONFIG_SPL_BUILD\n \t/* W**G* - Flash/promjet, localbus */\n \t/* This will be changed to *I*G* after relocation to RAM. */\n+#ifdef CONFIG_TARGET_P1020RDB_PD\n \tSET_TLB_ENTRY(1, CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE_PHYS,\n \t\t\tMAS3_SX|MAS3_SR, MAS2_W|MAS2_G,\n \t\t\t0, 2, BOOKE_PAGESZ_64M, 1),\n+#else\n+\tSET_TLB_ENTRY(1, CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE_PHYS,\n+\t\t\tMAS3_SX|MAS3_SR, MAS2_W|MAS2_G,\n+\t\t\t0, 2, BOOKE_PAGESZ_16M, 1),\n+#endif\n \n #ifdef CONFIG_PCI\n \t/* *I*G* - PCI memory 1.5G */\ndiff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h\nindex 69fbb4ad8fe4..cf84f4045538 100644\n--- a/include/configs/p1_p2_rdb_pc.h\n+++ b/include/configs/p1_p2_rdb_pc.h\n@@ -243,10 +243,17 @@\n #define CONFIG_FLASH_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) \\\n \t| BR_PS_16 | BR_V)\n \n+#if defined(CONFIG_TARGET_P1020RDB_PD)\n #define CONFIG_FLASH_OR_PRELIM\t\t(OR_AM_64MB | OR_GPCM_CSNT | \\\n \t\t\t\t\t OR_GPCM_ACS_DIV2 | OR_GPCM_XACS | \\\n \t\t\t\t\t OR_GPCM_SCY_15 | OR_GPCM_TRLX | \\\n \t\t\t\t\t OR_GPCM_EHTR | OR_GPCM_EAD)\n+#else\n+#define CONFIG_FLASH_OR_PRELIM\t\t(OR_AM_16MB | OR_GPCM_CSNT | \\\n+\t\t\t\t\t OR_GPCM_ACS_DIV2 | OR_GPCM_XACS | \\\n+\t\t\t\t\t OR_GPCM_SCY_15 | OR_GPCM_TRLX | \\\n+\t\t\t\t\t OR_GPCM_EHTR | OR_GPCM_EAD)\n+#endif\n \n #define CONFIG_SYS_FLASH_BANKS_LIST\t{CONFIG_SYS_FLASH_BASE_PHYS}\n #define CONFIG_SYS_FLASH_QUIET_TEST\n", "prefixes": [ "5/6" ] }