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GET /api/patches/1624887/?format=api
{ "id": 1624887, "url": "http://patchwork.ozlabs.org/api/patches/1624887/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20220501122314.32626-1-pali@kernel.org/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20220501122314.32626-1-pali@kernel.org>", "list_archive_url": null, "date": "2022-05-01T12:23:12", "name": "[1/3] board: freescale: p1_p2_rdb_pc: Add workaround for board reset reboot loop", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "1241f8d93c0983189eda8181712d280dac1f307a", "submitter": { "id": 78810, "url": "http://patchwork.ozlabs.org/api/people/78810/?format=api", "name": "Pali Rohár", "email": "pali@kernel.org" }, "delegate": { "id": 55230, "url": "http://patchwork.ozlabs.org/api/users/55230/?format=api", "username": "freenix", "first_name": "Peng", "last_name": "Fan", "email": "van.freenix@gmail.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20220501122314.32626-1-pali@kernel.org/mbox/", "series": [ { "id": 297857, "url": "http://patchwork.ozlabs.org/api/series/297857/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=297857", "date": "2022-05-01T12:23:13", "name": "[1/3] board: freescale: p1_p2_rdb_pc: Add workaround for board reset reboot loop", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/297857/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1624887/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1624887/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "bilbo.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=vE8HmPRP;\n\tdkim-atps=neutral", "ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=85.214.62.61; helo=phobos.denx.de;\n envelope-from=u-boot-bounces@lists.denx.de; receiver=<UNKNOWN>)", "phobos.denx.de;\n dmarc=pass (p=none dis=none) header.from=kernel.org", "phobos.denx.de;\n spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de", "phobos.denx.de;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.b=\"vE8HmPRP\";\n\tdkim-atps=neutral", "phobos.denx.de;\n dmarc=pass (p=none dis=none) header.from=kernel.org", "phobos.denx.de; spf=pass smtp.mailfrom=pali@kernel.org" ], "Received": [ "from phobos.denx.de (phobos.denx.de [85.214.62.61])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest\n SHA256)\n\t(No client certificate requested)\n\tby bilbo.ozlabs.org (Postfix) with ESMTPS id 4KrlmV5trrz9s5V\n\tfor <incoming@patchwork.ozlabs.org>; Sun, 1 May 2022 22:25:14 +1000 (AEST)", "from h2850616.stratoserver.net (localhost [IPv6:::1])\n\tby phobos.denx.de (Postfix) with ESMTP id EBBAE83F0E;\n\tSun, 1 May 2022 14:24:58 +0200 (CEST)", "by phobos.denx.de (Postfix, from userid 109)\n id A5DD883BBF; Sun, 1 May 2022 14:24:54 +0200 (CEST)", "from ams.source.kernel.org (ams.source.kernel.org\n [IPv6:2604:1380:4601:e00::1])\n (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n (No client certificate requested)\n by phobos.denx.de (Postfix) with ESMTPS id 0C12B83C8C\n for <u-boot@lists.denx.de>; Sun, 1 May 2022 14:24:51 +0200 (CEST)", "from smtp.kernel.org (relay.kernel.org [52.25.139.140])\n (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n (No client certificate requested)\n by ams.source.kernel.org (Postfix) with ESMTPS id 86049B80D0B;\n Sun, 1 May 2022 12:24:50 +0000 (UTC)", "by smtp.kernel.org (Postfix) with ESMTPSA id 24EF0C385AA;\n Sun, 1 May 2022 12:24:48 +0000 (UTC)", "by pali.im (Postfix)\n id 596DB942; Sun, 1 May 2022 14:24:45 +0200 (CEST)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-2.7 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH,\n DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,\n SPF_PASS autolearn=ham autolearn_force=no version=3.4.2", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org;\n s=k20201202; t=1651407889;\n bh=DWmnemDRCNo3IEiuP/ERSJlYTYHNG4+eunTXStULRGo=;\n h=From:To:Cc:Subject:Date:From;\n b=vE8HmPRPUef13BbmHFDez8i0Z7E4rfXXETtZu9LBKLfktk+/xc1T0iQiaTZIZypTm\n FtWe9BvzyHlGEcxLSd6/+Tn6+kSe1+33jU4h4Em8kPeS8O7A8Top2Us+eLSfIIS5YQ\n w8uZcrJScpwob+I+TGzz+GE7vlV4mBzY8Pg0U1syjmmidVfj34TY2zdcVtUCkI590K\n yNBO4HiaYDEmB8/54z1f9rEmiaVn0LLW5UxkwVRKZBeHKKSnevYrE6iyNg7OL8karE\n ggCWgqH1RoV4UT90SCj9gQVawgHx2HNy90Dy+XpmWwd0xL4aXuDY+9zCHg22KWKQ8j\n DKZRf+m6hsHyw==", "From": "=?utf-8?q?Pali_Roh=C3=A1r?= <pali@kernel.org>", "To": "Priyanka Jain <priyanka.jain@nxp.com>,\n\tSinan Akman <sinan@writeme.com>", "Cc": "u-boot@lists.denx.de", "Subject": "[PATCH 1/3] board: freescale: p1_p2_rdb_pc: Add workaround for board\n reset reboot loop", "Date": "Sun, 1 May 2022 14:23:12 +0200", "Message-Id": "<20220501122314.32626-1-pali@kernel.org>", "X-Mailer": "git-send-email 2.20.1", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=UTF-8", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.39", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.103.5 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "CPLD's system reset register on P1/P2 RDB boards is not autocleared after\nflipping it. If this register is set to one then CPLD triggers reset of CPU\nin few ms.\n\nThis means that trying to reset board via CPLD system reset register cause\nreboot loop. To prevent this reboot loop, the only workaround is to try to\nclear CPLD's system reset register as early as possible. U-Boot is already\ndoing it in its board_early_init_f() function, which seems to be enough as\nregister is cleared prior CPLD triggers another reset.\n\nBut board_early_init_f() is not called from SPL and therefore usage of SPL\ncan cause reboot loop.\n\nTo prevent reboot loop when using SPL, calls board_early_init_f() function\nin SPL too. For accessing CPLD memory space it is needed to have CPLD entry\nin TLB.\n\nWith this change it is possible to trigger board reset via CPLD's system\nreset register on P2020 RDB board.\n\nSigned-off-by: Pali Rohár <pali@kernel.org>\n---\n board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c | 10 ++++++++++\n board/freescale/p1_p2_rdb_pc/spl.c | 6 ++++++\n board/freescale/p1_p2_rdb_pc/tlb.c | 2 +-\n 3 files changed, 17 insertions(+), 1 deletion(-)", "diff": "diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c\nindex 7b168fa091b1..26ea8a525228 100644\n--- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c\n+++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c\n@@ -91,6 +91,16 @@ void board_cpld_init(void)\n \tout_8(&cpld_data->status_led, CPLD_STATUS_LED);\n \tout_8(&cpld_data->fxo_led, CPLD_FXO_LED);\n \tout_8(&cpld_data->fxs_led, CPLD_FXS_LED);\n+\n+\t/*\n+\t * CPLD's system reset register on P1/P2 RDB boards is not autocleared\n+\t * after flipping it. If this register is set to one then CPLD triggers\n+\t * reset of CPU in few ms.\n+\t *\n+\t * This means that trying to reset board via CPLD system reset register\n+\t * cause reboot loop. To prevent this reboot loop, the only workaround\n+\t * is to try to clear CPLD's system reset register as early as possible.\n+\t */\n \tout_8(&cpld_data->system_rst, CPLD_SYS_RST);\n }\n \ndiff --git a/board/freescale/p1_p2_rdb_pc/spl.c b/board/freescale/p1_p2_rdb_pc/spl.c\nindex 22156f2824ec..def28665960d 100644\n--- a/board/freescale/p1_p2_rdb_pc/spl.c\n+++ b/board/freescale/p1_p2_rdb_pc/spl.c\n@@ -31,6 +31,12 @@ void board_init_f(ulong bootflag)\n \tu32 plat_ratio, bus_clk;\n \tccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;\n \n+\t/*\n+\t * Call board_early_init_f() as early as possible as it workarounds\n+\t * reboot loop due to broken CPLD state machine for reset line.\n+\t */\n+\tboard_early_init_f();\n+\n \tconsole_init_f();\n \n \t/* Set pmuxcr to allow both i2c1 and i2c2 */\ndiff --git a/board/freescale/p1_p2_rdb_pc/tlb.c b/board/freescale/p1_p2_rdb_pc/tlb.c\nindex 13f3a1edf68d..2d431d6d0d90 100644\n--- a/board/freescale/p1_p2_rdb_pc/tlb.c\n+++ b/board/freescale/p1_p2_rdb_pc/tlb.c\n@@ -61,11 +61,11 @@ struct fsl_e_tlb_entry tlb_table[] = {\n \t\t\tMAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,\n \t\t\t0, 5, BOOKE_PAGESZ_1M, 1),\n #endif\n+#endif /* not SPL */\n \n \tSET_TLB_ENTRY(1, CONFIG_SYS_CPLD_BASE, CONFIG_SYS_CPLD_BASE_PHYS,\n \t\t\tMAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,\n \t\t\t0, 6, BOOKE_PAGESZ_1M, 1),\n-#endif /* not SPL */\n \n #ifdef CONFIG_SYS_NAND_BASE\n \t/* *I*G - NAND */\n", "prefixes": [ "1/3" ] }