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GET /api/patches/1614410/?format=api
{ "id": 1614410, "url": "http://patchwork.ozlabs.org/api/patches/1614410/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20220407101624.15850-12-pali@kernel.org/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20220407101624.15850-12-pali@kernel.org>", "list_archive_url": null, "date": "2022-04-07T10:16:24", "name": "[11/11] board: freescale: p1_p2_rdb_pc: Add env commands norlowerboot, norupperboot, sd2boot and defboot", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "6af3c99532166626e38354c9600a93d7ed0c0928", "submitter": { "id": 78810, "url": "http://patchwork.ozlabs.org/api/people/78810/?format=api", "name": "Pali Rohár", "email": "pali@kernel.org" }, "delegate": { "id": 87636, "url": "http://patchwork.ozlabs.org/api/users/87636/?format=api", "username": "priyankajain", "first_name": "Priyanka", "last_name": "Jain", "email": "priyanka.jain@nxp.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20220407101624.15850-12-pali@kernel.org/mbox/", "series": [ { "id": 293984, "url": "http://patchwork.ozlabs.org/api/series/293984/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=293984", "date": "2022-04-07T10:16:13", "name": "board: freescale: p1_p2_rdb_pc: Various cleanups and fixes", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/293984/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1614410/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1614410/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "bilbo.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=nc0uKC5f;\n\tdkim-atps=neutral", "ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=85.214.62.61; helo=phobos.denx.de;\n envelope-from=u-boot-bounces@lists.denx.de; receiver=<UNKNOWN>)", "phobos.denx.de;\n dmarc=pass (p=none dis=none) header.from=kernel.org", "phobos.denx.de;\n spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de", "phobos.denx.de;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.b=\"nc0uKC5f\";\n\tdkim-atps=neutral", "phobos.denx.de;\n dmarc=pass (p=none dis=none) header.from=kernel.org", "phobos.denx.de; spf=pass smtp.mailfrom=pali@kernel.org" ], "Received": [ "from phobos.denx.de (phobos.denx.de [85.214.62.61])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange X25519 server-signature RSA-PSS (4096 bits))\n\t(No client certificate requested)\n\tby bilbo.ozlabs.org (Postfix) with ESMTPS id 4KYy713tN7z9sGj\n\tfor <incoming@patchwork.ozlabs.org>; Thu, 7 Apr 2022 20:19:57 +1000 (AEST)", "from h2850616.stratoserver.net (localhost [IPv6:::1])\n\tby phobos.denx.de (Postfix) with ESMTP id B103983DBA;\n\tThu, 7 Apr 2022 12:19:18 +0200 (CEST)", "by phobos.denx.de (Postfix, from userid 109)\n id CB04183D0D; Thu, 7 Apr 2022 12:18:02 +0200 (CEST)", "from dfw.source.kernel.org (dfw.source.kernel.org\n [IPv6:2604:1380:4641:c500::1])\n (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n (No client certificate requested)\n by phobos.denx.de (Postfix) with ESMTPS id 323A983CA3\n for <u-boot@lists.denx.de>; Thu, 7 Apr 2022 12:17:44 +0200 (CEST)", "from smtp.kernel.org (relay.kernel.org [52.25.139.140])\n (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n (No client certificate requested)\n by dfw.source.kernel.org (Postfix) with ESMTPS id DD0A161D5C;\n Thu, 7 Apr 2022 10:17:42 +0000 (UTC)", "by smtp.kernel.org (Postfix) with ESMTPSA id 5A465C385A6;\n Thu, 7 Apr 2022 10:17:42 +0000 (UTC)", "by pali.im (Postfix)\n id 131E7B6E; Thu, 7 Apr 2022 12:17:42 +0200 (CEST)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH,\n DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,\n SPF_PASS,T_SCC_BODY_TEXT_LINE,UPPERCASE_50_75 autolearn=no\n autolearn_force=no version=3.4.2", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org;\n s=k20201202; t=1649326662;\n bh=7TBF4JCI3KATJaNowAAEZCuRdgiWhvnhJDRXrseApvc=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n b=nc0uKC5fKU+Balwd2nxu+hlI8CQ5kTJpz4iOasCqPmEAoWw/Acl3rPlhcKLLZ7JqM\n OJUvcwfZv0nzpCdTWmWqvY6L9qILXzdO6GtXsgGXaxRiKTyOeJICy4PFLcxqE826dL\n 58mTSe6syMtS6ifKgqC26Yq1O4C3Bent72en83bi14uzJuEp5ienyX/mH4TZjFl53I\n i86MetPuQRcycpkwVrpIb0tgojUgg3UASbhPQvQPsFZnLkhZkrVE1NLwlwaWKM1ejD\n aUtq5qHtwPVEIEOeNI0cIvAV7Tl6psgKHb6+EO8wZEV6DyIIZeGXlJQdcmEcjWnCR0\n EMntjLjBU0/MA==", "From": "=?utf-8?q?Pali_Roh=C3=A1r?= <pali@kernel.org>", "To": "Priyanka Jain <priyanka.jain@nxp.com>, Qiang Zhao <qiang.zhao@nxp.com>,\n Shengzhou Liu <Shengzhou.Liu@nxp.com>, Sinan Akman <sinan@writeme.com>", "Cc": "u-boot@lists.denx.de", "Subject": "[PATCH 11/11] board: freescale: p1_p2_rdb_pc: Add env commands\n norlowerboot, norupperboot, sd2boot and defboot", "Date": "Thu, 7 Apr 2022 12:16:24 +0200", "Message-Id": "<20220407101624.15850-12-pali@kernel.org>", "X-Mailer": "git-send-email 2.20.1", "In-Reply-To": "<20220407101624.15850-1-pali@kernel.org>", "References": "<20220407101624.15850-1-pali@kernel.org>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=UTF-8", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.39", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.103.5 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "All *boot env commands overrides default BootROM boot location via i2c.\nBootROM then starts booting U-Boot from this specified location instead of\nthe default one.\n\nAdd new env command defboot which reverts BootROM boot location to the\ndefault value, which in most cases is configurable by HW DIP switches.\n\nAnd add new env commands norlowerboot, norupperboot, sd2boot to boot from\nother locations. norlowerboot would instruct BootROM to boot from lower NOR\nbank, norupperboot from upper NOR bank and sd2boot from SD card with\nalternative configuration.\n\nSigned-off-by: Pali Rohár <pali@kernel.org>\n---\n include/configs/p1_p2_bootrom.h | 14 +++++++++++++\n include/configs/p1_p2_rdb_pc.h | 37 +++++++++++++++++++++++++++++++++\n 2 files changed, 51 insertions(+)", "diff": "diff --git a/include/configs/p1_p2_bootrom.h b/include/configs/p1_p2_bootrom.h\nindex a1f61b788cf7..d1e91049606b 100644\n--- a/include/configs/p1_p2_bootrom.h\n+++ b/include/configs/p1_p2_bootrom.h\n@@ -15,6 +15,14 @@\n #define CHANGE_BOOTROM_SOURCE_DEF_NOR_BANK_CMD CHANGE_BOOTROM_SOURCE_CMD(__SW_BOOT_NOR, __SW_BOOT_MASK)\n #endif\n \n+#ifdef __SW_BOOT_NOR_BANK_LO\n+#define CHANGE_BOOTROM_SOURCE_LOWER_NOR_BANK_CMD CHANGE_BOOTROM_SOURCE_CMD(__SW_BOOT_NOR_BANK_LO, __SW_BOOT_NOR_BANK_MASK)\n+#endif\n+\n+#ifdef __SW_BOOT_NOR_BANK_UP\n+#define CHANGE_BOOTROM_SOURCE_UPPER_NOR_BANK_CMD CHANGE_BOOTROM_SOURCE_CMD(__SW_BOOT_NOR_BANK_UP, __SW_BOOT_NOR_BANK_MASK)\n+#endif\n+\n #ifdef __SW_BOOT_SPI\n #define CHANGE_BOOTROM_SOURCE_SPI_CMD CHANGE_BOOTROM_SOURCE_CMD(__SW_BOOT_SPI, __SW_BOOT_MASK)\n #endif\n@@ -23,6 +31,10 @@\n #define CHANGE_BOOTROM_SOURCE_SD_CMD CHANGE_BOOTROM_SOURCE_CMD(__SW_BOOT_SD, __SW_BOOT_MASK)\n #endif\n \n+#ifdef __SW_BOOT_SD2\n+#define CHANGE_BOOTROM_SOURCE_SD2_CMD CHANGE_BOOTROM_SOURCE_CMD(__SW_BOOT_SD2, __SW_BOOT_MASK)\n+#endif\n+\n #ifdef __SW_BOOT_NAND\n #define CHANGE_BOOTROM_SOURCE_NAND_CMD CHANGE_BOOTROM_SOURCE_CMD(__SW_BOOT_NAND, __SW_BOOT_MASK)\n #endif\n@@ -30,3 +42,5 @@\n #ifdef __SW_BOOT_PCIE\n #define CHANGE_BOOTROM_SOURCE_PCIE_CMD CHANGE_BOOTROM_SOURCE_CMD(__SW_BOOT_PCIE, __SW_BOOT_MASK)\n #endif\n+\n+#define CHANGE_BOOTROM_SOURCE_DEF_CMD CHANGE_BOOTROM_SOURCE_CMD(0x00, 0xff)\ndiff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h\nindex d41b31081017..ac8199a88aa0 100644\n--- a/include/configs/p1_p2_rdb_pc.h\n+++ b/include/configs/p1_p2_rdb_pc.h\n@@ -25,6 +25,9 @@\n #define __SW_NOR_BANK_MASK\t0xfd\n #define __SW_NOR_BANK_UP\t0x00\n #define __SW_NOR_BANK_LO\t0x02\n+#define __SW_BOOT_NOR_BANK_UP\t0x5c /* (__SW_BOOT_NOR | __SW_NOR_BANK_UP) */\n+#define __SW_BOOT_NOR_BANK_LO\t0x5e /* (__SW_BOOT_NOR | __SW_NOR_BANK_LO) */\n+#define __SW_BOOT_NOR_BANK_MASK\t0x01 /* (__SW_BOOT_MASK & __SW_NOR_BANK_MASK) */\n #define CONFIG_SYS_L2_SIZE\t(256 << 10)\n #endif\n \n@@ -54,6 +57,9 @@\n #define __SW_NOR_BANK_MASK\t0xfd\n #define __SW_NOR_BANK_UP\t0x00\n #define __SW_NOR_BANK_LO\t0x02\n+#define __SW_BOOT_NOR_BANK_UP\t0x64 /* (__SW_BOOT_NOR | __SW_NOR_BANK_UP) */\n+#define __SW_BOOT_NOR_BANK_LO\t0x66 /* (__SW_BOOT_NOR | __SW_NOR_BANK_LO) */\n+#define __SW_BOOT_NOR_BANK_MASK\t0x01 /* (__SW_BOOT_MASK & __SW_NOR_BANK_MASK) */\n #define CONFIG_SYS_L2_SIZE\t(256 << 10)\n /*\n * Dynamic MTD Partition support with mtdparts\n@@ -73,6 +79,9 @@\n #define __SW_NOR_BANK_MASK\t0xfd\n #define __SW_NOR_BANK_UP\t0x00\n #define __SW_NOR_BANK_LO\t0x02\n+#define __SW_BOOT_NOR_BANK_UP\t0xc8 /* (__SW_BOOT_NOR | __SW_NOR_BANK_UP) */\n+#define __SW_BOOT_NOR_BANK_LO\t0xca /* (__SW_BOOT_NOR | __SW_NOR_BANK_LO) */\n+#define __SW_BOOT_NOR_BANK_MASK\t0x01 /* (__SW_BOOT_MASK & __SW_NOR_BANK_MASK) */\n #define CONFIG_SYS_L2_SIZE\t(512 << 10)\n /*\n * Dynamic MTD Partition support with mtdparts\n@@ -595,6 +604,18 @@\n #define __NOR_RST_CMD \"\"\n #endif\n \n+#ifdef CHANGE_BOOTROM_SOURCE_LOWER_NOR_BANK_CMD\n+#define __NOR_LOWER_RST_CMD \"norlowerboot=\"__stringify(CHANGE_BOOTROM_SOURCE_LOWER_NOR_BANK_CMD)\"; reset\\0\"\n+#else\n+#define __NOR_LOWER_RST_CMD \"\"\n+#endif\n+\n+#ifdef CHANGE_BOOTROM_SOURCE_UPPER_NOR_BANK_CMD\n+#define __NOR_UPPER_RST_CMD \"norupperboot=\"__stringify(CHANGE_BOOTROM_SOURCE_UPPER_NOR_BANK_CMD)\"; reset\\0\"\n+#else\n+#define __NOR_UPPER_RST_CMD \"\"\n+#endif\n+\n #ifdef CHANGE_BOOTROM_SOURCE_SPI_CMD\n #define __SPI_RST_CMD \"spiboot=\"__stringify(CHANGE_BOOTROM_SOURCE_SPI_CMD)\"; reset\\0\"\n #else\n@@ -607,6 +628,12 @@\n #define __SD_RST_CMD \"\"\n #endif\n \n+#ifdef CHANGE_BOOTROM_SOURCE_SD2_CMD\n+#define __SD2_RST_CMD \"sd2boot=\"__stringify(CHANGE_BOOTROM_SOURCE_SD2_CMD)\"; reset\\0\"\n+#else\n+#define __SD2_RST_CMD \"\"\n+#endif\n+\n #ifdef CHANGE_BOOTROM_SOURCE_NAND_CMD\n #define __NAND_RST_CMD \"nandboot=\"__stringify(CHANGE_BOOTROM_SOURCE_NAND_CMD)\"; reset\\0\"\n #else\n@@ -619,6 +646,12 @@\n #define __PCIE_RST_CMD \"\"\n #endif\n \n+#ifdef CHANGE_BOOTROM_SOURCE_DEF_CMD\n+#define __DEF_RST_CMD \"defboot=\"__stringify(CHANGE_BOOTROM_SOURCE_DEF_CMD)\"; reset\\0\"\n+#else\n+#define __DEF_RST_CMD \"\"\n+#endif\n+\n #define\tCONFIG_EXTRA_ENV_SETTINGS\t\\\n \"netdev=eth0\\0\"\t\\\n \"uboot=\" __stringify(CONFIG_UBOOTPATH) \"\\0\"\t\\\n@@ -647,10 +680,14 @@ __VSCFW_ADDR\t\\\n __MAP_NOR_LOWER_CMD\t\\\n __MAP_NOR_UPPER_CMD\t\\\n __NOR_RST_CMD\t\\\n+__NOR_LOWER_RST_CMD\t\\\n+__NOR_UPPER_RST_CMD\t\\\n __SPI_RST_CMD\t\\\n __SD_RST_CMD\t\\\n+__SD2_RST_CMD\t\\\n __NAND_RST_CMD\t\\\n __PCIE_RST_CMD\t\\\n+__DEF_RST_CMD\t\\\n \"\"\n \n #define CONFIG_USB_FAT_BOOT\t\\\n", "prefixes": [ "11/11" ] }