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{
    "id": 1613425,
    "url": "http://patchwork.ozlabs.org/api/patches/1613425/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20220405131237.405-8-pali@kernel.org/",
    "project": {
        "id": 18,
        "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api",
        "name": "U-Boot",
        "link_name": "uboot",
        "list_id": "u-boot.lists.denx.de",
        "list_email": "u-boot@lists.denx.de",
        "web_url": null,
        "scm_url": null,
        "webscm_url": null,
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<20220405131237.405-8-pali@kernel.org>",
    "list_archive_url": null,
    "date": "2022-04-05T13:12:36",
    "name": "[7/8] powerpc: mpc85xx: Set TEXT_BASE addresses to real base values",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": false,
    "hash": "93cefe293e450d75915eaf631a57c05b7d9e3c74",
    "submitter": {
        "id": 78810,
        "url": "http://patchwork.ozlabs.org/api/people/78810/?format=api",
        "name": "Pali Rohár",
        "email": "pali@kernel.org"
    },
    "delegate": {
        "id": 87636,
        "url": "http://patchwork.ozlabs.org/api/users/87636/?format=api",
        "username": "priyankajain",
        "first_name": "Priyanka",
        "last_name": "Jain",
        "email": "priyanka.jain@nxp.com"
    },
    "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20220405131237.405-8-pali@kernel.org/mbox/",
    "series": [
        {
            "id": 293592,
            "url": "http://patchwork.ozlabs.org/api/series/293592/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=293592",
            "date": "2022-04-05T13:12:33",
            "name": "powerpc: mpc85xx: Fix and cleanup mpc85xx code",
            "version": 1,
            "mbox": "http://patchwork.ozlabs.org/series/293592/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/1613425/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/1613425/checks/",
    "tags": {},
    "related": [],
    "headers": {
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        "From": "=?utf-8?q?Pali_Roh=C3=A1r?= <pali@kernel.org>",
        "To": "Priyanka Jain <priyanka.jain@nxp.com>, Qiang Zhao <qiang.zhao@nxp.com>,\n Shengzhou Liu <Shengzhou.Liu@nxp.com>, Alexander Graf <agraf@csgraf.de>,\n Bin Meng <bmeng.cn@gmail.com>, Wolfgang Denk <wd@denx.de>,\n Sinan Akman <sinan@writeme.com>",
        "Cc": "u-boot@lists.denx.de",
        "Subject": "[PATCH 7/8] powerpc: mpc85xx: Set TEXT_BASE addresses to real base\n values",
        "Date": "Tue,  5 Apr 2022 15:12:36 +0200",
        "Message-Id": "<20220405131237.405-8-pali@kernel.org>",
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        "References": "<20220405131237.405-1-pali@kernel.org>",
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    "content": "Currently CONFIG_SPL_TEXT_BASE and CONFIG_SYS_TEXT_BASE addresses are\nmanually increased by 0x1000 due to .bootpg section. This section has size\nof 0x1000 bytes and is manually put by linker script before .text section\n(and therefore before base address) when CONFIG_SYS_MPC85XX_NO_RESETVEC is\nset. Due to this fact lot of other config options are manually increased by\n0x1000 value to make correct layout. Note that entry point is not on\nCONFIG_SPL_TEXT_BASE (image+0x1000) but it is really on address\nCONFIG_SPL_TEXT_BASE-0x1000 (means at the start of the image).\n\nCleanup handling of .bootpg section when CONFIG_SYS_MPC85XX_NO_RESETVEC is\nset. Put .bootpg code directly into .text section and move text base\naddress to the start of .bootpg code. And finally remove +0x1000 value from\nlot of config options. With this removal custom PHDRS is not used anymore,\nso remove it too.\n\nAfter this change entry point would be at CONFIG_SPL_TEXT_BASE and not at\naddress -0x1000 anymore.\n\nTested on P2020 board with SPL and proper U-Boot.\n\nSigned-off-by: Pali Rohár <pali@kernel.org>\n---\n arch/powerpc/cpu/mpc85xx/start.S             |  4 ++--\n arch/powerpc/cpu/mpc85xx/u-boot-spl.lds      | 15 +++---------\n arch/powerpc/cpu/mpc85xx/u-boot.lds          | 24 ++++++--------------\n configs/P1010RDB-PA_36BIT_NAND_defconfig     |  4 ++--\n configs/P1010RDB-PA_36BIT_SDCARD_defconfig   |  4 ++--\n configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig |  4 ++--\n configs/P1010RDB-PA_NAND_defconfig           |  4 ++--\n configs/P1010RDB-PA_SDCARD_defconfig         |  4 ++--\n configs/P1010RDB-PA_SPIFLASH_defconfig       |  4 ++--\n configs/P1010RDB-PB_36BIT_NAND_defconfig     |  4 ++--\n configs/P1010RDB-PB_36BIT_SDCARD_defconfig   |  4 ++--\n configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig |  4 ++--\n configs/P1010RDB-PB_NAND_defconfig           |  4 ++--\n configs/P1010RDB-PB_SDCARD_defconfig         |  4 ++--\n configs/P1010RDB-PB_SPIFLASH_defconfig       |  4 ++--\n configs/P1020RDB-PC_36BIT_NAND_defconfig     |  4 ++--\n configs/P1020RDB-PC_36BIT_SDCARD_defconfig   |  4 ++--\n configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig |  4 ++--\n configs/P1020RDB-PC_NAND_defconfig           |  4 ++--\n configs/P1020RDB-PC_SDCARD_defconfig         |  4 ++--\n configs/P1020RDB-PC_SPIFLASH_defconfig       |  4 ++--\n configs/P1020RDB-PD_NAND_defconfig           |  4 ++--\n configs/P1020RDB-PD_SDCARD_defconfig         |  4 ++--\n configs/P1020RDB-PD_SPIFLASH_defconfig       |  4 ++--\n configs/P2020RDB-PC_36BIT_NAND_defconfig     |  4 ++--\n configs/P2020RDB-PC_36BIT_SDCARD_defconfig   |  4 ++--\n configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig |  4 ++--\n configs/P2020RDB-PC_NAND_defconfig           |  4 ++--\n configs/P2020RDB-PC_SDCARD_defconfig         |  4 ++--\n configs/P2020RDB-PC_SPIFLASH_defconfig       |  4 ++--\n configs/T1024RDB_NAND_defconfig              |  2 +-\n configs/T1024RDB_SDCARD_defconfig            |  2 +-\n configs/T1024RDB_SPIFLASH_defconfig          |  2 +-\n configs/T1042D4RDB_NAND_defconfig            |  2 +-\n configs/T1042D4RDB_SDCARD_defconfig          |  2 +-\n configs/T1042D4RDB_SPIFLASH_defconfig        |  2 +-\n configs/T2080QDS_NAND_defconfig              |  2 +-\n configs/T2080QDS_SDCARD_defconfig            |  2 +-\n configs/T2080QDS_SPIFLASH_defconfig          |  2 +-\n configs/T2080RDB_NAND_defconfig              |  2 +-\n configs/T2080RDB_SDCARD_defconfig            |  2 +-\n configs/T2080RDB_SPIFLASH_defconfig          |  2 +-\n configs/T2080RDB_revD_NAND_defconfig         |  2 +-\n configs/T2080RDB_revD_SDCARD_defconfig       |  2 +-\n configs/T2080RDB_revD_SPIFLASH_defconfig     |  2 +-\n configs/T4240RDB_SDCARD_defconfig            |  2 +-\n configs/qemu-ppce500_defconfig               |  2 +-\n include/configs/P1010RDB.h                   |  6 ++---\n include/configs/p1_p2_rdb_pc.h               |  6 ++---\n 49 files changed, 89 insertions(+), 108 deletions(-)",
    "diff": "diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S\nindex f62dd79805ca..796a58b929ec 100644\n--- a/arch/powerpc/cpu/mpc85xx/start.S\n+++ b/arch/powerpc/cpu/mpc85xx/start.S\n@@ -1127,7 +1127,7 @@ switch_as:\n \t/*--------------------------------------------------------------*/\n \tlis\tr3,CONFIG_SYS_MONITOR_BASE@h\n \tori\tr3,r3,CONFIG_SYS_MONITOR_BASE@l\n-\taddi\tr3,r3,_start_cont - _start_cont\n+\taddi\tr3,r3,_start_cont - CONFIG_SYS_MONITOR_BASE\n \tmtlr\tr3\n \tblr\n #endif\n@@ -1599,7 +1599,7 @@ relocate_code:\n  * initialization, now running from RAM.\n  */\n \n-\taddi\tr0,r10,in_ram - _start_cont\n+\taddi\tr0,r10,in_ram - CONFIG_SYS_MONITOR_BASE\n \n \t/*\n \t * As IVPR is going to point RAM address,\ndiff --git a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds\nindex 1b4d1e05a4a3..6fd0da9f39b1 100644\n--- a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds\n+++ b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds\n@@ -9,24 +9,15 @@\n #include \"config.h\"\n \n OUTPUT_ARCH(powerpc)\n-#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC\n-PHDRS\n-{\n-\ttext PT_LOAD;\n-\tbss PT_LOAD;\n-}\n-#endif\n+\n SECTIONS\n {\n+\t. = IMAGE_TEXT_BASE;\n+\t.text : {\n /* For ifc, elbc, esdhc, espi, all need the SPL without section .resetvec */\n #ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC\n-\t.bootpg IMAGE_TEXT_BASE - 0x1000 :\n-\t{\n \t\tKEEP(*(.bootpg))\n-\t} :text = 0xffff\n #endif\n-\t. = IMAGE_TEXT_BASE;\n-\t.text : {\n \t\t*(.text*)\n \t}\n \t_etext = .;\ndiff --git a/arch/powerpc/cpu/mpc85xx/u-boot.lds b/arch/powerpc/cpu/mpc85xx/u-boot.lds\nindex e1bbee43bcb4..9f422810bb5d 100644\n--- a/arch/powerpc/cpu/mpc85xx/u-boot.lds\n+++ b/arch/powerpc/cpu/mpc85xx/u-boot.lds\n@@ -14,32 +14,22 @@\n OUTPUT_ARCH(powerpc)\n ENTRY(_start)\n \n-PHDRS\n-{\n-  text PT_LOAD;\n-  bss PT_LOAD;\n-}\n-\n SECTIONS\n {\n   /* Read-only sections, merged into text segment: */\n-#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC\n-  .bootpg CONFIG_SYS_TEXT_BASE - 0x1000 :\n+  .text      :\n   {\n+#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC\n     KEEP(arch/powerpc/cpu/mpc85xx/start.o (.bootpg))\n-  } :text = 0xffff\n-  . = CONFIG_SYS_TEXT_BASE;\n #endif\n-  .text      :\n-  {\n     *(.text*)\n-   } :text\n+  }\n     _etext = .;\n     PROVIDE (etext = .);\n     .rodata    :\n    {\n     *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))\n-  } :text\n+  }\n \n   /* Read-write section, merged into data segment: */\n   . = (. + 0x00FF) & 0xFFFFFF00;\n@@ -88,12 +78,12 @@ SECTIONS\n   .bootpg RESET_VECTOR_ADDRESS - 0xffc :\n   {\n     arch/powerpc/cpu/mpc85xx/start.o\t(.bootpg)\n-  } :text = 0xffff\n+  } = 0xffff\n \n   .resetvec RESET_VECTOR_ADDRESS :\n   {\n     KEEP(*(.resetvec))\n-  } :text = 0xffff\n+  } = 0xffff\n \n   . = RESET_VECTOR_ADDRESS + 0x4;\n \n@@ -115,7 +105,7 @@ SECTIONS\n    *(.sbss*)\n    *(.bss*)\n    *(COMMON)\n-  } :bss\n+  }\n \n   . = ALIGN(4);\n   __bss_end = . ;\ndiff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig\nindex d9887d78ad2f..999c1143297e 100644\n--- a/configs/P1010RDB-PA_36BIT_NAND_defconfig\n+++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig\n@@ -1,13 +1,13 @@\n CONFIG_PPC=y\n CONFIG_SYS_IMMR=0xFFE00000\n-CONFIG_SYS_TEXT_BASE=0x11001000\n+CONFIG_SYS_TEXT_BASE=0x11000000\n CONFIG_SYS_MALLOC_LEN=0x100000\n CONFIG_ENV_SIZE=0x4000\n CONFIG_ENV_OFFSET=0x100000\n CONFIG_DEFAULT_DEVICE_TREE=\"p1010rdb-pa_36b\"\n CONFIG_SPL_TEXT_BASE=0xFF800000\n CONFIG_SPL_SERIAL=y\n-CONFIG_TPL_TEXT_BASE=0xD0001000\n+CONFIG_TPL_TEXT_BASE=0xD0000000\n CONFIG_TPL_LIBCOMMON_SUPPORT=y\n CONFIG_TPL_LIBGENERIC_SUPPORT=y\n CONFIG_SPL_DRIVERS_MISC=y\ndiff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig\nindex ca149b0b26d4..41f1c7187616 100644\n--- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig\n+++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig\n@@ -1,13 +1,13 @@\n CONFIG_PPC=y\n CONFIG_SYS_IMMR=0xFFE00000\n-CONFIG_SYS_TEXT_BASE=0x11001000\n+CONFIG_SYS_TEXT_BASE=0x11000000\n CONFIG_SYS_MALLOC_LEN=0x100000\n CONFIG_SPL_LIBCOMMON_SUPPORT=y\n CONFIG_SPL_LIBGENERIC_SUPPORT=y\n CONFIG_ENV_SIZE=0x2000\n CONFIG_ENV_OFFSET=0x0\n CONFIG_DEFAULT_DEVICE_TREE=\"p1010rdb-pa_36b\"\n-CONFIG_SPL_TEXT_BASE=0xD0001000\n+CONFIG_SPL_TEXT_BASE=0xD0000000\n CONFIG_SPL_MMC=y\n CONFIG_SPL_SERIAL=y\n CONFIG_SPL_DRIVERS_MISC=y\ndiff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig\nindex 0d1f1568e2d6..471404e66263 100644\n--- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig\n+++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig\n@@ -1,6 +1,6 @@\n CONFIG_PPC=y\n CONFIG_SYS_IMMR=0xFFE00000\n-CONFIG_SYS_TEXT_BASE=0x11001000\n+CONFIG_SYS_TEXT_BASE=0x11000000\n CONFIG_SYS_MALLOC_LEN=0x100000\n CONFIG_SPL_LIBCOMMON_SUPPORT=y\n CONFIG_SPL_LIBGENERIC_SUPPORT=y\n@@ -8,7 +8,7 @@ CONFIG_ENV_SIZE=0x2000\n CONFIG_ENV_OFFSET=0x100000\n CONFIG_ENV_SECT_SIZE=0x10000\n CONFIG_DEFAULT_DEVICE_TREE=\"p1010rdb-pa_36b\"\n-CONFIG_SPL_TEXT_BASE=0xD0001000\n+CONFIG_SPL_TEXT_BASE=0xD0000000\n CONFIG_SPL_SERIAL=y\n CONFIG_SPL_DRIVERS_MISC=y\n CONFIG_SPL=y\ndiff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig\nindex 1b25ea97f70a..d5d3b6259ef3 100644\n--- a/configs/P1010RDB-PA_NAND_defconfig\n+++ b/configs/P1010RDB-PA_NAND_defconfig\n@@ -1,13 +1,13 @@\n CONFIG_PPC=y\n CONFIG_SYS_IMMR=0xFFE00000\n-CONFIG_SYS_TEXT_BASE=0x11001000\n+CONFIG_SYS_TEXT_BASE=0x11000000\n CONFIG_SYS_MALLOC_LEN=0x100000\n CONFIG_ENV_SIZE=0x4000\n CONFIG_ENV_OFFSET=0x100000\n CONFIG_DEFAULT_DEVICE_TREE=\"p1010rdb-pa\"\n CONFIG_SPL_TEXT_BASE=0xFF800000\n CONFIG_SPL_SERIAL=y\n-CONFIG_TPL_TEXT_BASE=0xD0001000\n+CONFIG_TPL_TEXT_BASE=0xD0000000\n CONFIG_TPL_LIBCOMMON_SUPPORT=y\n CONFIG_TPL_LIBGENERIC_SUPPORT=y\n CONFIG_SPL_DRIVERS_MISC=y\ndiff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig\nindex 0032f2779099..03876c1cc7ab 100644\n--- a/configs/P1010RDB-PA_SDCARD_defconfig\n+++ b/configs/P1010RDB-PA_SDCARD_defconfig\n@@ -1,13 +1,13 @@\n CONFIG_PPC=y\n CONFIG_SYS_IMMR=0xFFE00000\n-CONFIG_SYS_TEXT_BASE=0x11001000\n+CONFIG_SYS_TEXT_BASE=0x11000000\n CONFIG_SYS_MALLOC_LEN=0x100000\n CONFIG_SPL_LIBCOMMON_SUPPORT=y\n CONFIG_SPL_LIBGENERIC_SUPPORT=y\n CONFIG_ENV_SIZE=0x2000\n CONFIG_ENV_OFFSET=0x0\n CONFIG_DEFAULT_DEVICE_TREE=\"p1010rdb-pa\"\n-CONFIG_SPL_TEXT_BASE=0xD0001000\n+CONFIG_SPL_TEXT_BASE=0xD0000000\n CONFIG_SPL_MMC=y\n CONFIG_SPL_SERIAL=y\n CONFIG_SPL_DRIVERS_MISC=y\ndiff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig\nindex e40cd4f93d01..93f6a711011c 100644\n--- a/configs/P1010RDB-PA_SPIFLASH_defconfig\n+++ b/configs/P1010RDB-PA_SPIFLASH_defconfig\n@@ -1,6 +1,6 @@\n CONFIG_PPC=y\n CONFIG_SYS_IMMR=0xFFE00000\n-CONFIG_SYS_TEXT_BASE=0x11001000\n+CONFIG_SYS_TEXT_BASE=0x11000000\n CONFIG_SYS_MALLOC_LEN=0x100000\n CONFIG_SPL_LIBCOMMON_SUPPORT=y\n CONFIG_SPL_LIBGENERIC_SUPPORT=y\n@@ -8,7 +8,7 @@ CONFIG_ENV_SIZE=0x2000\n CONFIG_ENV_OFFSET=0x100000\n CONFIG_ENV_SECT_SIZE=0x10000\n CONFIG_DEFAULT_DEVICE_TREE=\"p1010rdb-pa\"\n-CONFIG_SPL_TEXT_BASE=0xD0001000\n+CONFIG_SPL_TEXT_BASE=0xD0000000\n CONFIG_SPL_SERIAL=y\n CONFIG_SPL_DRIVERS_MISC=y\n CONFIG_SPL=y\ndiff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig\nindex cfc9c6da9514..9a9952152acc 100644\n--- a/configs/P1010RDB-PB_36BIT_NAND_defconfig\n+++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig\n@@ -1,13 +1,13 @@\n CONFIG_PPC=y\n CONFIG_SYS_IMMR=0xFFE00000\n-CONFIG_SYS_TEXT_BASE=0x11001000\n+CONFIG_SYS_TEXT_BASE=0x11000000\n CONFIG_SYS_MALLOC_LEN=0x100000\n CONFIG_ENV_SIZE=0x4000\n CONFIG_ENV_OFFSET=0x100000\n CONFIG_DEFAULT_DEVICE_TREE=\"p1010rdb-pb_36b\"\n CONFIG_SPL_TEXT_BASE=0xFF800000\n CONFIG_SPL_SERIAL=y\n-CONFIG_TPL_TEXT_BASE=0xD0001000\n+CONFIG_TPL_TEXT_BASE=0xD0000000\n CONFIG_TPL_LIBCOMMON_SUPPORT=y\n CONFIG_TPL_LIBGENERIC_SUPPORT=y\n CONFIG_SPL_DRIVERS_MISC=y\ndiff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig\nindex 6a346fba2ac2..6f3a831bcaa6 100644\n--- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig\n+++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig\n@@ -1,13 +1,13 @@\n CONFIG_PPC=y\n CONFIG_SYS_IMMR=0xFFE00000\n-CONFIG_SYS_TEXT_BASE=0x11001000\n+CONFIG_SYS_TEXT_BASE=0x11000000\n CONFIG_SYS_MALLOC_LEN=0x100000\n CONFIG_SPL_LIBCOMMON_SUPPORT=y\n CONFIG_SPL_LIBGENERIC_SUPPORT=y\n CONFIG_ENV_SIZE=0x2000\n CONFIG_ENV_OFFSET=0x0\n CONFIG_DEFAULT_DEVICE_TREE=\"p1010rdb-pb_36b\"\n-CONFIG_SPL_TEXT_BASE=0xD0001000\n+CONFIG_SPL_TEXT_BASE=0xD0000000\n CONFIG_SPL_MMC=y\n CONFIG_SPL_SERIAL=y\n CONFIG_SPL_DRIVERS_MISC=y\ndiff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig\nindex 5e31d18a5f8f..954298638720 100644\n--- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig\n+++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig\n@@ -1,6 +1,6 @@\n CONFIG_PPC=y\n CONFIG_SYS_IMMR=0xFFE00000\n-CONFIG_SYS_TEXT_BASE=0x11001000\n+CONFIG_SYS_TEXT_BASE=0x11000000\n CONFIG_SYS_MALLOC_LEN=0x100000\n CONFIG_SPL_LIBCOMMON_SUPPORT=y\n CONFIG_SPL_LIBGENERIC_SUPPORT=y\n@@ -8,7 +8,7 @@ CONFIG_ENV_SIZE=0x2000\n CONFIG_ENV_OFFSET=0x100000\n CONFIG_ENV_SECT_SIZE=0x10000\n CONFIG_DEFAULT_DEVICE_TREE=\"p1010rdb-pb_36b\"\n-CONFIG_SPL_TEXT_BASE=0xD0001000\n+CONFIG_SPL_TEXT_BASE=0xD0000000\n CONFIG_SPL_SERIAL=y\n CONFIG_SPL_DRIVERS_MISC=y\n CONFIG_SPL=y\ndiff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig\nindex 4df93a73f519..4fd5d0aa814f 100644\n--- a/configs/P1010RDB-PB_NAND_defconfig\n+++ b/configs/P1010RDB-PB_NAND_defconfig\n@@ -1,13 +1,13 @@\n CONFIG_PPC=y\n CONFIG_SYS_IMMR=0xFFE00000\n-CONFIG_SYS_TEXT_BASE=0x11001000\n+CONFIG_SYS_TEXT_BASE=0x11000000\n CONFIG_SYS_MALLOC_LEN=0x100000\n CONFIG_ENV_SIZE=0x4000\n CONFIG_ENV_OFFSET=0x100000\n CONFIG_DEFAULT_DEVICE_TREE=\"p1010rdb-pb\"\n CONFIG_SPL_TEXT_BASE=0xFF800000\n CONFIG_SPL_SERIAL=y\n-CONFIG_TPL_TEXT_BASE=0xD0001000\n+CONFIG_TPL_TEXT_BASE=0xD0000000\n CONFIG_TPL_LIBCOMMON_SUPPORT=y\n CONFIG_TPL_LIBGENERIC_SUPPORT=y\n CONFIG_SPL_DRIVERS_MISC=y\ndiff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig\nindex e102207afff3..5571534c9c89 100644\n--- a/configs/P1010RDB-PB_SDCARD_defconfig\n+++ b/configs/P1010RDB-PB_SDCARD_defconfig\n@@ -1,13 +1,13 @@\n CONFIG_PPC=y\n CONFIG_SYS_IMMR=0xFFE00000\n-CONFIG_SYS_TEXT_BASE=0x11001000\n+CONFIG_SYS_TEXT_BASE=0x11000000\n CONFIG_SYS_MALLOC_LEN=0x100000\n CONFIG_SPL_LIBCOMMON_SUPPORT=y\n CONFIG_SPL_LIBGENERIC_SUPPORT=y\n CONFIG_ENV_SIZE=0x2000\n CONFIG_ENV_OFFSET=0x0\n CONFIG_DEFAULT_DEVICE_TREE=\"p1010rdb-pb\"\n-CONFIG_SPL_TEXT_BASE=0xD0001000\n+CONFIG_SPL_TEXT_BASE=0xD0000000\n CONFIG_SPL_MMC=y\n CONFIG_SPL_SERIAL=y\n CONFIG_SPL_DRIVERS_MISC=y\ndiff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig\nindex 52dfbbaae3ac..29c05c49ea3d 100644\n--- a/configs/P1010RDB-PB_SPIFLASH_defconfig\n+++ b/configs/P1010RDB-PB_SPIFLASH_defconfig\n@@ -1,6 +1,6 @@\n CONFIG_PPC=y\n CONFIG_SYS_IMMR=0xFFE00000\n-CONFIG_SYS_TEXT_BASE=0x11001000\n+CONFIG_SYS_TEXT_BASE=0x11000000\n CONFIG_SYS_MALLOC_LEN=0x100000\n CONFIG_SPL_LIBCOMMON_SUPPORT=y\n CONFIG_SPL_LIBGENERIC_SUPPORT=y\n@@ -8,7 +8,7 @@ CONFIG_ENV_SIZE=0x2000\n CONFIG_ENV_OFFSET=0x100000\n CONFIG_ENV_SECT_SIZE=0x10000\n CONFIG_DEFAULT_DEVICE_TREE=\"p1010rdb-pb\"\n-CONFIG_SPL_TEXT_BASE=0xD0001000\n+CONFIG_SPL_TEXT_BASE=0xD0000000\n CONFIG_SPL_SERIAL=y\n CONFIG_SPL_DRIVERS_MISC=y\n CONFIG_SPL=y\ndiff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig\nindex 641862c7d05f..573b0db81469 100644\n--- a/configs/P1020RDB-PC_36BIT_NAND_defconfig\n+++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig\n@@ -1,13 +1,13 @@\n CONFIG_PPC=y\n CONFIG_SYS_IMMR=0xFFE00000\n-CONFIG_SYS_TEXT_BASE=0x11001000\n+CONFIG_SYS_TEXT_BASE=0x11000000\n CONFIG_SYS_MALLOC_LEN=0x100000\n CONFIG_ENV_SIZE=0x4000\n CONFIG_ENV_OFFSET=0x100000\n CONFIG_DEFAULT_DEVICE_TREE=\"p1020rdb-pc_36b\"\n CONFIG_SPL_TEXT_BASE=0xFF800000\n CONFIG_SPL_SERIAL=y\n-CONFIG_TPL_TEXT_BASE=0xF8F81000\n+CONFIG_TPL_TEXT_BASE=0xF8F80000\n CONFIG_TPL_LIBCOMMON_SUPPORT=y\n CONFIG_TPL_LIBGENERIC_SUPPORT=y\n CONFIG_SPL=y\ndiff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig\nindex e9ee3cfdb110..02d732ce6a4b 100644\n--- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig\n+++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig\n@@ -1,13 +1,13 @@\n CONFIG_PPC=y\n CONFIG_SYS_IMMR=0xFFE00000\n-CONFIG_SYS_TEXT_BASE=0x11001000\n+CONFIG_SYS_TEXT_BASE=0x11000000\n CONFIG_SYS_MALLOC_LEN=0x100000\n CONFIG_SPL_LIBCOMMON_SUPPORT=y\n CONFIG_SPL_LIBGENERIC_SUPPORT=y\n CONFIG_ENV_SIZE=0x2000\n CONFIG_ENV_OFFSET=0x0\n CONFIG_DEFAULT_DEVICE_TREE=\"p1020rdb-pc_36b\"\n-CONFIG_SPL_TEXT_BASE=0xf8f81000\n+CONFIG_SPL_TEXT_BASE=0xf8f80000\n CONFIG_SPL_MMC=y\n CONFIG_SPL_SERIAL=y\n CONFIG_SPL=y\ndiff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig\nindex 3f5a7cee0e22..aea21ae4ca74 100644\n--- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig\n+++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig\n@@ -1,6 +1,6 @@\n CONFIG_PPC=y\n CONFIG_SYS_IMMR=0xFFE00000\n-CONFIG_SYS_TEXT_BASE=0x11001000\n+CONFIG_SYS_TEXT_BASE=0x11000000\n CONFIG_SYS_MALLOC_LEN=0x100000\n CONFIG_SPL_LIBCOMMON_SUPPORT=y\n CONFIG_SPL_LIBGENERIC_SUPPORT=y\n@@ -8,7 +8,7 @@ CONFIG_ENV_SIZE=0x2000\n CONFIG_ENV_OFFSET=0x100000\n CONFIG_ENV_SECT_SIZE=0x10000\n CONFIG_DEFAULT_DEVICE_TREE=\"p1020rdb-pc_36b\"\n-CONFIG_SPL_TEXT_BASE=0xf8f81000\n+CONFIG_SPL_TEXT_BASE=0xf8f80000\n CONFIG_SPL_SERIAL=y\n CONFIG_SPL=y\n CONFIG_SPL_SPI_FLASH_SUPPORT=y\ndiff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig\nindex 45414d4d467c..5f40a50c8606 100644\n--- a/configs/P1020RDB-PC_NAND_defconfig\n+++ b/configs/P1020RDB-PC_NAND_defconfig\n@@ -1,13 +1,13 @@\n CONFIG_PPC=y\n CONFIG_SYS_IMMR=0xFFE00000\n-CONFIG_SYS_TEXT_BASE=0x11001000\n+CONFIG_SYS_TEXT_BASE=0x11000000\n CONFIG_SYS_MALLOC_LEN=0x100000\n CONFIG_ENV_SIZE=0x4000\n CONFIG_ENV_OFFSET=0x100000\n CONFIG_DEFAULT_DEVICE_TREE=\"p1020rdb-pc\"\n CONFIG_SPL_TEXT_BASE=0xFF800000\n CONFIG_SPL_SERIAL=y\n-CONFIG_TPL_TEXT_BASE=0xF8F81000\n+CONFIG_TPL_TEXT_BASE=0xF8F80000\n CONFIG_TPL_LIBCOMMON_SUPPORT=y\n CONFIG_TPL_LIBGENERIC_SUPPORT=y\n CONFIG_SPL=y\ndiff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig\nindex 395f0b2d8914..0d8384011563 100644\n--- a/configs/P1020RDB-PC_SDCARD_defconfig\n+++ b/configs/P1020RDB-PC_SDCARD_defconfig\n@@ -1,13 +1,13 @@\n CONFIG_PPC=y\n CONFIG_SYS_IMMR=0xFFE00000\n-CONFIG_SYS_TEXT_BASE=0x11001000\n+CONFIG_SYS_TEXT_BASE=0x11000000\n CONFIG_SYS_MALLOC_LEN=0x100000\n CONFIG_SPL_LIBCOMMON_SUPPORT=y\n CONFIG_SPL_LIBGENERIC_SUPPORT=y\n CONFIG_ENV_SIZE=0x2000\n CONFIG_ENV_OFFSET=0x0\n CONFIG_DEFAULT_DEVICE_TREE=\"p1020rdb-pc\"\n-CONFIG_SPL_TEXT_BASE=0xf8f81000\n+CONFIG_SPL_TEXT_BASE=0xf8f80000\n CONFIG_SPL_MMC=y\n CONFIG_SPL_SERIAL=y\n CONFIG_SPL=y\ndiff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig\nindex 5269c39ce98f..c57a1fc7a22e 100644\n--- a/configs/P1020RDB-PC_SPIFLASH_defconfig\n+++ b/configs/P1020RDB-PC_SPIFLASH_defconfig\n@@ -1,6 +1,6 @@\n CONFIG_PPC=y\n CONFIG_SYS_IMMR=0xFFE00000\n-CONFIG_SYS_TEXT_BASE=0x11001000\n+CONFIG_SYS_TEXT_BASE=0x11000000\n CONFIG_SYS_MALLOC_LEN=0x100000\n CONFIG_SPL_LIBCOMMON_SUPPORT=y\n CONFIG_SPL_LIBGENERIC_SUPPORT=y\n@@ -8,7 +8,7 @@ CONFIG_ENV_SIZE=0x2000\n CONFIG_ENV_OFFSET=0x100000\n CONFIG_ENV_SECT_SIZE=0x10000\n CONFIG_DEFAULT_DEVICE_TREE=\"p1020rdb-pc\"\n-CONFIG_SPL_TEXT_BASE=0xf8f81000\n+CONFIG_SPL_TEXT_BASE=0xf8f80000\n CONFIG_SPL_SERIAL=y\n CONFIG_SPL=y\n CONFIG_SPL_SPI_FLASH_SUPPORT=y\ndiff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig\nindex be048d6b4ae1..c16c7c3ed039 100644\n--- a/configs/P1020RDB-PD_NAND_defconfig\n+++ b/configs/P1020RDB-PD_NAND_defconfig\n@@ -1,13 +1,13 @@\n CONFIG_PPC=y\n CONFIG_SYS_IMMR=0xFFE00000\n-CONFIG_SYS_TEXT_BASE=0x11001000\n+CONFIG_SYS_TEXT_BASE=0x11000000\n CONFIG_SYS_MALLOC_LEN=0x100000\n CONFIG_ENV_SIZE=0x20000\n CONFIG_ENV_OFFSET=0x100000\n CONFIG_DEFAULT_DEVICE_TREE=\"p1020rdb-pd\"\n CONFIG_SPL_TEXT_BASE=0xFF800000\n CONFIG_SPL_SERIAL=y\n-CONFIG_TPL_TEXT_BASE=0xF8F81000\n+CONFIG_TPL_TEXT_BASE=0xF8F80000\n CONFIG_TPL_LIBCOMMON_SUPPORT=y\n CONFIG_TPL_LIBGENERIC_SUPPORT=y\n CONFIG_SPL=y\ndiff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig\nindex ed6b3393c27a..bc9a13b0b8b4 100644\n--- a/configs/P1020RDB-PD_SDCARD_defconfig\n+++ b/configs/P1020RDB-PD_SDCARD_defconfig\n@@ -1,13 +1,13 @@\n CONFIG_PPC=y\n CONFIG_SYS_IMMR=0xFFE00000\n-CONFIG_SYS_TEXT_BASE=0x11001000\n+CONFIG_SYS_TEXT_BASE=0x11000000\n CONFIG_SYS_MALLOC_LEN=0x100000\n CONFIG_SPL_LIBCOMMON_SUPPORT=y\n CONFIG_SPL_LIBGENERIC_SUPPORT=y\n CONFIG_ENV_SIZE=0x2000\n CONFIG_ENV_OFFSET=0x0\n CONFIG_DEFAULT_DEVICE_TREE=\"p1020rdb-pd\"\n-CONFIG_SPL_TEXT_BASE=0xf8f81000\n+CONFIG_SPL_TEXT_BASE=0xf8f80000\n CONFIG_SPL_MMC=y\n CONFIG_SPL_SERIAL=y\n CONFIG_SPL=y\ndiff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig\nindex 7cad6ce45240..2a7fb3864e8e 100644\n--- a/configs/P1020RDB-PD_SPIFLASH_defconfig\n+++ b/configs/P1020RDB-PD_SPIFLASH_defconfig\n@@ -1,6 +1,6 @@\n CONFIG_PPC=y\n CONFIG_SYS_IMMR=0xFFE00000\n-CONFIG_SYS_TEXT_BASE=0x11001000\n+CONFIG_SYS_TEXT_BASE=0x11000000\n CONFIG_SYS_MALLOC_LEN=0x100000\n CONFIG_SPL_LIBCOMMON_SUPPORT=y\n CONFIG_SPL_LIBGENERIC_SUPPORT=y\n@@ -8,7 +8,7 @@ CONFIG_ENV_SIZE=0x2000\n CONFIG_ENV_OFFSET=0x100000\n CONFIG_ENV_SECT_SIZE=0x10000\n CONFIG_DEFAULT_DEVICE_TREE=\"p1020rdb-pd\"\n-CONFIG_SPL_TEXT_BASE=0xf8f81000\n+CONFIG_SPL_TEXT_BASE=0xf8f80000\n CONFIG_SPL_SERIAL=y\n CONFIG_SPL=y\n CONFIG_SPL_SPI_FLASH_SUPPORT=y\ndiff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig\nindex 4dec31dd6f16..af24940dd8cd 100644\n--- a/configs/P2020RDB-PC_36BIT_NAND_defconfig\n+++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig\n@@ -1,13 +1,13 @@\n CONFIG_PPC=y\n CONFIG_SYS_IMMR=0xFFE00000\n-CONFIG_SYS_TEXT_BASE=0x11001000\n+CONFIG_SYS_TEXT_BASE=0x11000000\n CONFIG_SYS_MALLOC_LEN=0x100000\n CONFIG_ENV_SIZE=0x4000\n CONFIG_ENV_OFFSET=0x100000\n CONFIG_DEFAULT_DEVICE_TREE=\"p2020rdb-pc_36b\"\n CONFIG_SPL_TEXT_BASE=0xFF800000\n CONFIG_SPL_SERIAL=y\n-CONFIG_TPL_TEXT_BASE=0xF8F81000\n+CONFIG_TPL_TEXT_BASE=0xF8F80000\n CONFIG_TPL_LIBCOMMON_SUPPORT=y\n CONFIG_TPL_LIBGENERIC_SUPPORT=y\n CONFIG_SPL=y\ndiff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig\nindex 3acb251e1e0d..5c4da5da3884 100644\n--- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig\n+++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig\n@@ -1,13 +1,13 @@\n CONFIG_PPC=y\n CONFIG_SYS_IMMR=0xFFE00000\n-CONFIG_SYS_TEXT_BASE=0x11001000\n+CONFIG_SYS_TEXT_BASE=0x11000000\n CONFIG_SYS_MALLOC_LEN=0x100000\n CONFIG_SPL_LIBCOMMON_SUPPORT=y\n CONFIG_SPL_LIBGENERIC_SUPPORT=y\n CONFIG_ENV_SIZE=0x2000\n CONFIG_ENV_OFFSET=0x0\n CONFIG_DEFAULT_DEVICE_TREE=\"p2020rdb-pc_36b\"\n-CONFIG_SPL_TEXT_BASE=0xf8f81000\n+CONFIG_SPL_TEXT_BASE=0xf8f80000\n CONFIG_SPL_MMC=y\n CONFIG_SPL_SERIAL=y\n CONFIG_SPL=y\ndiff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig\nindex e545c294e09a..d431035a01e7 100644\n--- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig\n+++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig\n@@ -1,6 +1,6 @@\n CONFIG_PPC=y\n CONFIG_SYS_IMMR=0xFFE00000\n-CONFIG_SYS_TEXT_BASE=0x11001000\n+CONFIG_SYS_TEXT_BASE=0x11000000\n CONFIG_SYS_MALLOC_LEN=0x100000\n CONFIG_SPL_LIBCOMMON_SUPPORT=y\n CONFIG_SPL_LIBGENERIC_SUPPORT=y\n@@ -8,7 +8,7 @@ CONFIG_ENV_SIZE=0x2000\n CONFIG_ENV_OFFSET=0x100000\n CONFIG_ENV_SECT_SIZE=0x10000\n CONFIG_DEFAULT_DEVICE_TREE=\"p2020rdb-pc_36b\"\n-CONFIG_SPL_TEXT_BASE=0xf8f81000\n+CONFIG_SPL_TEXT_BASE=0xf8f80000\n CONFIG_SPL_SERIAL=y\n CONFIG_SPL=y\n CONFIG_SPL_SPI_FLASH_SUPPORT=y\ndiff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig\nindex ac47534286be..f9cb43fb9fe2 100644\n--- a/configs/P2020RDB-PC_NAND_defconfig\n+++ b/configs/P2020RDB-PC_NAND_defconfig\n@@ -1,13 +1,13 @@\n CONFIG_PPC=y\n CONFIG_SYS_IMMR=0xFFE00000\n-CONFIG_SYS_TEXT_BASE=0x11001000\n+CONFIG_SYS_TEXT_BASE=0x11000000\n CONFIG_SYS_MALLOC_LEN=0x100000\n CONFIG_ENV_SIZE=0x4000\n CONFIG_ENV_OFFSET=0x100000\n CONFIG_DEFAULT_DEVICE_TREE=\"p2020rdb-pc\"\n CONFIG_SPL_TEXT_BASE=0xFF800000\n CONFIG_SPL_SERIAL=y\n-CONFIG_TPL_TEXT_BASE=0xF8F81000\n+CONFIG_TPL_TEXT_BASE=0xF8F80000\n CONFIG_TPL_LIBCOMMON_SUPPORT=y\n CONFIG_TPL_LIBGENERIC_SUPPORT=y\n CONFIG_SPL=y\ndiff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig\nindex 614ff521b90e..eb60b6eac217 100644\n--- a/configs/P2020RDB-PC_SDCARD_defconfig\n+++ b/configs/P2020RDB-PC_SDCARD_defconfig\n@@ -1,13 +1,13 @@\n CONFIG_PPC=y\n CONFIG_SYS_IMMR=0xFFE00000\n-CONFIG_SYS_TEXT_BASE=0x11001000\n+CONFIG_SYS_TEXT_BASE=0x11000000\n CONFIG_SYS_MALLOC_LEN=0x100000\n CONFIG_SPL_LIBCOMMON_SUPPORT=y\n CONFIG_SPL_LIBGENERIC_SUPPORT=y\n CONFIG_ENV_SIZE=0x2000\n CONFIG_ENV_OFFSET=0x0\n CONFIG_DEFAULT_DEVICE_TREE=\"p2020rdb-pc\"\n-CONFIG_SPL_TEXT_BASE=0xf8f81000\n+CONFIG_SPL_TEXT_BASE=0xf8f80000\n CONFIG_SPL_MMC=y\n CONFIG_SPL_SERIAL=y\n CONFIG_SPL=y\ndiff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig\nindex 325a238fbfab..f21303d63fad 100644\n--- a/configs/P2020RDB-PC_SPIFLASH_defconfig\n+++ b/configs/P2020RDB-PC_SPIFLASH_defconfig\n@@ -1,6 +1,6 @@\n CONFIG_PPC=y\n CONFIG_SYS_IMMR=0xFFE00000\n-CONFIG_SYS_TEXT_BASE=0x11001000\n+CONFIG_SYS_TEXT_BASE=0x11000000\n CONFIG_SYS_MALLOC_LEN=0x100000\n CONFIG_SPL_LIBCOMMON_SUPPORT=y\n CONFIG_SPL_LIBGENERIC_SUPPORT=y\n@@ -8,7 +8,7 @@ CONFIG_ENV_SIZE=0x2000\n CONFIG_ENV_OFFSET=0x100000\n CONFIG_ENV_SECT_SIZE=0x10000\n CONFIG_DEFAULT_DEVICE_TREE=\"p2020rdb-pc\"\n-CONFIG_SPL_TEXT_BASE=0xf8f81000\n+CONFIG_SPL_TEXT_BASE=0xf8f80000\n CONFIG_SPL_SERIAL=y\n CONFIG_SPL=y\n CONFIG_SPL_SPI_FLASH_SUPPORT=y\ndiff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig\nindex 982075f9458b..cbd6169ef938 100644\n--- a/configs/T1024RDB_NAND_defconfig\n+++ b/configs/T1024RDB_NAND_defconfig\n@@ -1,5 +1,5 @@\n CONFIG_PPC=y\n-CONFIG_SYS_TEXT_BASE=0x30001000\n+CONFIG_SYS_TEXT_BASE=0x30000000\n CONFIG_SYS_MALLOC_LEN=0xa00000\n CONFIG_SPL_LIBCOMMON_SUPPORT=y\n CONFIG_SPL_LIBGENERIC_SUPPORT=y\ndiff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig\nindex 8a82082968c8..c1761471170d 100644\n--- a/configs/T1024RDB_SDCARD_defconfig\n+++ b/configs/T1024RDB_SDCARD_defconfig\n@@ -1,5 +1,5 @@\n CONFIG_PPC=y\n-CONFIG_SYS_TEXT_BASE=0x30001000\n+CONFIG_SYS_TEXT_BASE=0x30000000\n CONFIG_SYS_MALLOC_LEN=0xa00000\n CONFIG_SPL_LIBCOMMON_SUPPORT=y\n CONFIG_SPL_LIBGENERIC_SUPPORT=y\ndiff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig\nindex 87d40831d9c3..1480240a0eab 100644\n--- a/configs/T1024RDB_SPIFLASH_defconfig\n+++ b/configs/T1024RDB_SPIFLASH_defconfig\n@@ -1,5 +1,5 @@\n CONFIG_PPC=y\n-CONFIG_SYS_TEXT_BASE=0x30001000\n+CONFIG_SYS_TEXT_BASE=0x30000000\n CONFIG_SYS_MALLOC_LEN=0xa00000\n CONFIG_SPL_LIBCOMMON_SUPPORT=y\n CONFIG_SPL_LIBGENERIC_SUPPORT=y\ndiff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig\nindex 5ef496a4bafb..6314e3e092b0 100644\n--- a/configs/T1042D4RDB_NAND_defconfig\n+++ b/configs/T1042D4RDB_NAND_defconfig\n@@ -1,5 +1,5 @@\n CONFIG_PPC=y\n-CONFIG_SYS_TEXT_BASE=0x30001000\n+CONFIG_SYS_TEXT_BASE=0x30000000\n CONFIG_SPL_LIBCOMMON_SUPPORT=y\n CONFIG_SPL_LIBGENERIC_SUPPORT=y\n CONFIG_ENV_SIZE=0x2000\ndiff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig\nindex efb46b3bf2fd..9122e74bc659 100644\n--- a/configs/T1042D4RDB_SDCARD_defconfig\n+++ b/configs/T1042D4RDB_SDCARD_defconfig\n@@ -1,5 +1,5 @@\n CONFIG_PPC=y\n-CONFIG_SYS_TEXT_BASE=0x30001000\n+CONFIG_SYS_TEXT_BASE=0x30000000\n CONFIG_SPL_LIBCOMMON_SUPPORT=y\n CONFIG_SPL_LIBGENERIC_SUPPORT=y\n CONFIG_ENV_SIZE=0x2000\ndiff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig\nindex 1568c797bf3e..47c9d4471faa 100644\n--- a/configs/T1042D4RDB_SPIFLASH_defconfig\n+++ b/configs/T1042D4RDB_SPIFLASH_defconfig\n@@ -1,5 +1,5 @@\n CONFIG_PPC=y\n-CONFIG_SYS_TEXT_BASE=0x30001000\n+CONFIG_SYS_TEXT_BASE=0x30000000\n CONFIG_SPL_LIBCOMMON_SUPPORT=y\n CONFIG_SPL_LIBGENERIC_SUPPORT=y\n CONFIG_ENV_SIZE=0x2000\ndiff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig\nindex 261c8ecc8630..64a6bae85aa1 100644\n--- a/configs/T2080QDS_NAND_defconfig\n+++ b/configs/T2080QDS_NAND_defconfig\n@@ -1,5 +1,5 @@\n CONFIG_PPC=y\n-CONFIG_SYS_TEXT_BASE=0x00201000\n+CONFIG_SYS_TEXT_BASE=0x00200000\n CONFIG_SPL_LIBCOMMON_SUPPORT=y\n CONFIG_SPL_LIBGENERIC_SUPPORT=y\n CONFIG_ENV_SIZE=0x2000\ndiff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig\nindex 8ab1c5d6809f..befbdc1d6525 100644\n--- a/configs/T2080QDS_SDCARD_defconfig\n+++ b/configs/T2080QDS_SDCARD_defconfig\n@@ -1,5 +1,5 @@\n CONFIG_PPC=y\n-CONFIG_SYS_TEXT_BASE=0x00201000\n+CONFIG_SYS_TEXT_BASE=0x00200000\n CONFIG_SPL_LIBCOMMON_SUPPORT=y\n CONFIG_SPL_LIBGENERIC_SUPPORT=y\n CONFIG_ENV_SIZE=0x2000\ndiff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig\nindex 8fd024848ad6..9a56eb6a170c 100644\n--- a/configs/T2080QDS_SPIFLASH_defconfig\n+++ b/configs/T2080QDS_SPIFLASH_defconfig\n@@ -1,5 +1,5 @@\n CONFIG_PPC=y\n-CONFIG_SYS_TEXT_BASE=0x00201000\n+CONFIG_SYS_TEXT_BASE=0x00200000\n CONFIG_SPL_LIBCOMMON_SUPPORT=y\n CONFIG_SPL_LIBGENERIC_SUPPORT=y\n CONFIG_ENV_SIZE=0x2000\ndiff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig\nindex 523226a4aaa4..8f24d20f1393 100644\n--- a/configs/T2080RDB_NAND_defconfig\n+++ b/configs/T2080RDB_NAND_defconfig\n@@ -1,5 +1,5 @@\n CONFIG_PPC=y\n-CONFIG_SYS_TEXT_BASE=0x00201000\n+CONFIG_SYS_TEXT_BASE=0x00200000\n CONFIG_SPL_LIBCOMMON_SUPPORT=y\n CONFIG_SPL_LIBGENERIC_SUPPORT=y\n CONFIG_SYS_MEMTEST_START=0x00200000\ndiff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig\nindex ea9c479825cc..9263cb888fcb 100644\n--- a/configs/T2080RDB_SDCARD_defconfig\n+++ b/configs/T2080RDB_SDCARD_defconfig\n@@ -1,5 +1,5 @@\n CONFIG_PPC=y\n-CONFIG_SYS_TEXT_BASE=0x00201000\n+CONFIG_SYS_TEXT_BASE=0x00200000\n CONFIG_SPL_LIBCOMMON_SUPPORT=y\n CONFIG_SPL_LIBGENERIC_SUPPORT=y\n CONFIG_SYS_MEMTEST_START=0x00200000\ndiff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig\nindex 5e08b82406ac..d3bf43608dbe 100644\n--- a/configs/T2080RDB_SPIFLASH_defconfig\n+++ b/configs/T2080RDB_SPIFLASH_defconfig\n@@ -1,5 +1,5 @@\n CONFIG_PPC=y\n-CONFIG_SYS_TEXT_BASE=0x00201000\n+CONFIG_SYS_TEXT_BASE=0x00200000\n CONFIG_SPL_LIBCOMMON_SUPPORT=y\n CONFIG_SPL_LIBGENERIC_SUPPORT=y\n CONFIG_SYS_MEMTEST_START=0x00200000\ndiff --git a/configs/T2080RDB_revD_NAND_defconfig b/configs/T2080RDB_revD_NAND_defconfig\nindex 5e0ee9c0616d..a5cc119c0cc4 100644\n--- a/configs/T2080RDB_revD_NAND_defconfig\n+++ b/configs/T2080RDB_revD_NAND_defconfig\n@@ -1,5 +1,5 @@\n CONFIG_PPC=y\n-CONFIG_SYS_TEXT_BASE=0x00201000\n+CONFIG_SYS_TEXT_BASE=0x00200000\n CONFIG_SPL_LIBCOMMON_SUPPORT=y\n CONFIG_SPL_LIBGENERIC_SUPPORT=y\n CONFIG_SYS_MEMTEST_START=0x00200000\ndiff --git a/configs/T2080RDB_revD_SDCARD_defconfig b/configs/T2080RDB_revD_SDCARD_defconfig\nindex fef08931d0dd..7887c0290fbe 100644\n--- a/configs/T2080RDB_revD_SDCARD_defconfig\n+++ b/configs/T2080RDB_revD_SDCARD_defconfig\n@@ -1,5 +1,5 @@\n CONFIG_PPC=y\n-CONFIG_SYS_TEXT_BASE=0x00201000\n+CONFIG_SYS_TEXT_BASE=0x00200000\n CONFIG_SPL_LIBCOMMON_SUPPORT=y\n CONFIG_SPL_LIBGENERIC_SUPPORT=y\n CONFIG_SYS_MEMTEST_START=0x00200000\ndiff --git a/configs/T2080RDB_revD_SPIFLASH_defconfig b/configs/T2080RDB_revD_SPIFLASH_defconfig\nindex 0b7e71567da5..4e30f5badbc5 100644\n--- a/configs/T2080RDB_revD_SPIFLASH_defconfig\n+++ b/configs/T2080RDB_revD_SPIFLASH_defconfig\n@@ -1,5 +1,5 @@\n CONFIG_PPC=y\n-CONFIG_SYS_TEXT_BASE=0x00201000\n+CONFIG_SYS_TEXT_BASE=0x00200000\n CONFIG_SPL_LIBCOMMON_SUPPORT=y\n CONFIG_SPL_LIBGENERIC_SUPPORT=y\n CONFIG_SYS_MEMTEST_START=0x00200000\ndiff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig\nindex ea6a5284959e..fec3a52af2dd 100644\n--- a/configs/T4240RDB_SDCARD_defconfig\n+++ b/configs/T4240RDB_SDCARD_defconfig\n@@ -1,5 +1,5 @@\n CONFIG_PPC=y\n-CONFIG_SYS_TEXT_BASE=0x00201000\n+CONFIG_SYS_TEXT_BASE=0x00200000\n CONFIG_SPL_LIBCOMMON_SUPPORT=y\n CONFIG_SPL_LIBGENERIC_SUPPORT=y\n CONFIG_ENV_SIZE=0x2000\ndiff --git a/configs/qemu-ppce500_defconfig b/configs/qemu-ppce500_defconfig\nindex d1f928d69128..22b75637e715 100644\n--- a/configs/qemu-ppce500_defconfig\n+++ b/configs/qemu-ppce500_defconfig\n@@ -1,5 +1,5 @@\n CONFIG_PPC=y\n-CONFIG_SYS_TEXT_BASE=0xf01000\n+CONFIG_SYS_TEXT_BASE=0xf00000\n CONFIG_ENV_SIZE=0x2000\n CONFIG_DEFAULT_DEVICE_TREE=\"qemu-ppce500\"\n CONFIG_SYS_CLK_FREQ=33000000\ndiff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h\nindex 9b79e19764fc..67c111673b89 100644\n--- a/include/configs/P1010RDB.h\n+++ b/include/configs/P1010RDB.h\n@@ -102,7 +102,7 @@\n #endif\n \n #ifdef CONFIG_TPL_BUILD\n-#define CONFIG_SYS_MONITOR_BASE\t0xD0001000\n+#define CONFIG_SYS_MONITOR_BASE\t0xD0000000\n #elif defined(CONFIG_SPL_BUILD)\n #define CONFIG_SYS_MONITOR_BASE\tCONFIG_SPL_TEXT_BASE\n #else\n@@ -442,7 +442,7 @@ extern unsigned long get_sdram_size(void);\n #define CONFIG_SYS_INIT_L2_ADDR_PHYS\tCONFIG_SYS_INIT_L2_ADDR\n #define CONFIG_SYS_L2_SIZE\t\t(256 << 10)\n #define CONFIG_SYS_INIT_L2_END\t(CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)\n-#define CONFIG_SPL_RELOC_TEXT_BASE\t0xD0001000\n+#define CONFIG_SPL_RELOC_TEXT_BASE\tCONFIG_SYS_MONITOR_BASE\n #define CONFIG_SPL_RELOC_STACK\t\t(CONFIG_SYS_INIT_L2_ADDR + 112 * 1024)\n #define CONFIG_SPL_RELOC_MALLOC_ADDR\t(CONFIG_SYS_INIT_L2_ADDR + 128 * 1024)\n #define CONFIG_SPL_RELOC_MALLOC_SIZE\t(128 << 10)\n@@ -453,7 +453,7 @@ extern unsigned long get_sdram_size(void);\n #define CONFIG_SYS_INIT_L2_ADDR_PHYS\tCONFIG_SYS_INIT_L2_ADDR\n #define CONFIG_SYS_L2_SIZE\t\t(256 << 10)\n #define CONFIG_SYS_INIT_L2_END\t(CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)\n-#define CONFIG_SPL_RELOC_TEXT_BASE\t0xD0001000\n+#define CONFIG_SPL_RELOC_TEXT_BASE\tCONFIG_SYS_MONITOR_BASE\n #define CONFIG_SPL_RELOC_STACK\t\t(CONFIG_SYS_INIT_L2_ADDR + 192 * 1024)\n #define CONFIG_SPL_RELOC_MALLOC_ADDR\t(CONFIG_SYS_INIT_L2_ADDR + 208 * 1024)\n #define CONFIG_SPL_RELOC_MALLOC_SIZE\t(48 << 10)\ndiff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h\nindex 42adfabe509c..dd1bc8ca30f9 100644\n--- a/include/configs/p1_p2_rdb_pc.h\n+++ b/include/configs/p1_p2_rdb_pc.h\n@@ -131,7 +131,7 @@\n \n #ifndef CONFIG_SYS_MONITOR_BASE\n #ifdef CONFIG_TPL_BUILD\n-#define CONFIG_SYS_MONITOR_BASE\t0xf8f81000\n+#define CONFIG_SYS_MONITOR_BASE\t0xf8f80000\n #elif defined(CONFIG_SPL_BUILD)\n #define CONFIG_SYS_MONITOR_BASE\tCONFIG_SPL_TEXT_BASE\n #else\n@@ -372,7 +372,7 @@\n #define CONFIG_SYS_INIT_L2_ADDR\t\t0xf8f80000\n #define CONFIG_SYS_INIT_L2_ADDR_PHYS\tCONFIG_SYS_INIT_L2_ADDR\n #define CONFIG_SYS_INIT_L2_END\t(CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)\n-#define CONFIG_SPL_RELOC_TEXT_BASE\t0xf8f81000\n+#define CONFIG_SPL_RELOC_TEXT_BASE\tCONFIG_SYS_MONITOR_BASE\n #define CONFIG_SPL_GD_ADDR\t\t(CONFIG_SYS_INIT_L2_ADDR + 112 * 1024)\n #define CONFIG_SPL_RELOC_STACK\t\t(CONFIG_SYS_INIT_L2_ADDR + 116 * 1024)\n #define CONFIG_SPL_RELOC_MALLOC_ADDR\t(CONFIG_SYS_INIT_L2_ADDR + 148 * 1024)\n@@ -386,7 +386,7 @@\n #define CONFIG_SYS_INIT_L2_ADDR\t\t0xf8f80000\n #define CONFIG_SYS_INIT_L2_ADDR_PHYS\tCONFIG_SYS_INIT_L2_ADDR\n #define CONFIG_SYS_INIT_L2_END\t(CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)\n-#define CONFIG_SPL_RELOC_TEXT_BASE\t0xf8f81000\n+#define CONFIG_SPL_RELOC_TEXT_BASE\tCONFIG_SYS_MONITOR_BASE\n #define CONFIG_SPL_RELOC_STACK\t\t(CONFIG_SYS_INIT_L2_ADDR + 192 * 1024)\n #define CONFIG_SPL_RELOC_MALLOC_ADDR\t(CONFIG_SYS_INIT_L2_ADDR + 208 * 1024)\n #define CONFIG_SPL_RELOC_MALLOC_SIZE\t(48 << 10)\n",
    "prefixes": [
        "7/8"
    ]
}