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GET /api/patches/1585743/?format=api
{ "id": 1585743, "url": "http://patchwork.ozlabs.org/api/patches/1585743/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20220128153009.2467560-19-peter.maydell@linaro.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20220128153009.2467560-19-peter.maydell@linaro.org>", "list_archive_url": null, "date": "2022-01-28T15:29:55", "name": "[PULL,18/32] hw/intc/arm_gicv3_its: Add tracepoints", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "51395e0728e64882efa4f030a7ce4c25b7a2b211", "submitter": { "id": 5111, "url": "http://patchwork.ozlabs.org/api/people/5111/?format=api", "name": "Peter Maydell", "email": "peter.maydell@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20220128153009.2467560-19-peter.maydell@linaro.org/mbox/", "series": [ { "id": 283405, "url": "http://patchwork.ozlabs.org/api/series/283405/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=283405", "date": "2022-01-28T15:29:53", "name": "[PULL,01/32] Update copyright dates to 2022", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/283405/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1585743/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1585743/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "bilbo.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=qHTbop0Y;\n\tdkim-atps=neutral", "ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=<UNKNOWN>)" ], "Received": [ "from lists.gnu.org (lists.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby bilbo.ozlabs.org (Postfix) with ESMTPS id 4JlhvR1DLdz9t3b\n\tfor <incoming@patchwork.ozlabs.org>; Sat, 29 Jan 2022 02:58:27 +1100 (AEDT)", "from localhost ([::1]:38966 helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1nDTdo-0001m7-VP\n\tfor incoming@patchwork.ozlabs.org; Fri, 28 Jan 2022 10:58:25 -0500", "from eggs.gnu.org ([209.51.188.92]:57634)\n by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <peter.maydell@linaro.org>)\n id 1nDTD5-0002AX-Po\n for qemu-devel@nongnu.org; Fri, 28 Jan 2022 10:30:52 -0500", "from [2a00:1450:4864:20::332] (port=45863\n helo=mail-wm1-x332.google.com)\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from <peter.maydell@linaro.org>)\n id 1nDTCy-0006Q8-P9\n for qemu-devel@nongnu.org; Fri, 28 Jan 2022 10:30:44 -0500", "by mail-wm1-x332.google.com with SMTP id\n j5-20020a05600c1c0500b0034d2e956aadso4289889wms.4\n for <qemu-devel@nongnu.org>; Fri, 28 Jan 2022 07:30:33 -0800 (PST)", "from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2])\n by smtp.gmail.com with ESMTPSA id j3sm4749485wrb.57.2022.01.28.07.30.32\n for <qemu-devel@nongnu.org>\n (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n Fri, 28 Jan 2022 07:30:32 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google;\n h=from:to:subject:date:message-id:in-reply-to:references:mime-version\n :content-transfer-encoding;\n bh=6AFIn/f/7IpE65Fj0RvUnSwaSc0ueBDTSsB7uefk3zA=;\n b=qHTbop0YkryFBFpxKhCJ0mIHE0N6+w2J/rPnPKielMyGGLDAe2wWa9Rr41qi8QV9zZ\n zR6oS8L71t/Std3Q/90xtYilE7UjyhM/fJ5Uxb9cs579eaz17al31yfV5MNxlHNv8Cc3\n v580twkv72Mn/xx8SQXdELW1VrAvz58wIoDScu9DEDn4BoNMG69X7AmYtO281NTfF8S3\n Lm1nHXO2/D6V7fd/SWZcSvr0EJF0eS0xAgD4TIg3hZ/wPgbOVmbBEGxu4VmWqzd/oGKx\n QKcTxXOSEkdb8VHLH40DkkOzakBkMMkP5YAevkfFM+1Qc4Arh4+09fu/fmId81qnWSgp\n xvPw==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20210112;\n h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to\n :references:mime-version:content-transfer-encoding;\n bh=6AFIn/f/7IpE65Fj0RvUnSwaSc0ueBDTSsB7uefk3zA=;\n b=IjbyIFawGSAVjLU6seGIJ8ui0dI4ARlAds6a5Ygh464OQ4z0WsjxO/6rOxOIGB77+7\n h7lNhPBDR3rS7U61j68x6N6LGgbJGymWZ9xaKnld4T4Qb9hrTTWxK6gcWrXPbHmJlvxY\n NqHTspjPIZchE/GLsmhob3/AE94o6+rjRgxDo+xlOn9ShXrctabc65NzIhOcjcpCOicL\n N/5pywC8OCmYXIWZ5ZRaAukzMjY3W/mb794y/S3vIRN+pGrDW3syWWWDHgVAdKwt5EJR\n Ht3LIulVRqsNU7UvOr9W8MCaGfo7YHhW8dBSZNmzRV4VodS0agHhPn9aazQusL289wUH\n ypJQ==", "X-Gm-Message-State": "AOAM533daufJ6dbfFZa58lHAkdbqg4VADEl+xiXBcg9IeZJ/XoFHYRMv\n wylLEsCqw2FwnwcPNg+nluo8xTNma8eJEg==", "X-Google-Smtp-Source": "\n ABdhPJyXuw+mFw7oM+LDvWGxJR4y8SKuOMpm7N6ictx0qMkpsA75Vy2jxNK/fcKGkhhvO37PVEpi8A==", "X-Received": "by 2002:a05:600c:ac7:: with SMTP id\n c7mr2749197wmr.61.1643383832805;\n Fri, 28 Jan 2022 07:30:32 -0800 (PST)", "From": "Peter Maydell <peter.maydell@linaro.org>", "To": "qemu-devel@nongnu.org", "Subject": "[PULL 18/32] hw/intc/arm_gicv3_its: Add tracepoints", "Date": "Fri, 28 Jan 2022 15:29:55 +0000", "Message-Id": "<20220128153009.2467560-19-peter.maydell@linaro.org>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20220128153009.2467560-1-peter.maydell@linaro.org>", "References": "<20220128153009.2467560-1-peter.maydell@linaro.org>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=UTF-8", "Content-Transfer-Encoding": "8bit", "X-Host-Lookup-Failed": "Reverse DNS lookup failed for 2a00:1450:4864:20::332\n (failed)", "Received-SPF": "pass client-ip=2a00:1450:4864:20::332;\n envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x332.google.com", "X-Spam_score_int": "-12", "X-Spam_score": "-1.3", "X-Spam_bar": "-", "X-Spam_report": "(-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793,\n SPF_HELO_NONE=0.001, SPF_PASS=-0.001,\n T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "\"Qemu-devel\"\n <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>" }, "content": "The ITS currently has no tracepoints; add a minimal set\nthat allows basic monitoring of guest register accesses and\nreading of commands from the command queue.\n\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>\nReviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>\nReviewed-by: Richard Henderson <richard.henderson@linaro.org>\nMessage-id: 20220122182444.724087-3-peter.maydell@linaro.org\n---\n hw/intc/arm_gicv3_its.c | 11 +++++++++++\n hw/intc/trace-events | 8 ++++++++\n 2 files changed, 19 insertions(+)", "diff": "diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c\nindex b2f6a8c7f00..6d2549e64b1 100644\n--- a/hw/intc/arm_gicv3_its.c\n+++ b/hw/intc/arm_gicv3_its.c\n@@ -13,6 +13,7 @@\n \n #include \"qemu/osdep.h\"\n #include \"qemu/log.h\"\n+#include \"trace.h\"\n #include \"hw/qdev-properties.h\"\n #include \"hw/intc/arm_gicv3_its_common.h\"\n #include \"gicv3_internal.h\"\n@@ -634,6 +635,8 @@ static void process_cmdq(GICv3ITSState *s)\n \n cmd = (data & CMD_MASK);\n \n+ trace_gicv3_its_process_command(rd_offset, cmd);\n+\n switch (cmd) {\n case GITS_CMD_INT:\n result = process_its_cmd(s, data, cq_offset, INTERRUPT);\n@@ -818,6 +821,8 @@ static MemTxResult gicv3_its_translation_write(void *opaque, hwaddr offset,\n bool result = true;\n uint32_t devid = 0;\n \n+ trace_gicv3_its_translation_write(offset, data, size, attrs.requester_id);\n+\n switch (offset) {\n case GITS_TRANSLATER:\n if (s->ctlr & R_GITS_CTLR_ENABLED_MASK) {\n@@ -1107,6 +1112,7 @@ static MemTxResult gicv3_its_read(void *opaque, hwaddr offset, uint64_t *data,\n qemu_log_mask(LOG_GUEST_ERROR,\n \"%s: invalid guest read at offset \" TARGET_FMT_plx\n \"size %u\\n\", __func__, offset, size);\n+ trace_gicv3_its_badread(offset, size);\n /*\n * The spec requires that reserved registers are RAZ/WI;\n * so use false returns from leaf functions as a way to\n@@ -1114,6 +1120,8 @@ static MemTxResult gicv3_its_read(void *opaque, hwaddr offset, uint64_t *data,\n * the caller, or we'll cause a spurious guest data abort.\n */\n *data = 0;\n+ } else {\n+ trace_gicv3_its_read(offset, *data, size);\n }\n return MEMTX_OK;\n }\n@@ -1140,12 +1148,15 @@ static MemTxResult gicv3_its_write(void *opaque, hwaddr offset, uint64_t data,\n qemu_log_mask(LOG_GUEST_ERROR,\n \"%s: invalid guest write at offset \" TARGET_FMT_plx\n \"size %u\\n\", __func__, offset, size);\n+ trace_gicv3_its_badwrite(offset, data, size);\n /*\n * The spec requires that reserved registers are RAZ/WI;\n * so use false returns from leaf functions as a way to\n * trigger the guest-error logging but don't return it to\n * the caller, or we'll cause a spurious guest data abort.\n */\n+ } else {\n+ trace_gicv3_its_write(offset, data, size);\n }\n return MEMTX_OK;\n }\ndiff --git a/hw/intc/trace-events b/hw/intc/trace-events\nindex 9aba7e3a7a4..b28cda4e08e 100644\n--- a/hw/intc/trace-events\n+++ b/hw/intc/trace-events\n@@ -169,6 +169,14 @@ gicv3_redist_badwrite(uint32_t cpu, uint64_t offset, uint64_t data, unsigned siz\n gicv3_redist_set_irq(uint32_t cpu, int irq, int level) \"GICv3 redistributor 0x%x interrupt %d level changed to %d\"\n gicv3_redist_send_sgi(uint32_t cpu, int irq) \"GICv3 redistributor 0x%x pending SGI %d\"\n \n+# arm_gicv3_its.c\n+gicv3_its_read(uint64_t offset, uint64_t data, unsigned size) \"GICv3 ITS read: offset 0x%\" PRIx64 \" data 0x%\" PRIx64 \" size %u\"\n+gicv3_its_badread(uint64_t offset, unsigned size) \"GICv3 ITS read: offset 0x%\" PRIx64 \" size %u: error\"\n+gicv3_its_write(uint64_t offset, uint64_t data, unsigned size) \"GICv3 ITS write: offset 0x%\" PRIx64 \" data 0x%\" PRIx64 \" size %u\"\n+gicv3_its_badwrite(uint64_t offset, uint64_t data, unsigned size) \"GICv3 ITS write: offset 0x%\" PRIx64 \" data 0x%\" PRIx64 \" size %u: error\"\n+gicv3_its_translation_write(uint64_t offset, uint64_t data, unsigned size, uint32_t requester_id) \"GICv3 ITS TRANSLATER write: offset 0x%\" PRIx64 \" data 0x%\" PRIx64 \" size %u requester_id 0x%x\"\n+gicv3_its_process_command(uint32_t rd_offset, uint8_t cmd) \"GICv3 ITS: processing command at offset 0x%x: 0x%x\"\n+\n # armv7m_nvic.c\n nvic_recompute_state(int vectpending, int vectpending_prio, int exception_prio) \"NVIC state recomputed: vectpending %d vectpending_prio %d exception_prio %d\"\n nvic_recompute_state_secure(int vectpending, bool vectpending_is_s_banked, int vectpending_prio, int exception_prio) \"NVIC state recomputed: vectpending %d is_s_banked %d vectpending_prio %d exception_prio %d\"\n", "prefixes": [ "PULL", "18/32" ] }