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GET /api/patches/1585740/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 1585740,
    "url": "http://patchwork.ozlabs.org/api/patches/1585740/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20220128153009.2467560-33-peter.maydell@linaro.org/",
    "project": {
        "id": 14,
        "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api",
        "name": "QEMU Development",
        "link_name": "qemu-devel",
        "list_id": "qemu-devel.nongnu.org",
        "list_email": "qemu-devel@nongnu.org",
        "web_url": "",
        "scm_url": "",
        "webscm_url": "",
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<20220128153009.2467560-33-peter.maydell@linaro.org>",
    "list_archive_url": null,
    "date": "2022-01-28T15:30:09",
    "name": "[PULL,32/32] target/arm: Use correct entrypoint for SVC taken from Hyp to Hyp",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "f0cec754f5d80254a3bb7ee626e48ddbb276970e",
    "submitter": {
        "id": 5111,
        "url": "http://patchwork.ozlabs.org/api/people/5111/?format=api",
        "name": "Peter Maydell",
        "email": "peter.maydell@linaro.org"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20220128153009.2467560-33-peter.maydell@linaro.org/mbox/",
    "series": [
        {
            "id": 283405,
            "url": "http://patchwork.ozlabs.org/api/series/283405/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=283405",
            "date": "2022-01-28T15:29:53",
            "name": "[PULL,01/32] Update copyright dates to 2022",
            "version": 1,
            "mbox": "http://patchwork.ozlabs.org/series/283405/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/1585740/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/1585740/checks/",
    "tags": {},
    "related": [],
    "headers": {
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        "From": "Peter Maydell <peter.maydell@linaro.org>",
        "To": "qemu-devel@nongnu.org",
        "Subject": "[PULL 32/32] target/arm: Use correct entrypoint for SVC taken from\n Hyp to Hyp",
        "Date": "Fri, 28 Jan 2022 15:30:09 +0000",
        "Message-Id": "<20220128153009.2467560-33-peter.maydell@linaro.org>",
        "X-Mailer": "git-send-email 2.25.1",
        "In-Reply-To": "<20220128153009.2467560-1-peter.maydell@linaro.org>",
        "References": "<20220128153009.2467560-1-peter.maydell@linaro.org>",
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    },
    "content": "The exception caused by an SVC instruction may be taken to AArch32\nHyp mode for two reasons:\n * HCR.TGE indicates that exceptions from EL0 should trap to EL2\n * we were already in Hyp mode\n\nThe entrypoint in the vector table to be used differs in these two\ncases: for an exception routed to Hyp mode from EL0, we enter at the\ncommon 0x14 \"hyp trap\" entrypoint.  For SVC from Hyp mode to Hyp\nmode, we enter at the 0x08 (svc/hvc trap) entrypoint.\nIn the v8A Arm ARM pseudocode this is done in AArch32.TakeSVCException.\n\nQEMU incorrectly routed both of these exceptions to the 0x14\nentrypoint.  Correct the entrypoint for SVC from Hyp to Hyp by making\nuse of the existing logic which handles \"normal entrypoint for\nHyp-to-Hyp, otherwise 0x14\" for traps like UNDEF and data/prefetch\naborts (reproduced here since it's outside the visible context\nin the diff for this commit):\n\n    if (arm_current_el(env) != 2 && addr < 0x14) {\n        addr = 0x14;\n    }\n\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>\nReviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>\nReviewed-by: Richard Henderson <richard.henderson@linaro.org>\nMessage-id: 20220117131953.3936137-1-peter.maydell@linaro.org\n---\n target/arm/helper.c | 4 ++--\n 1 file changed, 2 insertions(+), 2 deletions(-)",
    "diff": "diff --git a/target/arm/helper.c b/target/arm/helper.c\nindex 4df12394021..6dd241fbef3 100644\n--- a/target/arm/helper.c\n+++ b/target/arm/helper.c\n@@ -9658,7 +9658,7 @@ static void arm_cpu_do_interrupt_aarch32_hyp(CPUState *cs)\n      * separately here.\n      *\n      * The vector table entry used is always the 0x14 Hyp mode entry point,\n-     * unless this is an UNDEF/HVC/abort taken from Hyp to Hyp.\n+     * unless this is an UNDEF/SVC/HVC/abort taken from Hyp to Hyp.\n      * The offset applied to the preferred return address is always zero\n      * (see DDI0487C.a section G1.12.3).\n      * PSTATE A/I/F masks are set based only on the SCR.EA/IRQ/FIQ values.\n@@ -9672,7 +9672,7 @@ static void arm_cpu_do_interrupt_aarch32_hyp(CPUState *cs)\n         addr = 0x04;\n         break;\n     case EXCP_SWI:\n-        addr = 0x14;\n+        addr = 0x08;\n         break;\n     case EXCP_BKPT:\n         /* Fall through to prefetch abort.  */\n",
    "prefixes": [
        "PULL",
        "32/32"
    ]
}