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GET /api/patches/1585738/?format=api
{ "id": 1585738, "url": "http://patchwork.ozlabs.org/api/patches/1585738/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20220128153009.2467560-23-peter.maydell@linaro.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20220128153009.2467560-23-peter.maydell@linaro.org>", "list_archive_url": null, "date": "2022-01-28T15:29:59", "name": "[PULL,22/32] hw/intc/arm_gicv3: Honour GICD_CTLR.EnableGrp1NS for LPIs", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "bd34e2f575dde8c8bc25a64fe6c75545e7d44793", "submitter": { "id": 5111, "url": "http://patchwork.ozlabs.org/api/people/5111/?format=api", "name": "Peter Maydell", "email": "peter.maydell@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20220128153009.2467560-23-peter.maydell@linaro.org/mbox/", "series": [ { "id": 283405, "url": "http://patchwork.ozlabs.org/api/series/283405/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=283405", "date": "2022-01-28T15:29:53", "name": "[PULL,01/32] Update copyright dates to 2022", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/283405/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1585738/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1585738/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "bilbo.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=iVSvz6xI;\n\tdkim-atps=neutral", "ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=<UNKNOWN>)" ], "Received": [ "from lists.gnu.org (lists.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby bilbo.ozlabs.org (Postfix) with ESMTPS id 4Jlhhf4fDBz9t56\n\tfor <incoming@patchwork.ozlabs.org>; Sat, 29 Jan 2022 02:49:06 +1100 (AEDT)", "from localhost ([::1]:54272 helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1nDTUl-00014Z-QX\n\tfor incoming@patchwork.ozlabs.org; Fri, 28 Jan 2022 10:49:03 -0500", "from eggs.gnu.org ([209.51.188.92]:57756)\n by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <peter.maydell@linaro.org>)\n id 1nDTDD-0002B4-C6\n for qemu-devel@nongnu.org; Fri, 28 Jan 2022 10:30:58 -0500", "from [2a00:1450:4864:20::335] (port=36642\n helo=mail-wm1-x335.google.com)\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from <peter.maydell@linaro.org>)\n id 1nDTD0-0006QQ-3B\n for qemu-devel@nongnu.org; Fri, 28 Jan 2022 10:30:48 -0500", "by mail-wm1-x335.google.com with SMTP id\n i187-20020a1c3bc4000000b0034d2ed1be2aso8467013wma.1\n for <qemu-devel@nongnu.org>; Fri, 28 Jan 2022 07:30:36 -0800 (PST)", "from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2])\n by smtp.gmail.com with ESMTPSA id j3sm4749485wrb.57.2022.01.28.07.30.35\n for <qemu-devel@nongnu.org>\n (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n Fri, 28 Jan 2022 07:30:35 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google;\n h=from:to:subject:date:message-id:in-reply-to:references:mime-version\n :content-transfer-encoding;\n bh=D4/JY7YnGKUGzScyxUteDIAudBSMtW8ARwUhsJowhg4=;\n b=iVSvz6xI8L4CLmJPIcmbJ5g+WMSqLX18fT/913n8G0H/mgvypWn23WAYVz3gl/SgZo\n DNfPEgJJ7D/3TRF8RAoaIMQWd3PJFduPEUbQsVe+a3uUBGfuKknx5gfn5J8RbWjkHCpF\n LVwyQqqSpybBLyEJ4bmoXHmo+IVGgjIac42jF7PMcHiuoswNTmcaBxJlHmb6/pEJg9/a\n ZeMzUJMSQWMzqChFFajLd0o7faHnca6VPk+BEeGwOqzz7zTczftmQmiKsMkF24iTDNfR\n Zr0tZYaaA4Q37HqSBq72SwUhUHhNWbckF+y5R3PMw0lM2y98cz6wNxpHq37R6Cvbo9jh\n 4opA==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20210112;\n h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to\n :references:mime-version:content-transfer-encoding;\n bh=D4/JY7YnGKUGzScyxUteDIAudBSMtW8ARwUhsJowhg4=;\n b=cQnx8PqV57HBYHsV48V3gfq3wGQLPI96hGZ1WaPVujuynFKuc2/c7dD55Fuu1IQWnv\n JM0NifgMZgZjQFpaIIDon5brR/MLE/gAiH2MRLUUODhL8csxaT2kzajkDHJssqEmLowR\n RNvQyN785a9rUeYSt0tX4bmr297fS0uNS8HPsTofs41ywea49Mx1pZ/VEYCaX1igRhW0\n H1kKiOAbHoiM3/4+Q2gLUow+kU6Ulwe9jzR/mKUm6AwFVeQjpqgjdwAZ62z54v0AO3Rl\n Puu6pahMxrHsB1+fRfDNbGl0n23+tpxYCA3MfGgqFNx+f+VObA3OPKCHxluFBjeMAxrh\n lXtQ==", "X-Gm-Message-State": "AOAM531IuQ3KU/g/iEQHev2moqwBI5CpjdANF9fyRiMc1EvmIzzLzdZ0\n C9eJ3M0iAFA3VPwHeAhX/VcTKiem4OP0QA==", "X-Google-Smtp-Source": "\n ABdhPJxrIzHCX7w0lmrijQHb0Cuek+ftrn+N7bQmLQ9lGhAiymDfRaVOBneWHUplSQkdYvEOkH4e7A==", "X-Received": "by 2002:a05:600c:22c3:: with SMTP id\n 3mr7681057wmg.21.1643383835877;\n Fri, 28 Jan 2022 07:30:35 -0800 (PST)", "From": "Peter Maydell <peter.maydell@linaro.org>", "To": "qemu-devel@nongnu.org", "Subject": "[PULL 22/32] hw/intc/arm_gicv3: Honour GICD_CTLR.EnableGrp1NS for\n LPIs", "Date": "Fri, 28 Jan 2022 15:29:59 +0000", "Message-Id": "<20220128153009.2467560-23-peter.maydell@linaro.org>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20220128153009.2467560-1-peter.maydell@linaro.org>", "References": "<20220128153009.2467560-1-peter.maydell@linaro.org>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-Host-Lookup-Failed": "Reverse DNS lookup failed for 2a00:1450:4864:20::335\n (failed)", "Received-SPF": "pass client-ip=2a00:1450:4864:20::335;\n envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x335.google.com", "X-Spam_score_int": "-12", "X-Spam_score": "-1.3", "X-Spam_bar": "-", "X-Spam_report": "(-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793,\n SPF_HELO_NONE=0.001, SPF_PASS=-0.001,\n T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "\"Qemu-devel\"\n <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>" }, "content": "The GICD_CTLR distributor register has enable bits which control\nwhether the different interrupt groups (Group 0, Non-secure Group 1\nand Secure Group 1) are forwarded to the CPU. We get this right for\ntraditional interrupts, but forgot to account for it when adding\nLPIs. LPIs are always Group 1 NS and if the EnableGrp1NS bit is not\nset we must not forward them to the CPU.\n\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>\nReviewed-by: Richard Henderson <richard.henderson@linaro.org>\nMessage-id: 20220122182444.724087-7-peter.maydell@linaro.org\n---\n hw/intc/arm_gicv3.c | 1 +\n 1 file changed, 1 insertion(+)", "diff": "diff --git a/hw/intc/arm_gicv3.c b/hw/intc/arm_gicv3.c\nindex 715df5421dd..6d3c8ee231c 100644\n--- a/hw/intc/arm_gicv3.c\n+++ b/hw/intc/arm_gicv3.c\n@@ -166,6 +166,7 @@ static void gicv3_redist_update_noirqset(GICv3CPUState *cs)\n }\n \n if ((cs->gicr_ctlr & GICR_CTLR_ENABLE_LPIS) && cs->gic->lpi_enable &&\n+ (cs->gic->gicd_ctlr & GICD_CTLR_EN_GRP1NS) &&\n (cs->hpplpi.prio != 0xff)) {\n if (irqbetter(cs, cs->hpplpi.irq, cs->hpplpi.prio)) {\n cs->hppi.irq = cs->hpplpi.irq;\n", "prefixes": [ "PULL", "22/32" ] }