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GET /api/patches/1585735/?format=api
{ "id": 1585735, "url": "http://patchwork.ozlabs.org/api/patches/1585735/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20220128153009.2467560-18-peter.maydell@linaro.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20220128153009.2467560-18-peter.maydell@linaro.org>", "list_archive_url": null, "date": "2022-01-28T15:29:54", "name": "[PULL,17/32] target/arm: Log CPU index in 'Taking exception' log", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "83f0fca19e89a65dc4184760e88ce15aab1f4eca", "submitter": { "id": 5111, "url": "http://patchwork.ozlabs.org/api/people/5111/?format=api", "name": "Peter Maydell", "email": "peter.maydell@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20220128153009.2467560-18-peter.maydell@linaro.org/mbox/", "series": [ { "id": 283405, "url": "http://patchwork.ozlabs.org/api/series/283405/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=283405", "date": "2022-01-28T15:29:53", "name": "[PULL,01/32] Update copyright dates to 2022", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/283405/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1585735/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1585735/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "bilbo.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=B20p+T1x;\n\tdkim-atps=neutral", "ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=<UNKNOWN>)" ], "Received": [ "from lists.gnu.org (lists.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby bilbo.ozlabs.org (Postfix) with ESMTPS id 4JlhZL1BD1z9t56\n\tfor <incoming@patchwork.ozlabs.org>; Sat, 29 Jan 2022 02:43:38 +1100 (AEDT)", "from localhost ([::1]:45546 helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1nDTPT-0003GR-Ua\n\tfor incoming@patchwork.ozlabs.org; Fri, 28 Jan 2022 10:43:35 -0500", "from eggs.gnu.org ([209.51.188.92]:57734)\n by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <peter.maydell@linaro.org>)\n id 1nDTDB-0002Ax-CI\n for qemu-devel@nongnu.org; Fri, 28 Jan 2022 10:30:58 -0500", "from [2a00:1450:4864:20::32d] (port=54013\n helo=mail-wm1-x32d.google.com)\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from <peter.maydell@linaro.org>)\n id 1nDTD0-0006Q3-2t\n for qemu-devel@nongnu.org; Fri, 28 Jan 2022 10:30:47 -0500", "by mail-wm1-x32d.google.com with SMTP id n8so4669337wmk.3\n for <qemu-devel@nongnu.org>; Fri, 28 Jan 2022 07:30:32 -0800 (PST)", "from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2])\n by smtp.gmail.com with ESMTPSA id j3sm4749485wrb.57.2022.01.28.07.30.31\n for <qemu-devel@nongnu.org>\n (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n Fri, 28 Jan 2022 07:30:31 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google;\n h=from:to:subject:date:message-id:in-reply-to:references:mime-version\n :content-transfer-encoding;\n bh=ZFj0BsQuhPdpN6HiulkG32ZQk/456mTtdXfhKwX2aq8=;\n b=B20p+T1xqbTWihSzJeB7Bbqn7C+vQAF76SyqdKqV0BBZQ/ZZN7B1+BsYeOGm55USR8\n 27wLa/ZM3LRaDdSQqIUvjVgMXCWQgs5ekSkNeC3wU2tEcODRVRqjhLlq1dXOuz+VFlqu\n 4IFjLh/hseeMvioPxC9Vzoo+0tuvApFqUO3EO7XCRHmYUjGGzBJ64cFAgmXi+24Mz3Ct\n IWJwWQn894P0TNY3Vt3ZbIMTZSBCZR7oKgSqdNPDX/580dfgKgKDWnAoga70I0tNMzb0\n sQZX5MP1OvvEhsyjVVZmM/i0KeJTHZ3u1/lGAOZN9Qx+tQJAdZdgMFZO/Q+d5Z8phtPr\n 8hFQ==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20210112;\n h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to\n :references:mime-version:content-transfer-encoding;\n bh=ZFj0BsQuhPdpN6HiulkG32ZQk/456mTtdXfhKwX2aq8=;\n b=SlN5ludbMu/aDKzbm7o+GVwiQ9Kkx+hvvE8wJf6aeKVSduSQyTxRAZN6liW5bhvevn\n nyF+AXiSoJhBko7Gooho+NvoH8ZO6bNolunIEl89AIAuuSRM9hjm/pggOTOrgleaHSEj\n SSI1SUScXTmqsoI9vqBUQKgG6U9OYfAt9QNDauMkjNQT5pDsNlOknN0rAh0eIzWKtV4r\n dzCCv3YdYOok43y20SM94xK3h5EZIjbzLXgJP5tp2DfKvnCvZ7yVyVI9XD1lG8KLvln/\n KdkuIyb7zN47jZktgT/E1mjEkIlDZbrWdNrCDlan/HGeluH0JwSIqOAZDTCcTpedQXND\n TnRw==", "X-Gm-Message-State": "AOAM533rixMuQMGxKLlIrSuHdDr0OxOGsmsINnilcs8OM+KLXaQDgF2T\n dizuRQmpDGRfHGPWz4R4pASaWfILQOTz0Q==", "X-Google-Smtp-Source": "\n ABdhPJwj9yu8Qa4Ftn8N3i1lnes/FomHYuBH/WcLDrYE85dGjJfiVIsMshB7nIbXVQwgiKe33qUpkw==", "X-Received": "by 2002:a7b:cc93:: with SMTP id p19mr7757552wma.175.1643383832029;\n Fri, 28 Jan 2022 07:30:32 -0800 (PST)", "From": "Peter Maydell <peter.maydell@linaro.org>", "To": "qemu-devel@nongnu.org", "Subject": "[PULL 17/32] target/arm: Log CPU index in 'Taking exception' log", "Date": "Fri, 28 Jan 2022 15:29:54 +0000", "Message-Id": "<20220128153009.2467560-18-peter.maydell@linaro.org>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20220128153009.2467560-1-peter.maydell@linaro.org>", "References": "<20220128153009.2467560-1-peter.maydell@linaro.org>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=UTF-8", "Content-Transfer-Encoding": "8bit", "X-Host-Lookup-Failed": "Reverse DNS lookup failed for 2a00:1450:4864:20::32d\n (failed)", "Received-SPF": "pass client-ip=2a00:1450:4864:20::32d;\n envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32d.google.com", "X-Spam_score_int": "-12", "X-Spam_score": "-1.3", "X-Spam_bar": "-", "X-Spam_report": "(-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793,\n SPF_HELO_NONE=0.001, SPF_PASS=-0.001,\n T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "\"Qemu-devel\"\n <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>" }, "content": "In an SMP system it can be unclear which CPU is taking an exception;\nadd the CPU index (which is the same value used in the TCG 'Trace\n%d:' logging) to the \"Taking exception\" log line to clarify it.\n\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>\nReviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>\nReviewed-by: Richard Henderson <richard.henderson@linaro.org>\nMessage-id: 20220122182444.724087-2-peter.maydell@linaro.org\n---\n target/arm/internals.h | 2 +-\n target/arm/helper.c | 9 ++++++---\n target/arm/m_helper.c | 2 +-\n 3 files changed, 8 insertions(+), 5 deletions(-)", "diff": "diff --git a/target/arm/internals.h b/target/arm/internals.h\nindex 89f7610ebc5..3f05748ea47 100644\n--- a/target/arm/internals.h\n+++ b/target/arm/internals.h\n@@ -1130,7 +1130,7 @@ bool get_phys_addr(CPUARMState *env, target_ulong address,\n ARMMMUFaultInfo *fi, ARMCacheAttrs *cacheattrs)\n __attribute__((nonnull));\n \n-void arm_log_exception(int idx);\n+void arm_log_exception(CPUState *cs);\n \n #endif /* !CONFIG_USER_ONLY */\n \ndiff --git a/target/arm/helper.c b/target/arm/helper.c\nindex cfca0f5ba6d..4df12394021 100644\n--- a/target/arm/helper.c\n+++ b/target/arm/helper.c\n@@ -9317,8 +9317,10 @@ uint32_t arm_phys_excp_target_el(CPUState *cs, uint32_t excp_idx,\n return target_el;\n }\n \n-void arm_log_exception(int idx)\n+void arm_log_exception(CPUState *cs)\n {\n+ int idx = cs->exception_index;\n+\n if (qemu_loglevel_mask(CPU_LOG_INT)) {\n const char *exc = NULL;\n static const char * const excnames[] = {\n@@ -9352,7 +9354,8 @@ void arm_log_exception(int idx)\n if (!exc) {\n exc = \"unknown\";\n }\n- qemu_log_mask(CPU_LOG_INT, \"Taking exception %d [%s]\\n\", idx, exc);\n+ qemu_log_mask(CPU_LOG_INT, \"Taking exception %d [%s] on CPU %d\\n\",\n+ idx, exc, cs->cpu_index);\n }\n }\n \n@@ -10185,7 +10188,7 @@ void arm_cpu_do_interrupt(CPUState *cs)\n \n assert(!arm_feature(env, ARM_FEATURE_M));\n \n- arm_log_exception(cs->exception_index);\n+ arm_log_exception(cs);\n qemu_log_mask(CPU_LOG_INT, \"...from EL%d to EL%d\\n\", arm_current_el(env),\n new_el);\n if (qemu_loglevel_mask(CPU_LOG_INT)\ndiff --git a/target/arm/m_helper.c b/target/arm/m_helper.c\nindex 2c9922dc292..b11e927df1d 100644\n--- a/target/arm/m_helper.c\n+++ b/target/arm/m_helper.c\n@@ -2206,7 +2206,7 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs)\n uint32_t lr;\n bool ignore_stackfaults;\n \n- arm_log_exception(cs->exception_index);\n+ arm_log_exception(cs);\n \n /*\n * For exceptions we just mark as pending on the NVIC, and let that\n", "prefixes": [ "PULL", "17/32" ] }