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GET /api/patches/1523774/?format=api
{ "id": 1523774, "url": "http://patchwork.ozlabs.org/api/patches/1523774/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20210902130928.528803-7-clg@kaod.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20210902130928.528803-7-clg@kaod.org>", "list_archive_url": null, "date": "2021-09-02T13:09:14", "name": "[v2,06/20] ppc/pnv: Add a OCC model for POWER10", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "05b0b095c7312c2adf44953c2aacd4917bbd902a", "submitter": { "id": 68548, "url": "http://patchwork.ozlabs.org/api/people/68548/?format=api", "name": "Cédric Le Goater", "email": "clg@kaod.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20210902130928.528803-7-clg@kaod.org/mbox/", "series": [ { "id": 260743, "url": "http://patchwork.ozlabs.org/api/series/260743/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=260743", "date": "2021-09-02T13:09:11", "name": "ppc/pnv: Extend the powernv10 machine", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/260743/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1523774/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1523774/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=<UNKNOWN>)", "garm.ovh; auth=pass\n (GARM-101G004de174e51-c34a-4b59-88b1-f891c9fbc1e3,\n 0F69C8711EE098B745CC44F7BEC1CAFBB1DDDEDC) smtp.auth=clg@kaod.org" ], "Received": [ "from lists.gnu.org (lists.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 4H0hpG10V9z9sPf\n\tfor <incoming@patchwork.ozlabs.org>; Thu, 2 Sep 2021 23:38:30 +1000 (AEST)", "from localhost ([::1]:48306 helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1mLmvD-0001y9-V2\n\tfor incoming@patchwork.ozlabs.org; Thu, 02 Sep 2021 09:38:27 -0400", "from eggs.gnu.org ([2001:470:142:3::10]:42846)\n by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <clg@kaod.org>) id 1mLmTc-0006g8-QW\n for qemu-devel@nongnu.org; Thu, 02 Sep 2021 09:09:56 -0400", "from 10.mo52.mail-out.ovh.net ([87.98.187.244]:36695)\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <clg@kaod.org>) id 1mLmTQ-0001v2-Kl\n for qemu-devel@nongnu.org; Thu, 02 Sep 2021 09:09:56 -0400", "from mxplan5.mail.ovh.net (unknown [10.109.156.48])\n by mo52.mail-out.ovh.net (Postfix) with ESMTPS id 22880295F0D;\n Thu, 2 Sep 2021 15:09:35 +0200 (CEST)", "from kaod.org (37.59.142.101) by DAG4EX1.mxp5.local (172.16.2.31)\n with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2308.14; Thu, 2 Sep\n 2021 15:09:33 +0200" ], "X-OVh-ClientIp": "82.64.250.170", "From": "=?utf-8?q?C=C3=A9dric_Le_Goater?= <clg@kaod.org>", "To": "David Gibson <david@gibson.dropbear.id.au>, Greg Kurz <groug@kaod.org>", "Subject": "[PATCH v2 06/20] ppc/pnv: Add a OCC model for POWER10", "Date": "Thu, 2 Sep 2021 15:09:14 +0200", "Message-ID": "<20210902130928.528803-7-clg@kaod.org>", "X-Mailer": "git-send-email 2.31.1", "In-Reply-To": "<20210902130928.528803-1-clg@kaod.org>", "References": "<20210902130928.528803-1-clg@kaod.org>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"UTF-8\"", "Content-Transfer-Encoding": "8bit", "X-Originating-IP": "[37.59.142.101]", "X-ClientProxiedBy": "DAG5EX1.mxp5.local (172.16.2.41) To DAG4EX1.mxp5.local\n (172.16.2.31)", "X-Ovh-Tracer-GUID": "b2354138-62e2-42b6-811c-f4d7e2c212ec", "X-Ovh-Tracer-Id": "14775465952590400419", "X-VR-SPAMSTATE": "OK", "X-VR-SPAMSCORE": "-100", "X-VR-SPAMCAUSE": "\n gggruggvucftvghtrhhoucdtuddrgedvtddruddvhedgiedtucetufdoteggodetrfdotffvucfrrhhofhhilhgvmecuqfggjfdpvefjgfevmfevgfenuceurghilhhouhhtmecuhedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmnecujfgurhephffvufffkffojghfgggtgfhisehtkeertdertdejnecuhfhrohhmpeevrogurhhitgcunfgvucfiohgrthgvrhcuoegtlhhgsehkrghougdrohhrgheqnecuggftrfgrthhtvghrnhepheehfeegjeeitdfffeetjeduveejueefuefgtdefueelueetveeliefhhffgtdelnecukfhppedtrddtrddtrddtpdefjedrheelrddugedvrddutddunecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmohguvgepshhmthhpqdhouhhtpdhhvghlohepmhigphhlrghnhedrmhgrihhlrdhovhhhrdhnvghtpdhinhgvtheptddrtddrtddrtddpmhgrihhlfhhrohhmpegtlhhgsehkrghougdrohhrghdprhgtphhtthhopegtlhhgsehkrghougdrohhrgh", "Received-SPF": "pass client-ip=87.98.187.244; envelope-from=clg@kaod.org;\n helo=10.mo52.mail-out.ovh.net", "X-Spam_score_int": "-18", "X-Spam_score": "-1.9", "X-Spam_bar": "-", "X-Spam_report": "(-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_NONE=-0.0001,\n RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.23", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Cc": "qemu-ppc@nongnu.org, qemu-devel@nongnu.org, =?utf-8?q?C=C3=A9dric_Le_Goa?=\n\t=?utf-8?q?ter?= <clg@kaod.org>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "\"Qemu-devel\"\n <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>" }, "content": "Our OCC model is very mininal and POWER10 can simply reuse the OCC\nmodel we introduced for POWER9.\n\nReviewed-by: David Gibson <david@gibson.dropbear.id.au>\nSigned-off-by: Cédric Le Goater <clg@kaod.org>\n---\n include/hw/ppc/pnv.h | 1 +\n include/hw/ppc/pnv_occ.h | 2 ++\n include/hw/ppc/pnv_xscom.h | 3 +++\n hw/ppc/pnv.c | 10 ++++++++++\n hw/ppc/pnv_occ.c | 16 ++++++++++++++++\n 5 files changed, 32 insertions(+)", "diff": "diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h\nindex b773b09f9f8e..a299fbc7f25c 100644\n--- a/include/hw/ppc/pnv.h\n+++ b/include/hw/ppc/pnv.h\n@@ -127,6 +127,7 @@ struct Pnv10Chip {\n PnvXive2 xive;\n Pnv9Psi psi;\n PnvLpcController lpc;\n+ PnvOCC occ;\n };\n \n #define PNV10_PIR2FUSEDCORE(pir) (((pir) >> 3) & 0xf)\ndiff --git a/include/hw/ppc/pnv_occ.h b/include/hw/ppc/pnv_occ.h\nindex b78185aecaf2..f982ba002481 100644\n--- a/include/hw/ppc/pnv_occ.h\n+++ b/include/hw/ppc/pnv_occ.h\n@@ -32,6 +32,8 @@ DECLARE_INSTANCE_CHECKER(PnvOCC, PNV8_OCC,\n #define TYPE_PNV9_OCC TYPE_PNV_OCC \"-POWER9\"\n DECLARE_INSTANCE_CHECKER(PnvOCC, PNV9_OCC,\n TYPE_PNV9_OCC)\n+#define TYPE_PNV10_OCC TYPE_PNV_OCC \"-POWER10\"\n+DECLARE_INSTANCE_CHECKER(PnvOCC, PNV10_OCC, TYPE_PNV10_OCC)\n \n #define PNV_OCC_SENSOR_DATA_BLOCK_OFFSET 0x00580000\n #define PNV_OCC_SENSOR_DATA_BLOCK_SIZE 0x00025800\ndiff --git a/include/hw/ppc/pnv_xscom.h b/include/hw/ppc/pnv_xscom.h\nindex 188da874a4b0..151df15378d1 100644\n--- a/include/hw/ppc/pnv_xscom.h\n+++ b/include/hw/ppc/pnv_xscom.h\n@@ -131,6 +131,9 @@ struct PnvXScomInterfaceClass {\n #define PNV10_XSCOM_PSIHB_BASE 0x3011D00\n #define PNV10_XSCOM_PSIHB_SIZE 0x100\n \n+#define PNV10_XSCOM_OCC_BASE PNV9_XSCOM_OCC_BASE\n+#define PNV10_XSCOM_OCC_SIZE PNV9_XSCOM_OCC_SIZE\n+\n #define PNV10_XSCOM_XIVE2_BASE 0x2010800\n #define PNV10_XSCOM_XIVE2_SIZE 0x400\n \ndiff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c\nindex 4ec51e9157fd..a186df3fee41 100644\n--- a/hw/ppc/pnv.c\n+++ b/hw/ppc/pnv.c\n@@ -1603,6 +1603,7 @@ static void pnv_chip_power10_instance_init(Object *obj)\n \"xive-fabric\");\n object_initialize_child(obj, \"psi\", &chip10->psi, TYPE_PNV10_PSI);\n object_initialize_child(obj, \"lpc\", &chip10->lpc, TYPE_PNV10_LPC);\n+ object_initialize_child(obj, \"occ\", &chip10->occ, TYPE_PNV10_OCC);\n }\n \n static void pnv_chip_power10_realize(DeviceState *dev, Error **errp)\n@@ -1668,6 +1669,15 @@ static void pnv_chip_power10_realize(DeviceState *dev, Error **errp)\n chip->fw_mr = &chip10->lpc.isa_fw;\n chip->dt_isa_nodename = g_strdup_printf(\"/lpcm-opb@%\" PRIx64 \"/lpc@0\",\n (uint64_t) PNV10_LPCM_BASE(chip));\n+\n+ /* Create the simplified OCC model */\n+ object_property_set_link(OBJECT(&chip10->occ), \"psi\", OBJECT(&chip10->psi),\n+ &error_abort);\n+ if (!qdev_realize(DEVICE(&chip10->occ), NULL, errp)) {\n+ return;\n+ }\n+ pnv_xscom_add_subregion(chip, PNV10_XSCOM_OCC_BASE,\n+ &chip10->occ.xscom_regs);\n }\n \n static uint32_t pnv_chip_power10_xscom_pcba(PnvChip *chip, uint64_t addr)\ndiff --git a/hw/ppc/pnv_occ.c b/hw/ppc/pnv_occ.c\nindex 5a716c256edc..4ed66f5e1fcc 100644\n--- a/hw/ppc/pnv_occ.c\n+++ b/hw/ppc/pnv_occ.c\n@@ -236,7 +236,9 @@ static const MemoryRegionOps pnv_occ_power9_xscom_ops = {\n static void pnv_occ_power9_class_init(ObjectClass *klass, void *data)\n {\n PnvOCCClass *poc = PNV_OCC_CLASS(klass);\n+ DeviceClass *dc = DEVICE_CLASS(klass);\n \n+ dc->desc = \"PowerNV OCC Controller (POWER9)\";\n poc->xscom_size = PNV9_XSCOM_OCC_SIZE;\n poc->xscom_ops = &pnv_occ_power9_xscom_ops;\n poc->psi_irq = PSIHB9_IRQ_OCC;\n@@ -249,6 +251,19 @@ static const TypeInfo pnv_occ_power9_type_info = {\n .class_init = pnv_occ_power9_class_init,\n };\n \n+static void pnv_occ_power10_class_init(ObjectClass *klass, void *data)\n+{\n+ DeviceClass *dc = DEVICE_CLASS(klass);\n+\n+ dc->desc = \"PowerNV OCC Controller (POWER10)\";\n+}\n+\n+static const TypeInfo pnv_occ_power10_type_info = {\n+ .name = TYPE_PNV10_OCC,\n+ .parent = TYPE_PNV9_OCC,\n+ .class_init = pnv_occ_power10_class_init,\n+};\n+\n static void pnv_occ_realize(DeviceState *dev, Error **errp)\n {\n PnvOCC *occ = PNV_OCC(dev);\n@@ -297,6 +312,7 @@ static void pnv_occ_register_types(void)\n type_register_static(&pnv_occ_type_info);\n type_register_static(&pnv_occ_power8_type_info);\n type_register_static(&pnv_occ_power9_type_info);\n+ type_register_static(&pnv_occ_power10_type_info);\n }\n \n type_init(pnv_occ_register_types);\n", "prefixes": [ "v2", "06/20" ] }