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GET /api/patches/1475774/?format=api
{ "id": 1475774, "url": "http://patchwork.ozlabs.org/api/patches/1475774/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20210508014802.892561-60-richard.henderson@linaro.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20210508014802.892561-60-richard.henderson@linaro.org>", "list_archive_url": null, "date": "2021-05-08T01:47:49", "name": "[59/72] softfloat: Convert floatx80_add/sub to FloatParts", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "f48e81277b7296ce418f26290fce7987c81ad5d6", "submitter": { "id": 72104, "url": "http://patchwork.ozlabs.org/api/people/72104/?format=api", "name": "Richard Henderson", "email": "richard.henderson@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20210508014802.892561-60-richard.henderson@linaro.org/mbox/", "series": [ { "id": 242770, "url": "http://patchwork.ozlabs.org/api/series/242770/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=242770", "date": "2021-05-08T01:46:53", "name": "Convert floatx80 and float128 to FloatParts", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/242770/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1475774/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1475774/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n spf=pass (sender SPF authorized) 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"<20210508014802.892561-1-richard.henderson@linaro.org>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=2607:f8b0:4864:20::62c;\n envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62c.google.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.23", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Cc": "alex.bennee@linaro.org, david@redhat.com", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "\"Qemu-devel\"\n <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>" }, "content": "Since this is the first such, this includes all of the\npacking and unpacking routines as well.\n\nSigned-off-by: Richard Henderson <richard.henderson@linaro.org>\n---\n fpu/softfloat.c | 339 +++++++++++++++++++-----------------------------\n 1 file changed, 136 insertions(+), 203 deletions(-)", "diff": "diff --git a/fpu/softfloat.c b/fpu/softfloat.c\nindex 441b8f9dc1..3c6751e4d0 100644\n--- a/fpu/softfloat.c\n+++ b/fpu/softfloat.c\n@@ -577,14 +577,14 @@ typedef struct {\n } FloatFmt;\n \n /* Expand fields based on the size of exponent and fraction */\n-#define FLOAT_PARAMS_(E, F) \\\n+#define FLOAT_PARAMS_(E) \\\n .exp_size = E, \\\n .exp_bias = ((1 << E) - 1) >> 1, \\\n- .exp_max = (1 << E) - 1, \\\n- .frac_size = F\n+ .exp_max = (1 << E) - 1\n \n #define FLOAT_PARAMS(E, F) \\\n- FLOAT_PARAMS_(E, F), \\\n+ FLOAT_PARAMS_(E), \\\n+ .frac_size = F, \\\n .frac_shift = (-F - 1) & 63, \\\n .round_mask = (1ull << ((-F - 1) & 63)) - 1\n \n@@ -613,6 +613,18 @@ static const FloatFmt float128_params = {\n FLOAT_PARAMS(15, 112)\n };\n \n+#define FLOATX80_PARAMS(R) \\\n+ FLOAT_PARAMS_(15), \\\n+ .frac_size = R == 64 ? 63 : R, \\\n+ .frac_shift = 0, \\\n+ .round_mask = R == 64 ? -1 : (1ull << ((-R - 1) & 63)) - 1\n+\n+static const FloatFmt floatx80_params[3] = {\n+ [floatx80_precision_s] = { FLOATX80_PARAMS(23) },\n+ [floatx80_precision_d] = { FLOATX80_PARAMS(52) },\n+ [floatx80_precision_x] = { FLOATX80_PARAMS(64) },\n+};\n+\n /* Unpack a float to parts, but do not canonicalize. */\n static void unpack_raw64(FloatParts64 *r, const FloatFmt *fmt, uint64_t raw)\n {\n@@ -647,6 +659,16 @@ static inline void float64_unpack_raw(FloatParts64 *p, float64 f)\n unpack_raw64(p, &float64_params, f);\n }\n \n+static void floatx80_unpack_raw(FloatParts128 *p, floatx80 f)\n+{\n+ *p = (FloatParts128) {\n+ .cls = float_class_unclassified,\n+ .sign = extract32(f.high, 15, 1),\n+ .exp = extract32(f.high, 0, 15),\n+ .frac_hi = f.low\n+ };\n+}\n+\n static void float128_unpack_raw(FloatParts128 *p, float128 f)\n {\n const int f_size = float128_params.frac_size - 64;\n@@ -1535,6 +1557,92 @@ static float128 float128_round_pack_canonical(FloatParts128 *p,\n return float128_pack_raw(p);\n }\n \n+/* Returns false if the encoding is invalid. */\n+static bool floatx80_unpack_canonical(FloatParts128 *p, floatx80 f,\n+ float_status *s)\n+{\n+ /* Ensure rounding precision is set before beginning. */\n+ switch (s->floatx80_rounding_precision) {\n+ case floatx80_precision_x:\n+ case floatx80_precision_d:\n+ case floatx80_precision_s:\n+ break;\n+ default:\n+ g_assert_not_reached();\n+ }\n+\n+ if (unlikely(floatx80_invalid_encoding(f))) {\n+ float_raise(float_flag_invalid, s);\n+ return false;\n+ }\n+\n+ floatx80_unpack_raw(p, f);\n+\n+ if (likely(p->exp != floatx80_params[floatx80_precision_x].exp_max)) {\n+ parts_canonicalize(p, s, &floatx80_params[floatx80_precision_x]);\n+ } else {\n+ /* The explicit integer bit is ignored, after invalid checks. */\n+ p->frac_hi &= MAKE_64BIT_MASK(0, 63);\n+ p->cls = (p->frac_hi == 0 ? float_class_inf\n+ : parts_is_snan_frac(p->frac_hi, s)\n+ ? float_class_snan : float_class_qnan);\n+ }\n+ return true;\n+}\n+\n+static floatx80 floatx80_round_pack_canonical(FloatParts128 *p,\n+ float_status *s)\n+{\n+ const FloatFmt *fmt = &floatx80_params[s->floatx80_rounding_precision];\n+ uint64_t frac;\n+ int exp;\n+\n+ switch (p->cls) {\n+ case float_class_normal:\n+ if (s->floatx80_rounding_precision == floatx80_precision_x) {\n+ parts_uncanon_normal(p, s, fmt);\n+ frac = p->frac_hi;\n+ exp = p->exp;\n+ } else {\n+ FloatParts64 p64;\n+\n+ p64.sign = p->sign;\n+ p64.exp = p->exp;\n+ frac_truncjam(&p64, p);\n+ parts_uncanon_normal(&p64, s, fmt);\n+ frac = p64.frac;\n+ exp = p64.exp;\n+ }\n+ if (exp != fmt->exp_max) {\n+ break;\n+ }\n+ /* rounded to inf -- fall through to set frac correctly */\n+\n+ case float_class_inf:\n+ /* x86 and m68k differ in the setting of the integer bit. */\n+ frac = floatx80_infinity_low;\n+ exp = fmt->exp_max;\n+ break;\n+\n+ case float_class_zero:\n+ frac = 0;\n+ exp = 0;\n+ break;\n+\n+ case float_class_snan:\n+ case float_class_qnan:\n+ /* NaNs have the integer bit set. */\n+ frac = p->frac_hi | (1ull << 63);\n+ exp = fmt->exp_max;\n+ break;\n+\n+ default:\n+ g_assert_not_reached();\n+ }\n+\n+ return packFloatx80(p->sign, exp, frac);\n+}\n+\n /*\n * Addition and subtraction\n */\n@@ -1724,6 +1832,30 @@ float128 float128_sub(float128 a, float128 b, float_status *status)\n return float128_addsub(a, b, status, true);\n }\n \n+static floatx80 QEMU_FLATTEN\n+floatx80_addsub(floatx80 a, floatx80 b, float_status *status, bool subtract)\n+{\n+ FloatParts128 pa, pb, *pr;\n+\n+ if (!floatx80_unpack_canonical(&pa, a, status) ||\n+ !floatx80_unpack_canonical(&pb, b, status)) {\n+ return floatx80_default_nan(status);\n+ }\n+\n+ pr = parts_addsub(&pa, &pb, status, subtract);\n+ return floatx80_round_pack_canonical(pr, status);\n+}\n+\n+floatx80 floatx80_add(floatx80 a, floatx80 b, float_status *status)\n+{\n+ return floatx80_addsub(a, b, status, false);\n+}\n+\n+floatx80 floatx80_sub(floatx80 a, floatx80 b, float_status *status)\n+{\n+ return floatx80_addsub(a, b, status, true);\n+}\n+\n /*\n * Multiplication\n */\n@@ -5733,205 +5865,6 @@ floatx80 floatx80_round_to_int(floatx80 a, float_status *status)\n \n }\n \n-/*----------------------------------------------------------------------------\n-| Returns the result of adding the absolute values of the extended double-\n-| precision floating-point values `a' and `b'. If `zSign' is 1, the sum is\n-| negated before being returned. `zSign' is ignored if the result is a NaN.\n-| The addition is performed according to the IEC/IEEE Standard for Binary\n-| Floating-Point Arithmetic.\n-*----------------------------------------------------------------------------*/\n-\n-static floatx80 addFloatx80Sigs(floatx80 a, floatx80 b, bool zSign,\n- float_status *status)\n-{\n- int32_t aExp, bExp, zExp;\n- uint64_t aSig, bSig, zSig0, zSig1;\n- int32_t expDiff;\n-\n- aSig = extractFloatx80Frac( a );\n- aExp = extractFloatx80Exp( a );\n- bSig = extractFloatx80Frac( b );\n- bExp = extractFloatx80Exp( b );\n- expDiff = aExp - bExp;\n- if ( 0 < expDiff ) {\n- if ( aExp == 0x7FFF ) {\n- if ((uint64_t)(aSig << 1)) {\n- return propagateFloatx80NaN(a, b, status);\n- }\n- return a;\n- }\n- if ( bExp == 0 ) --expDiff;\n- shift64ExtraRightJamming( bSig, 0, expDiff, &bSig, &zSig1 );\n- zExp = aExp;\n- }\n- else if ( expDiff < 0 ) {\n- if ( bExp == 0x7FFF ) {\n- if ((uint64_t)(bSig << 1)) {\n- return propagateFloatx80NaN(a, b, status);\n- }\n- return packFloatx80(zSign,\n- floatx80_infinity_high,\n- floatx80_infinity_low);\n- }\n- if ( aExp == 0 ) ++expDiff;\n- shift64ExtraRightJamming( aSig, 0, - expDiff, &aSig, &zSig1 );\n- zExp = bExp;\n- }\n- else {\n- if ( aExp == 0x7FFF ) {\n- if ( (uint64_t) ( ( aSig | bSig )<<1 ) ) {\n- return propagateFloatx80NaN(a, b, status);\n- }\n- return a;\n- }\n- zSig1 = 0;\n- zSig0 = aSig + bSig;\n- if ( aExp == 0 ) {\n- if ((aSig | bSig) & UINT64_C(0x8000000000000000) && zSig0 < aSig) {\n- /* At least one of the values is a pseudo-denormal,\n- * and there is a carry out of the result. */\n- zExp = 1;\n- goto shiftRight1;\n- }\n- if (zSig0 == 0) {\n- return packFloatx80(zSign, 0, 0);\n- }\n- normalizeFloatx80Subnormal( zSig0, &zExp, &zSig0 );\n- goto roundAndPack;\n- }\n- zExp = aExp;\n- goto shiftRight1;\n- }\n- zSig0 = aSig + bSig;\n- if ( (int64_t) zSig0 < 0 ) goto roundAndPack;\n- shiftRight1:\n- shift64ExtraRightJamming( zSig0, zSig1, 1, &zSig0, &zSig1 );\n- zSig0 |= UINT64_C(0x8000000000000000);\n- ++zExp;\n- roundAndPack:\n- return roundAndPackFloatx80(status->floatx80_rounding_precision,\n- zSign, zExp, zSig0, zSig1, status);\n-}\n-\n-/*----------------------------------------------------------------------------\n-| Returns the result of subtracting the absolute values of the extended\n-| double-precision floating-point values `a' and `b'. If `zSign' is 1, the\n-| difference is negated before being returned. `zSign' is ignored if the\n-| result is a NaN. The subtraction is performed according to the IEC/IEEE\n-| Standard for Binary Floating-Point Arithmetic.\n-*----------------------------------------------------------------------------*/\n-\n-static floatx80 subFloatx80Sigs(floatx80 a, floatx80 b, bool zSign,\n- float_status *status)\n-{\n- int32_t aExp, bExp, zExp;\n- uint64_t aSig, bSig, zSig0, zSig1;\n- int32_t expDiff;\n-\n- aSig = extractFloatx80Frac( a );\n- aExp = extractFloatx80Exp( a );\n- bSig = extractFloatx80Frac( b );\n- bExp = extractFloatx80Exp( b );\n- expDiff = aExp - bExp;\n- if ( 0 < expDiff ) goto aExpBigger;\n- if ( expDiff < 0 ) goto bExpBigger;\n- if ( aExp == 0x7FFF ) {\n- if ( (uint64_t) ( ( aSig | bSig )<<1 ) ) {\n- return propagateFloatx80NaN(a, b, status);\n- }\n- float_raise(float_flag_invalid, status);\n- return floatx80_default_nan(status);\n- }\n- if ( aExp == 0 ) {\n- aExp = 1;\n- bExp = 1;\n- }\n- zSig1 = 0;\n- if ( bSig < aSig ) goto aBigger;\n- if ( aSig < bSig ) goto bBigger;\n- return packFloatx80(status->float_rounding_mode == float_round_down, 0, 0);\n- bExpBigger:\n- if ( bExp == 0x7FFF ) {\n- if ((uint64_t)(bSig << 1)) {\n- return propagateFloatx80NaN(a, b, status);\n- }\n- return packFloatx80(zSign ^ 1, floatx80_infinity_high,\n- floatx80_infinity_low);\n- }\n- if ( aExp == 0 ) ++expDiff;\n- shift128RightJamming( aSig, 0, - expDiff, &aSig, &zSig1 );\n- bBigger:\n- sub128( bSig, 0, aSig, zSig1, &zSig0, &zSig1 );\n- zExp = bExp;\n- zSign ^= 1;\n- goto normalizeRoundAndPack;\n- aExpBigger:\n- if ( aExp == 0x7FFF ) {\n- if ((uint64_t)(aSig << 1)) {\n- return propagateFloatx80NaN(a, b, status);\n- }\n- return a;\n- }\n- if ( bExp == 0 ) --expDiff;\n- shift128RightJamming( bSig, 0, expDiff, &bSig, &zSig1 );\n- aBigger:\n- sub128( aSig, 0, bSig, zSig1, &zSig0, &zSig1 );\n- zExp = aExp;\n- normalizeRoundAndPack:\n- return normalizeRoundAndPackFloatx80(status->floatx80_rounding_precision,\n- zSign, zExp, zSig0, zSig1, status);\n-}\n-\n-/*----------------------------------------------------------------------------\n-| Returns the result of adding the extended double-precision floating-point\n-| values `a' and `b'. The operation is performed according to the IEC/IEEE\n-| Standard for Binary Floating-Point Arithmetic.\n-*----------------------------------------------------------------------------*/\n-\n-floatx80 floatx80_add(floatx80 a, floatx80 b, float_status *status)\n-{\n- bool aSign, bSign;\n-\n- if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) {\n- float_raise(float_flag_invalid, status);\n- return floatx80_default_nan(status);\n- }\n- aSign = extractFloatx80Sign( a );\n- bSign = extractFloatx80Sign( b );\n- if ( aSign == bSign ) {\n- return addFloatx80Sigs(a, b, aSign, status);\n- }\n- else {\n- return subFloatx80Sigs(a, b, aSign, status);\n- }\n-\n-}\n-\n-/*----------------------------------------------------------------------------\n-| Returns the result of subtracting the extended double-precision floating-\n-| point values `a' and `b'. The operation is performed according to the\n-| IEC/IEEE Standard for Binary Floating-Point Arithmetic.\n-*----------------------------------------------------------------------------*/\n-\n-floatx80 floatx80_sub(floatx80 a, floatx80 b, float_status *status)\n-{\n- bool aSign, bSign;\n-\n- if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) {\n- float_raise(float_flag_invalid, status);\n- return floatx80_default_nan(status);\n- }\n- aSign = extractFloatx80Sign( a );\n- bSign = extractFloatx80Sign( b );\n- if ( aSign == bSign ) {\n- return subFloatx80Sigs(a, b, aSign, status);\n- }\n- else {\n- return addFloatx80Sigs(a, b, aSign, status);\n- }\n-\n-}\n-\n /*----------------------------------------------------------------------------\n | Returns the result of multiplying the extended double-precision floating-\n | point values `a' and `b'. The operation is performed according to the\n", "prefixes": [ "59/72" ] }