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GET /api/patches/1475769/?format=api
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{
    "id": 1475769,
    "url": "http://patchwork.ozlabs.org/api/patches/1475769/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20210508014802.892561-68-richard.henderson@linaro.org/",
    "project": {
        "id": 14,
        "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api",
        "name": "QEMU Development",
        "link_name": "qemu-devel",
        "list_id": "qemu-devel.nongnu.org",
        "list_email": "qemu-devel@nongnu.org",
        "web_url": "",
        "scm_url": "",
        "webscm_url": "",
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<20210508014802.892561-68-richard.henderson@linaro.org>",
    "list_archive_url": null,
    "date": "2021-05-08T01:47:57",
    "name": "[67/72] softfloat: Convert floatx80 to integer to FloatParts",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "78dfbf3f36da5ae4d0e5ecf457d43a2aa74d0f25",
    "submitter": {
        "id": 72104,
        "url": "http://patchwork.ozlabs.org/api/people/72104/?format=api",
        "name": "Richard Henderson",
        "email": "richard.henderson@linaro.org"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20210508014802.892561-68-richard.henderson@linaro.org/mbox/",
    "series": [
        {
            "id": 242770,
            "url": "http://patchwork.ozlabs.org/api/series/242770/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=242770",
            "date": "2021-05-08T01:46:53",
            "name": "Convert floatx80 and float128 to FloatParts",
            "version": 1,
            "mbox": "http://patchwork.ozlabs.org/series/242770/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/1475769/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/1475769/checks/",
    "tags": {},
    "related": [],
    "headers": {
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        "From": "Richard Henderson <richard.henderson@linaro.org>",
        "To": "qemu-devel@nongnu.org",
        "Subject": "[PATCH 67/72] softfloat: Convert floatx80 to integer to FloatParts",
        "Date": "Fri,  7 May 2021 18:47:57 -0700",
        "Message-Id": "<20210508014802.892561-68-richard.henderson@linaro.org>",
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        "In-Reply-To": "<20210508014802.892561-1-richard.henderson@linaro.org>",
        "References": "<20210508014802.892561-1-richard.henderson@linaro.org>",
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        "Cc": "alex.bennee@linaro.org, david@redhat.com",
        "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org",
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    },
    "content": "Signed-off-by: Richard Henderson <richard.henderson@linaro.org>\n---\n fpu/softfloat.c | 336 ++++++------------------------------------------\n 1 file changed, 42 insertions(+), 294 deletions(-)",
    "diff": "diff --git a/fpu/softfloat.c b/fpu/softfloat.c\nindex d7c6c37d99..9f28c5c058 100644\n--- a/fpu/softfloat.c\n+++ b/fpu/softfloat.c\n@@ -2828,6 +2828,28 @@ static int64_t float128_to_int64_scalbn(float128 a, FloatRoundMode rmode,\n     return parts_float_to_sint(&p, rmode, scale, INT64_MIN, INT64_MAX, s);\n }\n \n+static int32_t floatx80_to_int32_scalbn(floatx80 a, FloatRoundMode rmode,\n+                                        int scale, float_status *s)\n+{\n+    FloatParts128 p;\n+\n+    if (!floatx80_unpack_canonical(&p, a, s)) {\n+        parts_default_nan(&p, s);\n+    }\n+    return parts_float_to_sint(&p, rmode, scale, INT32_MIN, INT32_MAX, s);\n+}\n+\n+static int64_t floatx80_to_int64_scalbn(floatx80 a, FloatRoundMode rmode,\n+                                        int scale, float_status *s)\n+{\n+    FloatParts128 p;\n+\n+    if (!floatx80_unpack_canonical(&p, a, s)) {\n+        parts_default_nan(&p, s);\n+    }\n+    return parts_float_to_sint(&p, rmode, scale, INT64_MIN, INT64_MAX, s);\n+}\n+\n int8_t float16_to_int8(float16 a, float_status *s)\n {\n     return float16_to_int8_scalbn(a, s->float_rounding_mode, 0, s);\n@@ -2888,6 +2910,16 @@ int64_t float128_to_int64(float128 a, float_status *s)\n     return float128_to_int64_scalbn(a, s->float_rounding_mode, 0, s);\n }\n \n+int32_t floatx80_to_int32(floatx80 a, float_status *s)\n+{\n+    return floatx80_to_int32_scalbn(a, s->float_rounding_mode, 0, s);\n+}\n+\n+int64_t floatx80_to_int64(floatx80 a, float_status *s)\n+{\n+    return floatx80_to_int64_scalbn(a, s->float_rounding_mode, 0, s);\n+}\n+\n int16_t float16_to_int16_round_to_zero(float16 a, float_status *s)\n {\n     return float16_to_int16_scalbn(a, float_round_to_zero, 0, s);\n@@ -2943,6 +2975,16 @@ int64_t float128_to_int64_round_to_zero(float128 a, float_status *s)\n     return float128_to_int64_scalbn(a, float_round_to_zero, 0, s);\n }\n \n+int32_t floatx80_to_int32_round_to_zero(floatx80 a, float_status *s)\n+{\n+    return floatx80_to_int32_scalbn(a, float_round_to_zero, 0, s);\n+}\n+\n+int64_t floatx80_to_int64_round_to_zero(floatx80 a, float_status *s)\n+{\n+    return floatx80_to_int64_scalbn(a, float_round_to_zero, 0, s);\n+}\n+\n int16_t bfloat16_to_int16(bfloat16 a, float_status *s)\n {\n     return bfloat16_to_int16_scalbn(a, s->float_rounding_mode, 0, s);\n@@ -4162,127 +4204,6 @@ bfloat16 bfloat16_squash_input_denormal(bfloat16 a, float_status *status)\n     return a;\n }\n \n-/*----------------------------------------------------------------------------\n-| Takes a 64-bit fixed-point value `absZ' with binary point between bits 6\n-| and 7, and returns the properly rounded 32-bit integer corresponding to the\n-| input.  If `zSign' is 1, the input is negated before being converted to an\n-| integer.  Bit 63 of `absZ' must be zero.  Ordinarily, the fixed-point input\n-| is simply rounded to an integer, with the inexact exception raised if the\n-| input cannot be represented exactly as an integer.  However, if the fixed-\n-| point input is too large, the invalid exception is raised and the largest\n-| positive or negative integer is returned.\n-*----------------------------------------------------------------------------*/\n-\n-static int32_t roundAndPackInt32(bool zSign, uint64_t absZ,\n-                                 float_status *status)\n-{\n-    int8_t roundingMode;\n-    bool roundNearestEven;\n-    int8_t roundIncrement, roundBits;\n-    int32_t z;\n-\n-    roundingMode = status->float_rounding_mode;\n-    roundNearestEven = ( roundingMode == float_round_nearest_even );\n-    switch (roundingMode) {\n-    case float_round_nearest_even:\n-    case float_round_ties_away:\n-        roundIncrement = 0x40;\n-        break;\n-    case float_round_to_zero:\n-        roundIncrement = 0;\n-        break;\n-    case float_round_up:\n-        roundIncrement = zSign ? 0 : 0x7f;\n-        break;\n-    case float_round_down:\n-        roundIncrement = zSign ? 0x7f : 0;\n-        break;\n-    case float_round_to_odd:\n-        roundIncrement = absZ & 0x80 ? 0 : 0x7f;\n-        break;\n-    default:\n-        abort();\n-    }\n-    roundBits = absZ & 0x7F;\n-    absZ = ( absZ + roundIncrement )>>7;\n-    if (!(roundBits ^ 0x40) && roundNearestEven) {\n-        absZ &= ~1;\n-    }\n-    z = absZ;\n-    if ( zSign ) z = - z;\n-    if ( ( absZ>>32 ) || ( z && ( ( z < 0 ) ^ zSign ) ) ) {\n-        float_raise(float_flag_invalid, status);\n-        return zSign ? INT32_MIN : INT32_MAX;\n-    }\n-    if (roundBits) {\n-        float_raise(float_flag_inexact, status);\n-    }\n-    return z;\n-\n-}\n-\n-/*----------------------------------------------------------------------------\n-| Takes the 128-bit fixed-point value formed by concatenating `absZ0' and\n-| `absZ1', with binary point between bits 63 and 64 (between the input words),\n-| and returns the properly rounded 64-bit integer corresponding to the input.\n-| If `zSign' is 1, the input is negated before being converted to an integer.\n-| Ordinarily, the fixed-point input is simply rounded to an integer, with\n-| the inexact exception raised if the input cannot be represented exactly as\n-| an integer.  However, if the fixed-point input is too large, the invalid\n-| exception is raised and the largest positive or negative integer is\n-| returned.\n-*----------------------------------------------------------------------------*/\n-\n-static int64_t roundAndPackInt64(bool zSign, uint64_t absZ0, uint64_t absZ1,\n-                               float_status *status)\n-{\n-    int8_t roundingMode;\n-    bool roundNearestEven, increment;\n-    int64_t z;\n-\n-    roundingMode = status->float_rounding_mode;\n-    roundNearestEven = ( roundingMode == float_round_nearest_even );\n-    switch (roundingMode) {\n-    case float_round_nearest_even:\n-    case float_round_ties_away:\n-        increment = ((int64_t) absZ1 < 0);\n-        break;\n-    case float_round_to_zero:\n-        increment = 0;\n-        break;\n-    case float_round_up:\n-        increment = !zSign && absZ1;\n-        break;\n-    case float_round_down:\n-        increment = zSign && absZ1;\n-        break;\n-    case float_round_to_odd:\n-        increment = !(absZ0 & 1) && absZ1;\n-        break;\n-    default:\n-        abort();\n-    }\n-    if ( increment ) {\n-        ++absZ0;\n-        if ( absZ0 == 0 ) goto overflow;\n-        if (!(absZ1 << 1) && roundNearestEven) {\n-            absZ0 &= ~1;\n-        }\n-    }\n-    z = absZ0;\n-    if ( zSign ) z = - z;\n-    if ( z && ( ( z < 0 ) ^ zSign ) ) {\n- overflow:\n-        float_raise(float_flag_invalid, status);\n-        return zSign ? INT64_MIN : INT64_MAX;\n-    }\n-    if (absZ1) {\n-        float_raise(float_flag_inexact, status);\n-    }\n-    return z;\n-\n-}\n-\n /*----------------------------------------------------------------------------\n | Normalizes the subnormal single-precision floating-point value represented\n | by the denormalized significand `aSig'.  The normalized exponent and\n@@ -5488,179 +5409,6 @@ float64 float64_log2(float64 a, float_status *status)\n     return normalizeRoundAndPackFloat64(zSign, 0x408, zSig, status);\n }\n \n-/*----------------------------------------------------------------------------\n-| Returns the result of converting the extended double-precision floating-\n-| point value `a' to the 32-bit two's complement integer format.  The\n-| conversion is performed according to the IEC/IEEE Standard for Binary\n-| Floating-Point Arithmetic---which means in particular that the conversion\n-| is rounded according to the current rounding mode.  If `a' is a NaN, the\n-| largest positive integer is returned.  Otherwise, if the conversion\n-| overflows, the largest integer with the same sign as `a' is returned.\n-*----------------------------------------------------------------------------*/\n-\n-int32_t floatx80_to_int32(floatx80 a, float_status *status)\n-{\n-    bool aSign;\n-    int32_t aExp, shiftCount;\n-    uint64_t aSig;\n-\n-    if (floatx80_invalid_encoding(a)) {\n-        float_raise(float_flag_invalid, status);\n-        return 1 << 31;\n-    }\n-    aSig = extractFloatx80Frac( a );\n-    aExp = extractFloatx80Exp( a );\n-    aSign = extractFloatx80Sign( a );\n-    if ( ( aExp == 0x7FFF ) && (uint64_t) ( aSig<<1 ) ) aSign = 0;\n-    shiftCount = 0x4037 - aExp;\n-    if ( shiftCount <= 0 ) shiftCount = 1;\n-    shift64RightJamming( aSig, shiftCount, &aSig );\n-    return roundAndPackInt32(aSign, aSig, status);\n-\n-}\n-\n-/*----------------------------------------------------------------------------\n-| Returns the result of converting the extended double-precision floating-\n-| point value `a' to the 32-bit two's complement integer format.  The\n-| conversion is performed according to the IEC/IEEE Standard for Binary\n-| Floating-Point Arithmetic, except that the conversion is always rounded\n-| toward zero.  If `a' is a NaN, the largest positive integer is returned.\n-| Otherwise, if the conversion overflows, the largest integer with the same\n-| sign as `a' is returned.\n-*----------------------------------------------------------------------------*/\n-\n-int32_t floatx80_to_int32_round_to_zero(floatx80 a, float_status *status)\n-{\n-    bool aSign;\n-    int32_t aExp, shiftCount;\n-    uint64_t aSig, savedASig;\n-    int32_t z;\n-\n-    if (floatx80_invalid_encoding(a)) {\n-        float_raise(float_flag_invalid, status);\n-        return 1 << 31;\n-    }\n-    aSig = extractFloatx80Frac( a );\n-    aExp = extractFloatx80Exp( a );\n-    aSign = extractFloatx80Sign( a );\n-    if ( 0x401E < aExp ) {\n-        if ( ( aExp == 0x7FFF ) && (uint64_t) ( aSig<<1 ) ) aSign = 0;\n-        goto invalid;\n-    }\n-    else if ( aExp < 0x3FFF ) {\n-        if (aExp || aSig) {\n-            float_raise(float_flag_inexact, status);\n-        }\n-        return 0;\n-    }\n-    shiftCount = 0x403E - aExp;\n-    savedASig = aSig;\n-    aSig >>= shiftCount;\n-    z = aSig;\n-    if ( aSign ) z = - z;\n-    if ( ( z < 0 ) ^ aSign ) {\n- invalid:\n-        float_raise(float_flag_invalid, status);\n-        return aSign ? (int32_t) 0x80000000 : 0x7FFFFFFF;\n-    }\n-    if ( ( aSig<<shiftCount ) != savedASig ) {\n-        float_raise(float_flag_inexact, status);\n-    }\n-    return z;\n-\n-}\n-\n-/*----------------------------------------------------------------------------\n-| Returns the result of converting the extended double-precision floating-\n-| point value `a' to the 64-bit two's complement integer format.  The\n-| conversion is performed according to the IEC/IEEE Standard for Binary\n-| Floating-Point Arithmetic---which means in particular that the conversion\n-| is rounded according to the current rounding mode.  If `a' is a NaN,\n-| the largest positive integer is returned.  Otherwise, if the conversion\n-| overflows, the largest integer with the same sign as `a' is returned.\n-*----------------------------------------------------------------------------*/\n-\n-int64_t floatx80_to_int64(floatx80 a, float_status *status)\n-{\n-    bool aSign;\n-    int32_t aExp, shiftCount;\n-    uint64_t aSig, aSigExtra;\n-\n-    if (floatx80_invalid_encoding(a)) {\n-        float_raise(float_flag_invalid, status);\n-        return 1ULL << 63;\n-    }\n-    aSig = extractFloatx80Frac( a );\n-    aExp = extractFloatx80Exp( a );\n-    aSign = extractFloatx80Sign( a );\n-    shiftCount = 0x403E - aExp;\n-    if ( shiftCount <= 0 ) {\n-        if ( shiftCount ) {\n-            float_raise(float_flag_invalid, status);\n-            if (!aSign || floatx80_is_any_nan(a)) {\n-                return INT64_MAX;\n-            }\n-            return INT64_MIN;\n-        }\n-        aSigExtra = 0;\n-    }\n-    else {\n-        shift64ExtraRightJamming( aSig, 0, shiftCount, &aSig, &aSigExtra );\n-    }\n-    return roundAndPackInt64(aSign, aSig, aSigExtra, status);\n-\n-}\n-\n-/*----------------------------------------------------------------------------\n-| Returns the result of converting the extended double-precision floating-\n-| point value `a' to the 64-bit two's complement integer format.  The\n-| conversion is performed according to the IEC/IEEE Standard for Binary\n-| Floating-Point Arithmetic, except that the conversion is always rounded\n-| toward zero.  If `a' is a NaN, the largest positive integer is returned.\n-| Otherwise, if the conversion overflows, the largest integer with the same\n-| sign as `a' is returned.\n-*----------------------------------------------------------------------------*/\n-\n-int64_t floatx80_to_int64_round_to_zero(floatx80 a, float_status *status)\n-{\n-    bool aSign;\n-    int32_t aExp, shiftCount;\n-    uint64_t aSig;\n-    int64_t z;\n-\n-    if (floatx80_invalid_encoding(a)) {\n-        float_raise(float_flag_invalid, status);\n-        return 1ULL << 63;\n-    }\n-    aSig = extractFloatx80Frac( a );\n-    aExp = extractFloatx80Exp( a );\n-    aSign = extractFloatx80Sign( a );\n-    shiftCount = aExp - 0x403E;\n-    if ( 0 <= shiftCount ) {\n-        aSig &= UINT64_C(0x7FFFFFFFFFFFFFFF);\n-        if ( ( a.high != 0xC03E ) || aSig ) {\n-            float_raise(float_flag_invalid, status);\n-            if ( ! aSign || ( ( aExp == 0x7FFF ) && aSig ) ) {\n-                return INT64_MAX;\n-            }\n-        }\n-        return INT64_MIN;\n-    }\n-    else if ( aExp < 0x3FFF ) {\n-        if (aExp | aSig) {\n-            float_raise(float_flag_inexact, status);\n-        }\n-        return 0;\n-    }\n-    z = aSig>>( - shiftCount );\n-    if ( (uint64_t) ( aSig<<( shiftCount & 63 ) ) ) {\n-        float_raise(float_flag_inexact, status);\n-    }\n-    if ( aSign ) z = - z;\n-    return z;\n-\n-}\n-\n /*----------------------------------------------------------------------------\n | Rounds the extended double-precision floating-point value `a'\n | to the precision provided by floatx80_rounding_precision and returns the\n",
    "prefixes": [
        "67/72"
    ]
}