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GET /api/patches/1475757/?format=api
{ "id": 1475757, "url": "http://patchwork.ozlabs.org/api/patches/1475757/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20210508014802.892561-45-richard.henderson@linaro.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20210508014802.892561-45-richard.henderson@linaro.org>", "list_archive_url": null, "date": "2021-05-08T01:47:34", "name": "[44/72] softfloat: Convert float-to-float conversions with float128", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "876712ec08e64c85eba7521284bc9a7d45e14894", "submitter": { "id": 72104, "url": "http://patchwork.ozlabs.org/api/people/72104/?format=api", "name": "Richard Henderson", "email": "richard.henderson@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20210508014802.892561-45-richard.henderson@linaro.org/mbox/", "series": [ { "id": 242770, "url": "http://patchwork.ozlabs.org/api/series/242770/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=242770", "date": "2021-05-08T01:46:53", "name": "Convert floatx80 and float128 to FloatParts", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/242770/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1475757/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1475757/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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helo=mail-pg1-x530.google.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.23", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Cc": "alex.bennee@linaro.org, david@redhat.com", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "\"Qemu-devel\"\n <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>" }, "content": "Introduce parts_float_to_float_widen and parts_float_to_float_narrow.\nUse them for float128_to_float{32,64} and float{32,64}_to_float128.\n\nSigned-off-by: Richard Henderson <richard.henderson@linaro.org>\n---\n fpu/softfloat.c | 203 ++++++++++++++++--------------------------------\n 1 file changed, 69 insertions(+), 134 deletions(-)", "diff": "diff --git a/fpu/softfloat.c b/fpu/softfloat.c\nindex 06fac8f41c..1b86111279 100644\n--- a/fpu/softfloat.c\n+++ b/fpu/softfloat.c\n@@ -2091,6 +2091,35 @@ static void parts128_float_to_float(FloatParts128 *a, float_status *s)\n #define parts_float_to_float(P, S) \\\n PARTS_GENERIC_64_128(float_to_float, P)(P, S)\n \n+static void parts_float_to_float_narrow(FloatParts64 *a, FloatParts128 *b,\n+ float_status *s)\n+{\n+ a->cls = b->cls;\n+ a->sign = b->sign;\n+ a->exp = b->exp;\n+\n+ if (a->cls == float_class_normal) {\n+ frac_truncjam(a, b);\n+ } else if (is_nan(a->cls)) {\n+ /* Discard the low bits of the NaN. */\n+ a->frac = b->frac_hi;\n+ parts_return_nan(a, s);\n+ }\n+}\n+\n+static void parts_float_to_float_widen(FloatParts128 *a, FloatParts64 *b,\n+ float_status *s)\n+{\n+ a->cls = b->cls;\n+ a->sign = b->sign;\n+ a->exp = b->exp;\n+ frac_widen(a, b);\n+\n+ if (is_nan(a->cls)) {\n+ parts_return_nan(a, s);\n+ }\n+}\n+\n float32 float16_to_float32(float16 a, bool ieee, float_status *s)\n {\n const FloatFmt *fmt16 = ieee ? &float16_params : &float16_params_ahp;\n@@ -2214,6 +2243,46 @@ bfloat16 float64_to_bfloat16(float64 a, float_status *s)\n return bfloat16_round_pack_canonical(&p, s);\n }\n \n+float32 float128_to_float32(float128 a, float_status *s)\n+{\n+ FloatParts64 p64;\n+ FloatParts128 p128;\n+\n+ float128_unpack_canonical(&p128, a, s);\n+ parts_float_to_float_narrow(&p64, &p128, s);\n+ return float32_round_pack_canonical(&p64, s);\n+}\n+\n+float64 float128_to_float64(float128 a, float_status *s)\n+{\n+ FloatParts64 p64;\n+ FloatParts128 p128;\n+\n+ float128_unpack_canonical(&p128, a, s);\n+ parts_float_to_float_narrow(&p64, &p128, s);\n+ return float64_round_pack_canonical(&p64, s);\n+}\n+\n+float128 float32_to_float128(float32 a, float_status *s)\n+{\n+ FloatParts64 p64;\n+ FloatParts128 p128;\n+\n+ float32_unpack_canonical(&p64, a, s);\n+ parts_float_to_float_widen(&p128, &p64, s);\n+ return float128_round_pack_canonical(&p128, s);\n+}\n+\n+float128 float64_to_float128(float64 a, float_status *s)\n+{\n+ FloatParts64 p64;\n+ FloatParts128 p128;\n+\n+ float64_unpack_canonical(&p64, a, s);\n+ parts_float_to_float_widen(&p128, &p64, s);\n+ return float128_round_pack_canonical(&p128, s);\n+}\n+\n /*\n * Rounds the floating-point value `a' to an integer, and returns the\n * result as a floating-point value. The operation is performed\n@@ -5174,38 +5243,6 @@ floatx80 float32_to_floatx80(float32 a, float_status *status)\n \n }\n \n-/*----------------------------------------------------------------------------\n-| Returns the result of converting the single-precision floating-point value\n-| `a' to the double-precision floating-point format. The conversion is\n-| performed according to the IEC/IEEE Standard for Binary Floating-Point\n-| Arithmetic.\n-*----------------------------------------------------------------------------*/\n-\n-float128 float32_to_float128(float32 a, float_status *status)\n-{\n- bool aSign;\n- int aExp;\n- uint32_t aSig;\n-\n- a = float32_squash_input_denormal(a, status);\n- aSig = extractFloat32Frac( a );\n- aExp = extractFloat32Exp( a );\n- aSign = extractFloat32Sign( a );\n- if ( aExp == 0xFF ) {\n- if (aSig) {\n- return commonNaNToFloat128(float32ToCommonNaN(a, status), status);\n- }\n- return packFloat128( aSign, 0x7FFF, 0, 0 );\n- }\n- if ( aExp == 0 ) {\n- if ( aSig == 0 ) return packFloat128( aSign, 0, 0, 0 );\n- normalizeFloat32Subnormal( aSig, &aExp, &aSig );\n- --aExp;\n- }\n- return packFloat128( aSign, aExp + 0x3F80, ( (uint64_t) aSig )<<25, 0 );\n-\n-}\n-\n /*----------------------------------------------------------------------------\n | Returns the remainder of the single-precision floating-point value `a'\n | with respect to the corresponding value `b'. The operation is performed\n@@ -5479,40 +5516,6 @@ floatx80 float64_to_floatx80(float64 a, float_status *status)\n \n }\n \n-/*----------------------------------------------------------------------------\n-| Returns the result of converting the double-precision floating-point value\n-| `a' to the quadruple-precision floating-point format. The conversion is\n-| performed according to the IEC/IEEE Standard for Binary Floating-Point\n-| Arithmetic.\n-*----------------------------------------------------------------------------*/\n-\n-float128 float64_to_float128(float64 a, float_status *status)\n-{\n- bool aSign;\n- int aExp;\n- uint64_t aSig, zSig0, zSig1;\n-\n- a = float64_squash_input_denormal(a, status);\n- aSig = extractFloat64Frac( a );\n- aExp = extractFloat64Exp( a );\n- aSign = extractFloat64Sign( a );\n- if ( aExp == 0x7FF ) {\n- if (aSig) {\n- return commonNaNToFloat128(float64ToCommonNaN(a, status), status);\n- }\n- return packFloat128( aSign, 0x7FFF, 0, 0 );\n- }\n- if ( aExp == 0 ) {\n- if ( aSig == 0 ) return packFloat128( aSign, 0, 0, 0 );\n- normalizeFloat64Subnormal( aSig, &aExp, &aSig );\n- --aExp;\n- }\n- shift128Right( aSig, 0, 4, &zSig0, &zSig1 );\n- return packFloat128( aSign, aExp + 0x3C00, zSig0, zSig1 );\n-\n-}\n-\n-\n /*----------------------------------------------------------------------------\n | Returns the remainder of the double-precision floating-point value `a'\n | with respect to the corresponding value `b'. The operation is performed\n@@ -6914,74 +6917,6 @@ uint32_t float128_to_uint32(float128 a, float_status *status)\n return res;\n }\n \n-/*----------------------------------------------------------------------------\n-| Returns the result of converting the quadruple-precision floating-point\n-| value `a' to the single-precision floating-point format. The conversion\n-| is performed according to the IEC/IEEE Standard for Binary Floating-Point\n-| Arithmetic.\n-*----------------------------------------------------------------------------*/\n-\n-float32 float128_to_float32(float128 a, float_status *status)\n-{\n- bool aSign;\n- int32_t aExp;\n- uint64_t aSig0, aSig1;\n- uint32_t zSig;\n-\n- aSig1 = extractFloat128Frac1( a );\n- aSig0 = extractFloat128Frac0( a );\n- aExp = extractFloat128Exp( a );\n- aSign = extractFloat128Sign( a );\n- if ( aExp == 0x7FFF ) {\n- if ( aSig0 | aSig1 ) {\n- return commonNaNToFloat32(float128ToCommonNaN(a, status), status);\n- }\n- return packFloat32( aSign, 0xFF, 0 );\n- }\n- aSig0 |= ( aSig1 != 0 );\n- shift64RightJamming( aSig0, 18, &aSig0 );\n- zSig = aSig0;\n- if ( aExp || zSig ) {\n- zSig |= 0x40000000;\n- aExp -= 0x3F81;\n- }\n- return roundAndPackFloat32(aSign, aExp, zSig, status);\n-\n-}\n-\n-/*----------------------------------------------------------------------------\n-| Returns the result of converting the quadruple-precision floating-point\n-| value `a' to the double-precision floating-point format. The conversion\n-| is performed according to the IEC/IEEE Standard for Binary Floating-Point\n-| Arithmetic.\n-*----------------------------------------------------------------------------*/\n-\n-float64 float128_to_float64(float128 a, float_status *status)\n-{\n- bool aSign;\n- int32_t aExp;\n- uint64_t aSig0, aSig1;\n-\n- aSig1 = extractFloat128Frac1( a );\n- aSig0 = extractFloat128Frac0( a );\n- aExp = extractFloat128Exp( a );\n- aSign = extractFloat128Sign( a );\n- if ( aExp == 0x7FFF ) {\n- if ( aSig0 | aSig1 ) {\n- return commonNaNToFloat64(float128ToCommonNaN(a, status), status);\n- }\n- return packFloat64( aSign, 0x7FF, 0 );\n- }\n- shortShift128Left( aSig0, aSig1, 14, &aSig0, &aSig1 );\n- aSig0 |= ( aSig1 != 0 );\n- if ( aExp || aSig0 ) {\n- aSig0 |= UINT64_C(0x4000000000000000);\n- aExp -= 0x3C01;\n- }\n- return roundAndPackFloat64(aSign, aExp, aSig0, status);\n-\n-}\n-\n /*----------------------------------------------------------------------------\n | Returns the result of converting the quadruple-precision floating-point\n | value `a' to the extended double-precision floating-point format. The\n", "prefixes": [ "44/72" ] }