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GET /api/patches/1475752/?format=api
{ "id": 1475752, "url": "http://patchwork.ozlabs.org/api/patches/1475752/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20210508014802.892561-56-richard.henderson@linaro.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20210508014802.892561-56-richard.henderson@linaro.org>", "list_archive_url": null, "date": "2021-05-08T01:47:45", "name": "[55/72] softfloat: Reduce FloatFmt", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "54806d10edfcbf196d94055b71ee3f6bae0bb68a", "submitter": { "id": 72104, "url": "http://patchwork.ozlabs.org/api/people/72104/?format=api", "name": "Richard Henderson", "email": "richard.henderson@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20210508014802.892561-56-richard.henderson@linaro.org/mbox/", "series": [ { "id": 242770, "url": "http://patchwork.ozlabs.org/api/series/242770/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=242770", "date": "2021-05-08T01:46:53", "name": "Convert floatx80 and float128 to FloatParts", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/242770/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1475752/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1475752/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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helo=mail-pj1-x1033.google.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.23", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Cc": "alex.bennee@linaro.org, david@redhat.com", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "\"Qemu-devel\"\n <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>" }, "content": "Remove frac_lsb, frac_lsbm1, roundeven_mask. Compute\nthese from round_mask in parts$N_uncanon_normal.\n\nWith floatx80, round_mask will not be tied to frac_shift.\nEverything else is easily computable.\n\nSigned-off-by: Richard Henderson <richard.henderson@linaro.org>\n---\n fpu/softfloat.c | 29 ++++++++++++-----------------\n fpu/softfloat-parts.c.inc | 6 +++---\n 2 files changed, 15 insertions(+), 20 deletions(-)", "diff": "diff --git a/fpu/softfloat.c b/fpu/softfloat.c\nindex 4df69029ec..6a77e35663 100644\n--- a/fpu/softfloat.c\n+++ b/fpu/softfloat.c\n@@ -562,9 +562,7 @@ typedef struct {\n * frac_size: the size of the fraction field\n * frac_shift: shift to normalise the fraction with DECOMPOSED_BINARY_POINT\n * The following are computed based the size of fraction\n- * frac_lsb: least significant bit of fraction\n- * frac_lsbm1: the bit below the least significant bit (for rounding)\n- * round_mask/roundeven_mask: masks used for rounding\n+ * round_mask: bits below lsb which must be rounded\n * The following optional modifiers are available:\n * arm_althp: handle ARM Alternative Half Precision\n */\n@@ -574,24 +572,21 @@ typedef struct {\n int exp_max;\n int frac_size;\n int frac_shift;\n- uint64_t frac_lsb;\n- uint64_t frac_lsbm1;\n- uint64_t round_mask;\n- uint64_t roundeven_mask;\n bool arm_althp;\n+ uint64_t round_mask;\n } FloatFmt;\n \n /* Expand fields based on the size of exponent and fraction */\n-#define FLOAT_PARAMS(E, F) \\\n- .exp_size = E, \\\n- .exp_bias = ((1 << E) - 1) >> 1, \\\n- .exp_max = (1 << E) - 1, \\\n- .frac_size = F, \\\n- .frac_shift = (-F - 1) & 63, \\\n- .frac_lsb = 1ull << ((-F - 1) & 63), \\\n- .frac_lsbm1 = 1ull << ((-F - 2) & 63), \\\n- .round_mask = (1ull << ((-F - 1) & 63)) - 1, \\\n- .roundeven_mask = (2ull << ((-F - 1) & 63)) - 1\n+#define FLOAT_PARAMS_(E, F) \\\n+ .exp_size = E, \\\n+ .exp_bias = ((1 << E) - 1) >> 1, \\\n+ .exp_max = (1 << E) - 1, \\\n+ .frac_size = F\n+\n+#define FLOAT_PARAMS(E, F) \\\n+ FLOAT_PARAMS_(E, F), \\\n+ .frac_shift = (-F - 1) & 63, \\\n+ .round_mask = (1ull << ((-F - 1) & 63)) - 1\n \n static const FloatFmt float16_params = {\n FLOAT_PARAMS(5, 10)\ndiff --git a/fpu/softfloat-parts.c.inc b/fpu/softfloat-parts.c.inc\nindex 65462bf6cb..3ee6552d5a 100644\n--- a/fpu/softfloat-parts.c.inc\n+++ b/fpu/softfloat-parts.c.inc\n@@ -145,10 +145,10 @@ static void partsN(uncanon_normal)(FloatPartsN *p, float_status *s,\n {\n const int exp_max = fmt->exp_max;\n const int frac_shift = fmt->frac_shift;\n- const uint64_t frac_lsb = fmt->frac_lsb;\n- const uint64_t frac_lsbm1 = fmt->frac_lsbm1;\n const uint64_t round_mask = fmt->round_mask;\n- const uint64_t roundeven_mask = fmt->roundeven_mask;\n+ const uint64_t frac_lsb = round_mask + 1;\n+ const uint64_t frac_lsbm1 = round_mask ^ (round_mask >> 1);\n+ const uint64_t roundeven_mask = round_mask | frac_lsb;\n uint64_t inc;\n bool overflow_norm;\n int exp, flags = 0;\n", "prefixes": [ "55/72" ] }