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GET /api/patches/1475747/?format=api
{ "id": 1475747, "url": "http://patchwork.ozlabs.org/api/patches/1475747/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20210508014802.892561-48-richard.henderson@linaro.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20210508014802.892561-48-richard.henderson@linaro.org>", "list_archive_url": null, "date": "2021-05-08T01:47:37", "name": "[47/72] softfloat: Move rount_to_uint_and_pack to softfloat-parts.c.inc", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "d6fff4e3fb3a3066b2c5832d7ff02ba4dfb82180", "submitter": { "id": 72104, "url": "http://patchwork.ozlabs.org/api/people/72104/?format=api", "name": "Richard Henderson", "email": "richard.henderson@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20210508014802.892561-48-richard.henderson@linaro.org/mbox/", "series": [ { "id": 242770, "url": "http://patchwork.ozlabs.org/api/series/242770/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=242770", "date": "2021-05-08T01:46:53", "name": "Convert floatx80 and float128 to FloatParts", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/242770/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1475747/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1475747/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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helo=mail-pj1-x102d.google.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.23", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Cc": "alex.bennee@linaro.org, david@redhat.com", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "\"Qemu-devel\"\n <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>" }, "content": "Rename to parts$N_float_to_uint. Reimplement\nfloat128_to_uint{32,64}{_round_to_zero} with FloatParts128.\n\nSigned-off-by: Richard Henderson <richard.henderson@linaro.org>\n---\n fpu/softfloat.c | 357 +++++++++-----------------------------\n fpu/softfloat-parts.c.inc | 68 +++++++-\n 2 files changed, 147 insertions(+), 278 deletions(-)", "diff": "diff --git a/fpu/softfloat.c b/fpu/softfloat.c\nindex ac8e726935..235ddda7a0 100644\n--- a/fpu/softfloat.c\n+++ b/fpu/softfloat.c\n@@ -838,6 +838,16 @@ static int64_t parts128_float_to_sint(FloatParts128 *p, FloatRoundMode rmode,\n #define parts_float_to_sint(P, R, Z, MN, MX, S) \\\n PARTS_GENERIC_64_128(float_to_sint, P)(P, R, Z, MN, MX, S)\n \n+static uint64_t parts64_float_to_uint(FloatParts64 *p, FloatRoundMode rmode,\n+ int scale, uint64_t max,\n+ float_status *s);\n+static uint64_t parts128_float_to_uint(FloatParts128 *p, FloatRoundMode rmode,\n+ int scale, uint64_t max,\n+ float_status *s);\n+\n+#define parts_float_to_uint(P, R, Z, M, S) \\\n+ PARTS_GENERIC_64_128(float_to_uint, P)(P, R, Z, M, S)\n+\n /*\n * Helper functions for softfloat-parts.c.inc, per-size operations.\n */\n@@ -2645,80 +2655,16 @@ int64_t bfloat16_to_int64_round_to_zero(bfloat16 a, float_status *s)\n }\n \n /*\n- * Returns the result of converting the floating-point value `a' to\n- * the unsigned integer format. The conversion is performed according\n- * to the IEC/IEEE Standard for Binary Floating-Point\n- * Arithmetic---which means in particular that the conversion is\n- * rounded according to the current rounding mode. If `a' is a NaN,\n- * the largest unsigned integer is returned. Otherwise, if the\n- * conversion overflows, the largest unsigned integer is returned. If\n- * the 'a' is negative, the result is rounded and zero is returned;\n- * values that do not round to zero will raise the inexact exception\n- * flag.\n+ * Floating-point to unsigned integer conversions\n */\n \n-static uint64_t round_to_uint_and_pack(FloatParts64 p, FloatRoundMode rmode,\n- int scale, uint64_t max,\n- float_status *s)\n-{\n- int flags = 0;\n- uint64_t r;\n-\n- switch (p.cls) {\n- case float_class_snan:\n- case float_class_qnan:\n- flags = float_flag_invalid;\n- r = max;\n- break;\n-\n- case float_class_inf:\n- flags = float_flag_invalid;\n- r = p.sign ? 0 : max;\n- break;\n-\n- case float_class_zero:\n- return 0;\n-\n- case float_class_normal:\n- /* TODO: 62 = N - 2, frac_size for rounding */\n- if (parts_round_to_int_normal(&p, rmode, scale, 62)) {\n- flags = float_flag_inexact;\n- if (p.cls == float_class_zero) {\n- r = 0;\n- break;\n- }\n- }\n-\n- if (p.sign) {\n- flags = float_flag_invalid;\n- r = 0;\n- } else if (p.exp > DECOMPOSED_BINARY_POINT) {\n- flags = float_flag_invalid;\n- r = max;\n- } else {\n- r = p.frac >> (DECOMPOSED_BINARY_POINT - p.exp);\n- if (r > max) {\n- flags = float_flag_invalid;\n- r = max;\n- }\n- }\n- break;\n-\n- default:\n- g_assert_not_reached();\n- }\n-\n- float_raise(flags, s);\n- return r;\n-}\n-\n uint8_t float16_to_uint8_scalbn(float16 a, FloatRoundMode rmode, int scale,\n float_status *s)\n {\n FloatParts64 p;\n \n float16_unpack_canonical(&p, a, s);\n- return round_to_uint_and_pack(p, rmode, scale, UINT8_MAX, s);\n+ return parts_float_to_uint(&p, rmode, scale, UINT8_MAX, s);\n }\n \n uint16_t float16_to_uint16_scalbn(float16 a, FloatRoundMode rmode, int scale,\n@@ -2727,7 +2673,7 @@ uint16_t float16_to_uint16_scalbn(float16 a, FloatRoundMode rmode, int scale,\n FloatParts64 p;\n \n float16_unpack_canonical(&p, a, s);\n- return round_to_uint_and_pack(p, rmode, scale, UINT16_MAX, s);\n+ return parts_float_to_uint(&p, rmode, scale, UINT16_MAX, s);\n }\n \n uint32_t float16_to_uint32_scalbn(float16 a, FloatRoundMode rmode, int scale,\n@@ -2736,7 +2682,7 @@ uint32_t float16_to_uint32_scalbn(float16 a, FloatRoundMode rmode, int scale,\n FloatParts64 p;\n \n float16_unpack_canonical(&p, a, s);\n- return round_to_uint_and_pack(p, rmode, scale, UINT32_MAX, s);\n+ return parts_float_to_uint(&p, rmode, scale, UINT32_MAX, s);\n }\n \n uint64_t float16_to_uint64_scalbn(float16 a, FloatRoundMode rmode, int scale,\n@@ -2745,7 +2691,7 @@ uint64_t float16_to_uint64_scalbn(float16 a, FloatRoundMode rmode, int scale,\n FloatParts64 p;\n \n float16_unpack_canonical(&p, a, s);\n- return round_to_uint_and_pack(p, rmode, scale, UINT64_MAX, s);\n+ return parts_float_to_uint(&p, rmode, scale, UINT64_MAX, s);\n }\n \n uint16_t float32_to_uint16_scalbn(float32 a, FloatRoundMode rmode, int scale,\n@@ -2754,7 +2700,7 @@ uint16_t float32_to_uint16_scalbn(float32 a, FloatRoundMode rmode, int scale,\n FloatParts64 p;\n \n float32_unpack_canonical(&p, a, s);\n- return round_to_uint_and_pack(p, rmode, scale, UINT16_MAX, s);\n+ return parts_float_to_uint(&p, rmode, scale, UINT16_MAX, s);\n }\n \n uint32_t float32_to_uint32_scalbn(float32 a, FloatRoundMode rmode, int scale,\n@@ -2763,7 +2709,7 @@ uint32_t float32_to_uint32_scalbn(float32 a, FloatRoundMode rmode, int scale,\n FloatParts64 p;\n \n float32_unpack_canonical(&p, a, s);\n- return round_to_uint_and_pack(p, rmode, scale, UINT32_MAX, s);\n+ return parts_float_to_uint(&p, rmode, scale, UINT32_MAX, s);\n }\n \n uint64_t float32_to_uint64_scalbn(float32 a, FloatRoundMode rmode, int scale,\n@@ -2772,7 +2718,7 @@ uint64_t float32_to_uint64_scalbn(float32 a, FloatRoundMode rmode, int scale,\n FloatParts64 p;\n \n float32_unpack_canonical(&p, a, s);\n- return round_to_uint_and_pack(p, rmode, scale, UINT64_MAX, s);\n+ return parts_float_to_uint(&p, rmode, scale, UINT64_MAX, s);\n }\n \n uint16_t float64_to_uint16_scalbn(float64 a, FloatRoundMode rmode, int scale,\n@@ -2781,7 +2727,7 @@ uint16_t float64_to_uint16_scalbn(float64 a, FloatRoundMode rmode, int scale,\n FloatParts64 p;\n \n float64_unpack_canonical(&p, a, s);\n- return round_to_uint_and_pack(p, rmode, scale, UINT16_MAX, s);\n+ return parts_float_to_uint(&p, rmode, scale, UINT16_MAX, s);\n }\n \n uint32_t float64_to_uint32_scalbn(float64 a, FloatRoundMode rmode, int scale,\n@@ -2790,7 +2736,7 @@ uint32_t float64_to_uint32_scalbn(float64 a, FloatRoundMode rmode, int scale,\n FloatParts64 p;\n \n float64_unpack_canonical(&p, a, s);\n- return round_to_uint_and_pack(p, rmode, scale, UINT32_MAX, s);\n+ return parts_float_to_uint(&p, rmode, scale, UINT32_MAX, s);\n }\n \n uint64_t float64_to_uint64_scalbn(float64 a, FloatRoundMode rmode, int scale,\n@@ -2799,7 +2745,52 @@ uint64_t float64_to_uint64_scalbn(float64 a, FloatRoundMode rmode, int scale,\n FloatParts64 p;\n \n float64_unpack_canonical(&p, a, s);\n- return round_to_uint_and_pack(p, rmode, scale, UINT64_MAX, s);\n+ return parts_float_to_uint(&p, rmode, scale, UINT64_MAX, s);\n+}\n+\n+uint16_t bfloat16_to_uint16_scalbn(bfloat16 a, FloatRoundMode rmode,\n+ int scale, float_status *s)\n+{\n+ FloatParts64 p;\n+\n+ bfloat16_unpack_canonical(&p, a, s);\n+ return parts_float_to_uint(&p, rmode, scale, UINT16_MAX, s);\n+}\n+\n+uint32_t bfloat16_to_uint32_scalbn(bfloat16 a, FloatRoundMode rmode,\n+ int scale, float_status *s)\n+{\n+ FloatParts64 p;\n+\n+ bfloat16_unpack_canonical(&p, a, s);\n+ return parts_float_to_uint(&p, rmode, scale, UINT32_MAX, s);\n+}\n+\n+uint64_t bfloat16_to_uint64_scalbn(bfloat16 a, FloatRoundMode rmode,\n+ int scale, float_status *s)\n+{\n+ FloatParts64 p;\n+\n+ bfloat16_unpack_canonical(&p, a, s);\n+ return parts_float_to_uint(&p, rmode, scale, UINT64_MAX, s);\n+}\n+\n+static uint32_t float128_to_uint32_scalbn(float128 a, FloatRoundMode rmode,\n+ int scale, float_status *s)\n+{\n+ FloatParts128 p;\n+\n+ float128_unpack_canonical(&p, a, s);\n+ return parts_float_to_uint(&p, rmode, scale, UINT32_MAX, s);\n+}\n+\n+static uint64_t float128_to_uint64_scalbn(float128 a, FloatRoundMode rmode,\n+ int scale, float_status *s)\n+{\n+ FloatParts128 p;\n+\n+ float128_unpack_canonical(&p, a, s);\n+ return parts_float_to_uint(&p, rmode, scale, UINT64_MAX, s);\n }\n \n uint8_t float16_to_uint8(float16 a, float_status *s)\n@@ -2852,6 +2843,16 @@ uint64_t float64_to_uint64(float64 a, float_status *s)\n return float64_to_uint64_scalbn(a, s->float_rounding_mode, 0, s);\n }\n \n+uint32_t float128_to_uint32(float128 a, float_status *s)\n+{\n+ return float128_to_uint32_scalbn(a, s->float_rounding_mode, 0, s);\n+}\n+\n+uint64_t float128_to_uint64(float128 a, float_status *s)\n+{\n+ return float128_to_uint64_scalbn(a, s->float_rounding_mode, 0, s);\n+}\n+\n uint16_t float16_to_uint16_round_to_zero(float16 a, float_status *s)\n {\n return float16_to_uint16_scalbn(a, float_round_to_zero, 0, s);\n@@ -2897,36 +2898,14 @@ uint64_t float64_to_uint64_round_to_zero(float64 a, float_status *s)\n return float64_to_uint64_scalbn(a, float_round_to_zero, 0, s);\n }\n \n-/*\n- * Returns the result of converting the bfloat16 value `a' to\n- * the unsigned integer format.\n- */\n-\n-uint16_t bfloat16_to_uint16_scalbn(bfloat16 a, FloatRoundMode rmode,\n- int scale, float_status *s)\n+uint32_t float128_to_uint32_round_to_zero(float128 a, float_status *s)\n {\n- FloatParts64 p;\n-\n- bfloat16_unpack_canonical(&p, a, s);\n- return round_to_uint_and_pack(p, rmode, scale, UINT16_MAX, s);\n+ return float128_to_uint32_scalbn(a, float_round_to_zero, 0, s);\n }\n \n-uint32_t bfloat16_to_uint32_scalbn(bfloat16 a, FloatRoundMode rmode,\n- int scale, float_status *s)\n+uint64_t float128_to_uint64_round_to_zero(float128 a, float_status *s)\n {\n- FloatParts64 p;\n-\n- bfloat16_unpack_canonical(&p, a, s);\n- return round_to_uint_and_pack(p, rmode, scale, UINT32_MAX, s);\n-}\n-\n-uint64_t bfloat16_to_uint64_scalbn(bfloat16 a, FloatRoundMode rmode,\n- int scale, float_status *s)\n-{\n- FloatParts64 p;\n-\n- bfloat16_unpack_canonical(&p, a, s);\n- return round_to_uint_and_pack(p, rmode, scale, UINT64_MAX, s);\n+ return float128_to_uint64_scalbn(a, float_round_to_zero, 0, s);\n }\n \n uint16_t bfloat16_to_uint16(bfloat16 a, float_status *s)\n@@ -4122,66 +4101,6 @@ static int64_t roundAndPackInt64(bool zSign, uint64_t absZ0, uint64_t absZ1,\n \n }\n \n-/*----------------------------------------------------------------------------\n-| Takes the 128-bit fixed-point value formed by concatenating `absZ0' and\n-| `absZ1', with binary point between bits 63 and 64 (between the input words),\n-| and returns the properly rounded 64-bit unsigned integer corresponding to the\n-| input. Ordinarily, the fixed-point input is simply rounded to an integer,\n-| with the inexact exception raised if the input cannot be represented exactly\n-| as an integer. However, if the fixed-point input is too large, the invalid\n-| exception is raised and the largest unsigned integer is returned.\n-*----------------------------------------------------------------------------*/\n-\n-static int64_t roundAndPackUint64(bool zSign, uint64_t absZ0,\n- uint64_t absZ1, float_status *status)\n-{\n- int8_t roundingMode;\n- bool roundNearestEven, increment;\n-\n- roundingMode = status->float_rounding_mode;\n- roundNearestEven = (roundingMode == float_round_nearest_even);\n- switch (roundingMode) {\n- case float_round_nearest_even:\n- case float_round_ties_away:\n- increment = ((int64_t)absZ1 < 0);\n- break;\n- case float_round_to_zero:\n- increment = 0;\n- break;\n- case float_round_up:\n- increment = !zSign && absZ1;\n- break;\n- case float_round_down:\n- increment = zSign && absZ1;\n- break;\n- case float_round_to_odd:\n- increment = !(absZ0 & 1) && absZ1;\n- break;\n- default:\n- abort();\n- }\n- if (increment) {\n- ++absZ0;\n- if (absZ0 == 0) {\n- float_raise(float_flag_invalid, status);\n- return UINT64_MAX;\n- }\n- if (!(absZ1 << 1) && roundNearestEven) {\n- absZ0 &= ~1;\n- }\n- }\n-\n- if (zSign && absZ0) {\n- float_raise(float_flag_invalid, status);\n- return 0;\n- }\n-\n- if (absZ1) {\n- float_raise(float_flag_inexact, status);\n- }\n- return absZ0;\n-}\n-\n /*----------------------------------------------------------------------------\n | Normalizes the subnormal single-precision floating-point value represented\n | by the denormalized significand `aSig'. The normalized exponent and\n@@ -6535,122 +6454,6 @@ floatx80 floatx80_sqrt(floatx80 a, float_status *status)\n 0, zExp, zSig0, zSig1, status);\n }\n \n-/*----------------------------------------------------------------------------\n-| Returns the result of converting the quadruple-precision floating-point value\n-| `a' to the 64-bit unsigned integer format. The conversion is\n-| performed according to the IEC/IEEE Standard for Binary Floating-Point\n-| Arithmetic---which means in particular that the conversion is rounded\n-| according to the current rounding mode. If `a' is a NaN, the largest\n-| positive integer is returned. If the conversion overflows, the\n-| largest unsigned integer is returned. If 'a' is negative, the value is\n-| rounded and zero is returned; negative values that do not round to zero\n-| will raise the inexact exception.\n-*----------------------------------------------------------------------------*/\n-\n-uint64_t float128_to_uint64(float128 a, float_status *status)\n-{\n- bool aSign;\n- int aExp;\n- int shiftCount;\n- uint64_t aSig0, aSig1;\n-\n- aSig0 = extractFloat128Frac0(a);\n- aSig1 = extractFloat128Frac1(a);\n- aExp = extractFloat128Exp(a);\n- aSign = extractFloat128Sign(a);\n- if (aSign && (aExp > 0x3FFE)) {\n- float_raise(float_flag_invalid, status);\n- if (float128_is_any_nan(a)) {\n- return UINT64_MAX;\n- } else {\n- return 0;\n- }\n- }\n- if (aExp) {\n- aSig0 |= UINT64_C(0x0001000000000000);\n- }\n- shiftCount = 0x402F - aExp;\n- if (shiftCount <= 0) {\n- if (0x403E < aExp) {\n- float_raise(float_flag_invalid, status);\n- return UINT64_MAX;\n- }\n- shortShift128Left(aSig0, aSig1, -shiftCount, &aSig0, &aSig1);\n- } else {\n- shift64ExtraRightJamming(aSig0, aSig1, shiftCount, &aSig0, &aSig1);\n- }\n- return roundAndPackUint64(aSign, aSig0, aSig1, status);\n-}\n-\n-uint64_t float128_to_uint64_round_to_zero(float128 a, float_status *status)\n-{\n- uint64_t v;\n- signed char current_rounding_mode = status->float_rounding_mode;\n-\n- set_float_rounding_mode(float_round_to_zero, status);\n- v = float128_to_uint64(a, status);\n- set_float_rounding_mode(current_rounding_mode, status);\n-\n- return v;\n-}\n-\n-/*----------------------------------------------------------------------------\n-| Returns the result of converting the quadruple-precision floating-point\n-| value `a' to the 32-bit unsigned integer format. The conversion\n-| is performed according to the IEC/IEEE Standard for Binary Floating-Point\n-| Arithmetic except that the conversion is always rounded toward zero.\n-| If `a' is a NaN, the largest positive integer is returned. Otherwise,\n-| if the conversion overflows, the largest unsigned integer is returned.\n-| If 'a' is negative, the value is rounded and zero is returned; negative\n-| values that do not round to zero will raise the inexact exception.\n-*----------------------------------------------------------------------------*/\n-\n-uint32_t float128_to_uint32_round_to_zero(float128 a, float_status *status)\n-{\n- uint64_t v;\n- uint32_t res;\n- int old_exc_flags = get_float_exception_flags(status);\n-\n- v = float128_to_uint64_round_to_zero(a, status);\n- if (v > 0xffffffff) {\n- res = 0xffffffff;\n- } else {\n- return v;\n- }\n- set_float_exception_flags(old_exc_flags, status);\n- float_raise(float_flag_invalid, status);\n- return res;\n-}\n-\n-/*----------------------------------------------------------------------------\n-| Returns the result of converting the quadruple-precision floating-point value\n-| `a' to the 32-bit unsigned integer format. The conversion is\n-| performed according to the IEC/IEEE Standard for Binary Floating-Point\n-| Arithmetic---which means in particular that the conversion is rounded\n-| according to the current rounding mode. If `a' is a NaN, the largest\n-| positive integer is returned. If the conversion overflows, the\n-| largest unsigned integer is returned. If 'a' is negative, the value is\n-| rounded and zero is returned; negative values that do not round to zero\n-| will raise the inexact exception.\n-*----------------------------------------------------------------------------*/\n-\n-uint32_t float128_to_uint32(float128 a, float_status *status)\n-{\n- uint64_t v;\n- uint32_t res;\n- int old_exc_flags = get_float_exception_flags(status);\n-\n- v = float128_to_uint64(a, status);\n- if (v > 0xffffffff) {\n- res = 0xffffffff;\n- } else {\n- return v;\n- }\n- set_float_exception_flags(old_exc_flags, status);\n- float_raise(float_flag_invalid, status);\n- return res;\n-}\n-\n /*----------------------------------------------------------------------------\n | Returns the result of converting the quadruple-precision floating-point\n | value `a' to the extended double-precision floating-point format. The\ndiff --git a/fpu/softfloat-parts.c.inc b/fpu/softfloat-parts.c.inc\nindex a897a5a743..c6e327547f 100644\n--- a/fpu/softfloat-parts.c.inc\n+++ b/fpu/softfloat-parts.c.inc\n@@ -761,7 +761,7 @@ static void partsN(round_to_int)(FloatPartsN *a, FloatRoundMode rmode,\n * the largest positive integer is returned. Otherwise, if the\n * conversion overflows, the largest integer with the same sign as `a'\n * is returned.\n-*/\n+ */\n static int64_t partsN(float_to_sint)(FloatPartsN *p, FloatRoundMode rmode,\n int scale, int64_t min, int64_t max,\n float_status *s)\n@@ -815,3 +815,69 @@ static int64_t partsN(float_to_sint)(FloatPartsN *p, FloatRoundMode rmode,\n float_raise(flags, s);\n return r;\n }\n+\n+/*\n+ * Returns the result of converting the floating-point value `a' to\n+ * the unsigned integer format. The conversion is performed according\n+ * to the IEC/IEEE Standard for Binary Floating-Point\n+ * Arithmetic---which means in particular that the conversion is\n+ * rounded according to the current rounding mode. If `a' is a NaN,\n+ * the largest unsigned integer is returned. Otherwise, if the\n+ * conversion overflows, the largest unsigned integer is returned. If\n+ * the 'a' is negative, the result is rounded and zero is returned;\n+ * values that do not round to zero will raise the inexact exception\n+ * flag.\n+ */\n+static uint64_t partsN(float_to_uint)(FloatPartsN *p, FloatRoundMode rmode,\n+ int scale, uint64_t max, float_status *s)\n+{\n+ int flags = 0;\n+ uint64_t r;\n+\n+ switch (p->cls) {\n+ case float_class_snan:\n+ case float_class_qnan:\n+ flags = float_flag_invalid;\n+ r = max;\n+ break;\n+\n+ case float_class_inf:\n+ flags = float_flag_invalid;\n+ r = p->sign ? 0 : max;\n+ break;\n+\n+ case float_class_zero:\n+ return 0;\n+\n+ case float_class_normal:\n+ /* TODO: N - 2 is frac_size for rounding; could use input fmt. */\n+ if (parts_round_to_int_normal(p, rmode, scale, N - 2)) {\n+ flags = float_flag_inexact;\n+ if (p->cls == float_class_zero) {\n+ r = 0;\n+ break;\n+ }\n+ }\n+\n+ if (p->sign) {\n+ flags = float_flag_invalid;\n+ r = 0;\n+ } else if (p->exp > DECOMPOSED_BINARY_POINT) {\n+ flags = float_flag_invalid;\n+ r = max;\n+ } else {\n+ r = p->frac_hi >> (DECOMPOSED_BINARY_POINT - p->exp);\n+ if (r > max) {\n+ flags = float_flag_invalid;\n+ r = max;\n+ }\n+ }\n+ break;\n+\n+ default:\n+ g_assert_not_reached();\n+ }\n+\n+ float_raise(flags, s);\n+ return r;\n+}\n", "prefixes": [ "47/72" ] }