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GET /api/patches/1475738/?format=api
HTTP 200 OK
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{
    "id": 1475738,
    "url": "http://patchwork.ozlabs.org/api/patches/1475738/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20210508014802.892561-32-richard.henderson@linaro.org/",
    "project": {
        "id": 14,
        "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api",
        "name": "QEMU Development",
        "link_name": "qemu-devel",
        "list_id": "qemu-devel.nongnu.org",
        "list_email": "qemu-devel@nongnu.org",
        "web_url": "",
        "scm_url": "",
        "webscm_url": "",
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<20210508014802.892561-32-richard.henderson@linaro.org>",
    "list_archive_url": null,
    "date": "2021-05-08T01:47:21",
    "name": "[31/72] softfloat: Move sf_canonicalize to softfloat-parts.c.inc",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "eca269fee100d5e235484c5711ec312b922deac9",
    "submitter": {
        "id": 72104,
        "url": "http://patchwork.ozlabs.org/api/people/72104/?format=api",
        "name": "Richard Henderson",
        "email": "richard.henderson@linaro.org"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20210508014802.892561-32-richard.henderson@linaro.org/mbox/",
    "series": [
        {
            "id": 242770,
            "url": "http://patchwork.ozlabs.org/api/series/242770/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=242770",
            "date": "2021-05-08T01:46:53",
            "name": "Convert floatx80 and float128 to FloatParts",
            "version": 1,
            "mbox": "http://patchwork.ozlabs.org/series/242770/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/1475738/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/1475738/checks/",
    "tags": {},
    "related": [],
    "headers": {
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        "From": "Richard Henderson <richard.henderson@linaro.org>",
        "To": "qemu-devel@nongnu.org",
        "Subject": "[PATCH 31/72] softfloat: Move sf_canonicalize to\n softfloat-parts.c.inc",
        "Date": "Fri,  7 May 2021 18:47:21 -0700",
        "Message-Id": "<20210508014802.892561-32-richard.henderson@linaro.org>",
        "X-Mailer": "git-send-email 2.25.1",
        "In-Reply-To": "<20210508014802.892561-1-richard.henderson@linaro.org>",
        "References": "<20210508014802.892561-1-richard.henderson@linaro.org>",
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        "Cc": "alex.bennee@linaro.org, david@redhat.com",
        "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org",
        "Sender": "\"Qemu-devel\"\n <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>"
    },
    "content": "At the same time, convert to pointers, rename to parts$N_canonicalize\nand define a macro for parts_canonicalize using QEMU_GENERIC.\n\nSigned-off-by: Richard Henderson <richard.henderson@linaro.org>\n---\n fpu/softfloat.c           | 117 +++++++++++++++++++++++++-------------\n fpu/softfloat-parts.c.inc |  33 +++++++++++\n 2 files changed, 112 insertions(+), 38 deletions(-)",
    "diff": "diff --git a/fpu/softfloat.c b/fpu/softfloat.c\nindex 40ee294e35..bad4b54cd2 100644\n--- a/fpu/softfloat.c\n+++ b/fpu/softfloat.c\n@@ -732,6 +732,14 @@ static FloatParts128 *parts128_pick_nan_muladd(FloatParts128 *a,\n #define parts_pick_nan_muladd(A, B, C, S, ABM, ABCM) \\\n     PARTS_GENERIC_64_128(pick_nan_muladd, A)(A, B, C, S, ABM, ABCM)\n \n+static void parts64_canonicalize(FloatParts64 *p, float_status *status,\n+                                 const FloatFmt *fmt);\n+static void parts128_canonicalize(FloatParts128 *p, float_status *status,\n+                                  const FloatFmt *fmt);\n+\n+#define parts_canonicalize(A, S, F) \\\n+    PARTS_GENERIC_64_128(canonicalize, A)(A, S, F)\n+\n /*\n  * Helper functions for softfloat-parts.c.inc, per-size operations.\n  */\n@@ -758,52 +766,85 @@ static int frac128_cmp(FloatParts128 *a, FloatParts128 *b)\n \n #define frac_cmp(A, B)  FRAC_GENERIC_64_128(cmp, A)(A, B)\n \n+static void frac64_clear(FloatParts64 *a)\n+{\n+    a->frac = 0;\n+}\n+\n+static void frac128_clear(FloatParts128 *a)\n+{\n+    a->frac_hi = a->frac_lo = 0;\n+}\n+\n+#define frac_clear(A)  FRAC_GENERIC_64_128(clear, A)(A)\n+\n+static bool frac64_eqz(FloatParts64 *a)\n+{\n+    return a->frac == 0;\n+}\n+\n+static bool frac128_eqz(FloatParts128 *a)\n+{\n+    return (a->frac_hi | a->frac_lo) == 0;\n+}\n+\n+#define frac_eqz(A)  FRAC_GENERIC_64_128(eqz, A)(A)\n+\n+static int frac64_normalize(FloatParts64 *a)\n+{\n+    if (a->frac) {\n+        int shift = clz64(a->frac);\n+        a->frac <<= shift;\n+        return shift;\n+    }\n+    return 64;\n+}\n+\n+static int frac128_normalize(FloatParts128 *a)\n+{\n+    if (a->frac_hi) {\n+        int shl = clz64(a->frac_hi);\n+        if (shl) {\n+            int shr = 64 - shl;\n+            a->frac_hi = (a->frac_hi << shl) | (a->frac_lo >> shr);\n+            a->frac_lo = (a->frac_lo << shl);\n+        }\n+        return shl;\n+    } else if (a->frac_lo) {\n+        int shl = clz64(a->frac_lo);\n+        a->frac_hi = (a->frac_lo << shl);\n+        a->frac_lo = 0;\n+        return shl + 64;\n+    }\n+    return 128;\n+}\n+\n+#define frac_normalize(A)  FRAC_GENERIC_64_128(normalize, A)(A)\n+\n+static void frac64_shl(FloatParts64 *a, int c)\n+{\n+    a->frac <<= c;\n+}\n+\n static void frac128_shl(FloatParts128 *a, int c)\n {\n     shift128Left(a->frac_hi, a->frac_lo, c, &a->frac_hi, &a->frac_lo);\n }\n \n-#define frac_shl(A, C)             frac128_shl(A, C)\n+#define frac_shl(A, C)  FRAC_GENERIC_64_128(shl, A)(A, C)\n+\n+static void frac64_shr(FloatParts64 *a, int c)\n+{\n+    a->frac >>= c;\n+}\n \n static void frac128_shr(FloatParts128 *a, int c)\n {\n     shift128Right(a->frac_hi, a->frac_lo, c, &a->frac_hi, &a->frac_lo);\n }\n \n-#define frac_shr(A, C)             frac128_shr(A, C)\n+#define frac_shr(A, C)  FRAC_GENERIC_64_128(shr, A)(A, C)\n \n-/* Canonicalize EXP and FRAC, setting CLS.  */\n-static FloatParts64 sf_canonicalize(FloatParts64 part, const FloatFmt *parm,\n-                                  float_status *status)\n-{\n-    if (part.exp == parm->exp_max && !parm->arm_althp) {\n-        if (part.frac == 0) {\n-            part.cls = float_class_inf;\n-        } else {\n-            part.frac <<= parm->frac_shift;\n-            part.cls = (parts_is_snan_frac(part.frac, status)\n-                        ? float_class_snan : float_class_qnan);\n-        }\n-    } else if (part.exp == 0) {\n-        if (likely(part.frac == 0)) {\n-            part.cls = float_class_zero;\n-        } else if (status->flush_inputs_to_zero) {\n-            float_raise(float_flag_input_denormal, status);\n-            part.cls = float_class_zero;\n-            part.frac = 0;\n-        } else {\n-            int shift = clz64(part.frac);\n-            part.cls = float_class_normal;\n-            part.exp = parm->frac_shift - parm->exp_bias - shift + 1;\n-            part.frac <<= shift;\n-        }\n-    } else {\n-        part.cls = float_class_normal;\n-        part.exp -= parm->exp_bias;\n-        part.frac = DECOMPOSED_IMPLICIT_BIT + (part.frac << parm->frac_shift);\n-    }\n-    return part;\n-}\n \n /* Round and uncanonicalize a floating-point number by parts. There\n  * are FRAC_SHIFT bits that may require rounding at the bottom of the\n@@ -983,7 +1024,7 @@ static void float16a_unpack_canonical(FloatParts64 *p, float16 f,\n                                       float_status *s, const FloatFmt *params)\n {\n     float16_unpack_raw(p, f);\n-    *p = sf_canonicalize(*p, params, s);\n+    parts_canonicalize(p, s, params);\n }\n \n static void float16_unpack_canonical(FloatParts64 *p, float16 f,\n@@ -996,7 +1037,7 @@ static void bfloat16_unpack_canonical(FloatParts64 *p, bfloat16 f,\n                                       float_status *s)\n {\n     bfloat16_unpack_raw(p, f);\n-    *p = sf_canonicalize(*p, &bfloat16_params, s);\n+    parts_canonicalize(p, s, &bfloat16_params);\n }\n \n static float16 float16a_round_pack_canonical(FloatParts64 *p,\n@@ -1024,7 +1065,7 @@ static void float32_unpack_canonical(FloatParts64 *p, float32 f,\n                                      float_status *s)\n {\n     float32_unpack_raw(p, f);\n-    *p = sf_canonicalize(*p, &float32_params, s);\n+    parts_canonicalize(p, s, &float32_params);\n }\n \n static float32 float32_round_pack_canonical(FloatParts64 *p,\n@@ -1038,7 +1079,7 @@ static void float64_unpack_canonical(FloatParts64 *p, float64 f,\n                                      float_status *s)\n {\n     float64_unpack_raw(p, f);\n-    *p = sf_canonicalize(*p, &float64_params, s);\n+    parts_canonicalize(p, s, &float64_params);\n }\n \n static float64 float64_round_pack_canonical(FloatParts64 *p,\ndiff --git a/fpu/softfloat-parts.c.inc b/fpu/softfloat-parts.c.inc\nindex a78d61ea07..25bf99bd0f 100644\n--- a/fpu/softfloat-parts.c.inc\n+++ b/fpu/softfloat-parts.c.inc\n@@ -100,3 +100,36 @@ static FloatPartsN *partsN(pick_nan_muladd)(FloatPartsN *a, FloatPartsN *b,\n     }\n     return a;\n }\n+\n+/*\n+ * Canonicalize the FloatParts structure.  Determine the class,\n+ * unbias the exponent, and normalize the fraction.\n+ */\n+static void partsN(canonicalize)(FloatPartsN *p, float_status *status,\n+                                 const FloatFmt *fmt)\n+{\n+    if (unlikely(p->exp == 0)) {\n+        if (likely(frac_eqz(p))) {\n+            p->cls = float_class_zero;\n+        } else if (status->flush_inputs_to_zero) {\n+            float_raise(float_flag_input_denormal, status);\n+            p->cls = float_class_zero;\n+            frac_clear(p);\n+        } else {\n+            int shift = frac_normalize(p);\n+            p->cls = float_class_normal;\n+            p->exp = fmt->frac_shift - fmt->exp_bias - shift + 1;\n+        }\n+    } else if (likely(p->exp < fmt->exp_max) || fmt->arm_althp) {\n+        p->cls = float_class_normal;\n+        p->exp -= fmt->exp_bias;\n+        frac_shl(p, fmt->frac_shift);\n+        p->frac_hi |= DECOMPOSED_IMPLICIT_BIT;\n+    } else if (likely(frac_eqz(p))) {\n+        p->cls = float_class_inf;\n+    } else {\n+        frac_shl(p, fmt->frac_shift);\n+        p->cls = (parts_is_snan_frac(p->frac_hi, status)\n+                  ? float_class_snan : float_class_qnan);\n+    }\n+}\n",
    "prefixes": [
        "31/72"
    ]
}