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GET /api/patches/1475737/?format=api
{ "id": 1475737, "url": "http://patchwork.ozlabs.org/api/patches/1475737/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20210508014802.892561-30-richard.henderson@linaro.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20210508014802.892561-30-richard.henderson@linaro.org>", "list_archive_url": null, "date": "2021-05-08T01:47:19", "name": "[29/72] softfloat: Move pick_nan to softfloat-parts.c.inc", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "fb2f366f5752a86f97f9b645d73c7eed02686c4d", "submitter": { "id": 72104, "url": "http://patchwork.ozlabs.org/api/people/72104/?format=api", "name": "Richard Henderson", "email": "richard.henderson@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20210508014802.892561-30-richard.henderson@linaro.org/mbox/", "series": [ { "id": 242770, "url": "http://patchwork.ozlabs.org/api/series/242770/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=242770", "date": "2021-05-08T01:46:53", "name": "Convert floatx80 and float128 to FloatParts", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/242770/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1475737/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1475737/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n spf=pass (sender SPF authorized) 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"<20210508014802.892561-1-richard.henderson@linaro.org>", "References": "<20210508014802.892561-1-richard.henderson@linaro.org>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=2607:f8b0:4864:20::42d;\n envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42d.google.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.23", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Cc": "alex.bennee@linaro.org, david@redhat.com", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "\"Qemu-devel\"\n <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>" }, "content": "At the same time, convert to pointers, rename to parts$N_pick_nan\nand define a macro for parts_pick_nan using QEMU_GENERIC.\n\nSigned-off-by: Richard Henderson <richard.henderson@linaro.org>\n---\n fpu/softfloat.c | 62 ++++++++++++++++++++++-----------------\n fpu/softfloat-parts.c.inc | 25 ++++++++++++++++\n 2 files changed, 60 insertions(+), 27 deletions(-)", "diff": "diff --git a/fpu/softfloat.c b/fpu/softfloat.c\nindex 5b26696078..77efaedeaa 100644\n--- a/fpu/softfloat.c\n+++ b/fpu/softfloat.c\n@@ -713,10 +713,39 @@ static void parts128_return_nan(FloatParts128 *a, float_status *s);\n \n #define parts_return_nan(P, S) PARTS_GENERIC_64_128(return_nan, P)(P, S)\n \n+static FloatParts64 *parts64_pick_nan(FloatParts64 *a, FloatParts64 *b,\n+ float_status *s);\n+static FloatParts128 *parts128_pick_nan(FloatParts128 *a, FloatParts128 *b,\n+ float_status *s);\n+\n+#define parts_pick_nan(A, B, S) PARTS_GENERIC_64_128(pick_nan, A)(A, B, S)\n+\n /*\n * Helper functions for softfloat-parts.c.inc, per-size operations.\n */\n \n+#define FRAC_GENERIC_64_128(NAME, P) \\\n+ QEMU_GENERIC(P, (FloatParts128 *, frac128_##NAME), frac64_##NAME)\n+\n+static int frac64_cmp(FloatParts64 *a, FloatParts64 *b)\n+{\n+ return a->frac == b->frac ? 0 : a->frac < b->frac ? -1 : 1;\n+}\n+\n+static int frac128_cmp(FloatParts128 *a, FloatParts128 *b)\n+{\n+ uint64_t ta = a->frac_hi, tb = b->frac_hi;\n+ if (ta == tb) {\n+ ta = a->frac_lo, tb = b->frac_lo;\n+ if (ta == tb) {\n+ return 0;\n+ }\n+ }\n+ return ta < tb ? -1 : 1;\n+}\n+\n+#define frac_cmp(A, B) FRAC_GENERIC_64_128(cmp, A)(A, B)\n+\n static void frac128_shl(FloatParts128 *a, int c)\n {\n shift128Left(a->frac_hi, a->frac_lo, c, &a->frac_hi, &a->frac_lo);\n@@ -918,27 +947,6 @@ static FloatParts64 round_canonical(FloatParts64 p, float_status *s,\n return p;\n }\n \n-static FloatParts64 pick_nan(FloatParts64 a, FloatParts64 b, float_status *s)\n-{\n- if (is_snan(a.cls) || is_snan(b.cls)) {\n- float_raise(float_flag_invalid, s);\n- }\n-\n- if (s->default_nan_mode) {\n- parts_default_nan(&a, s);\n- } else {\n- if (pickNaN(a.cls, b.cls,\n- a.frac > b.frac ||\n- (a.frac == b.frac && a.sign < b.sign), s)) {\n- a = b;\n- }\n- if (is_snan(a.cls)) {\n- parts_silence_nan(&a, s);\n- }\n- }\n- return a;\n-}\n-\n static FloatParts64 pick_nan_muladd(FloatParts64 a, FloatParts64 b, FloatParts64 c,\n bool inf_zero, float_status *s)\n {\n@@ -1106,7 +1114,7 @@ static FloatParts64 addsub_floats(FloatParts64 a, FloatParts64 b, bool subtract,\n return a;\n }\n if (is_nan(a.cls) || is_nan(b.cls)) {\n- return pick_nan(a, b, s);\n+ return *parts_pick_nan(&a, &b, s);\n }\n if (a.cls == float_class_inf) {\n if (b.cls == float_class_inf) {\n@@ -1144,7 +1152,7 @@ static FloatParts64 addsub_floats(FloatParts64 a, FloatParts64 b, bool subtract,\n return a;\n }\n if (is_nan(a.cls) || is_nan(b.cls)) {\n- return pick_nan(a, b, s);\n+ return *parts_pick_nan(&a, &b, s);\n }\n if (a.cls == float_class_inf || b.cls == float_class_zero) {\n return a;\n@@ -1360,7 +1368,7 @@ static FloatParts64 mul_floats(FloatParts64 a, FloatParts64 b, float_status *s)\n }\n /* handle all the NaN cases */\n if (is_nan(a.cls) || is_nan(b.cls)) {\n- return pick_nan(a, b, s);\n+ return *parts_pick_nan(&a, &b, s);\n }\n /* Inf * Zero == NaN */\n if ((a.cls == float_class_inf && b.cls == float_class_zero) ||\n@@ -1887,7 +1895,7 @@ static FloatParts64 div_floats(FloatParts64 a, FloatParts64 b, float_status *s)\n }\n /* handle all the NaN cases */\n if (is_nan(a.cls) || is_nan(b.cls)) {\n- return pick_nan(a, b, s);\n+ return *parts_pick_nan(&a, &b, s);\n }\n /* 0/0 or Inf/Inf */\n if (a.cls == b.cls\n@@ -3295,14 +3303,14 @@ static FloatParts64 minmax_floats(FloatParts64 a, FloatParts64 b, bool ismin,\n * the invalid exception is raised.\n */\n if (is_snan(a.cls) || is_snan(b.cls)) {\n- return pick_nan(a, b, s);\n+ return *parts_pick_nan(&a, &b, s);\n } else if (is_nan(a.cls) && !is_nan(b.cls)) {\n return b;\n } else if (is_nan(b.cls) && !is_nan(a.cls)) {\n return a;\n }\n }\n- return pick_nan(a, b, s);\n+ return *parts_pick_nan(&a, &b, s);\n } else {\n int a_exp, b_exp;\n \ndiff --git a/fpu/softfloat-parts.c.inc b/fpu/softfloat-parts.c.inc\nindex 2a3075d6fe..11a71650f7 100644\n--- a/fpu/softfloat-parts.c.inc\n+++ b/fpu/softfloat-parts.c.inc\n@@ -35,3 +35,28 @@ static void partsN(return_nan)(FloatPartsN *a, float_status *s)\n g_assert_not_reached();\n }\n }\n+\n+static FloatPartsN *partsN(pick_nan)(FloatPartsN *a, FloatPartsN *b,\n+ float_status *s)\n+{\n+ if (is_snan(a->cls) || is_snan(b->cls)) {\n+ float_raise(float_flag_invalid, s);\n+ }\n+\n+ if (s->default_nan_mode) {\n+ parts_default_nan(a, s);\n+ } else {\n+ int cmp = frac_cmp(a, b);\n+ if (cmp == 0) {\n+ cmp = a->sign < b->sign;\n+ }\n+\n+ if (pickNaN(a->cls, b->cls, cmp > 0, s)) {\n+ a = b;\n+ }\n+ if (is_snan(a->cls)) {\n+ parts_silence_nan(a, s);\n+ }\n+ }\n+ return a;\n+}\n", "prefixes": [ "29/72" ] }