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GET /api/patches/1475702/?format=api
{ "id": 1475702, "url": "http://patchwork.ozlabs.org/api/patches/1475702/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20210508014802.892561-5-richard.henderson@linaro.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20210508014802.892561-5-richard.henderson@linaro.org>", "list_archive_url": null, "date": "2021-05-08T01:46:54", "name": "[04/72] accel/tcg: Use add/sub overflow routines in tcg-runtime-gvec.c", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "9eca0282bfd0c6fffcd33a5817352e1c5a403f30", "submitter": { "id": 72104, "url": "http://patchwork.ozlabs.org/api/people/72104/?format=api", "name": "Richard Henderson", "email": "richard.henderson@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20210508014802.892561-5-richard.henderson@linaro.org/mbox/", "series": [ { "id": 242770, "url": "http://patchwork.ozlabs.org/api/series/242770/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=242770", "date": "2021-05-08T01:46:53", "name": "Convert floatx80 and float128 to FloatParts", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/242770/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1475702/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1475702/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=<UNKNOWN>)", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=fFy18+Oa;\n\tdkim-atps=neutral" ], "Received": [ "from lists.gnu.org (lists.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 4FcVbv5kTlz9sX2\n\tfor <incoming@patchwork.ozlabs.org>; Sat, 8 May 2021 11:49:15 +1000 (AEST)", "from localhost ([::1]:43434 helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1lfC5h-00047X-Iw\n\tfor incoming@patchwork.ozlabs.org; Fri, 07 May 2021 21:49:13 -0400", "from eggs.gnu.org ([2001:470:142:3::10]:40516)\n by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <richard.henderson@linaro.org>)\n id 1lfC4i-00042p-IT\n for qemu-devel@nongnu.org; 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helo=mail-pj1-x1036.google.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.23", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Cc": "alex.bennee@linaro.org, david@redhat.com", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "\"Qemu-devel\"\n <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>" }, "content": "Obvious uses of the new functions.\n\nSigned-off-by: Richard Henderson <richard.henderson@linaro.org>\n---\n accel/tcg/tcg-runtime-gvec.c | 36 ++++++++++++++++--------------------\n 1 file changed, 16 insertions(+), 20 deletions(-)", "diff": "diff --git a/accel/tcg/tcg-runtime-gvec.c b/accel/tcg/tcg-runtime-gvec.c\nindex 521da4a813..ac7d28c251 100644\n--- a/accel/tcg/tcg-runtime-gvec.c\n+++ b/accel/tcg/tcg-runtime-gvec.c\n@@ -1073,9 +1073,8 @@ void HELPER(gvec_ssadd32)(void *d, void *a, void *b, uint32_t desc)\n for (i = 0; i < oprsz; i += sizeof(int32_t)) {\n int32_t ai = *(int32_t *)(a + i);\n int32_t bi = *(int32_t *)(b + i);\n- int32_t di = ai + bi;\n- if (((di ^ ai) &~ (ai ^ bi)) < 0) {\n- /* Signed overflow. */\n+ int32_t di;\n+ if (sadd32_overflow(ai, bi, &di)) {\n di = (di < 0 ? INT32_MAX : INT32_MIN);\n }\n *(int32_t *)(d + i) = di;\n@@ -1091,9 +1090,8 @@ void HELPER(gvec_ssadd64)(void *d, void *a, void *b, uint32_t desc)\n for (i = 0; i < oprsz; i += sizeof(int64_t)) {\n int64_t ai = *(int64_t *)(a + i);\n int64_t bi = *(int64_t *)(b + i);\n- int64_t di = ai + bi;\n- if (((di ^ ai) &~ (ai ^ bi)) < 0) {\n- /* Signed overflow. */\n+ int64_t di;\n+ if (sadd64_overflow(ai, bi, &di)) {\n di = (di < 0 ? INT64_MAX : INT64_MIN);\n }\n *(int64_t *)(d + i) = di;\n@@ -1143,9 +1141,8 @@ void HELPER(gvec_sssub32)(void *d, void *a, void *b, uint32_t desc)\n for (i = 0; i < oprsz; i += sizeof(int32_t)) {\n int32_t ai = *(int32_t *)(a + i);\n int32_t bi = *(int32_t *)(b + i);\n- int32_t di = ai - bi;\n- if (((di ^ ai) & (ai ^ bi)) < 0) {\n- /* Signed overflow. */\n+ int32_t di;\n+ if (ssub32_overflow(ai, bi, &di)) {\n di = (di < 0 ? INT32_MAX : INT32_MIN);\n }\n *(int32_t *)(d + i) = di;\n@@ -1161,9 +1158,8 @@ void HELPER(gvec_sssub64)(void *d, void *a, void *b, uint32_t desc)\n for (i = 0; i < oprsz; i += sizeof(int64_t)) {\n int64_t ai = *(int64_t *)(a + i);\n int64_t bi = *(int64_t *)(b + i);\n- int64_t di = ai - bi;\n- if (((di ^ ai) & (ai ^ bi)) < 0) {\n- /* Signed overflow. */\n+ int64_t di;\n+ if (ssub64_overflow(ai, bi, &di)) {\n di = (di < 0 ? INT64_MAX : INT64_MIN);\n }\n *(int64_t *)(d + i) = di;\n@@ -1209,8 +1205,8 @@ void HELPER(gvec_usadd32)(void *d, void *a, void *b, uint32_t desc)\n for (i = 0; i < oprsz; i += sizeof(uint32_t)) {\n uint32_t ai = *(uint32_t *)(a + i);\n uint32_t bi = *(uint32_t *)(b + i);\n- uint32_t di = ai + bi;\n- if (di < ai) {\n+ uint32_t di;\n+ if (uadd32_overflow(ai, bi, &di)) {\n di = UINT32_MAX;\n }\n *(uint32_t *)(d + i) = di;\n@@ -1226,8 +1222,8 @@ void HELPER(gvec_usadd64)(void *d, void *a, void *b, uint32_t desc)\n for (i = 0; i < oprsz; i += sizeof(uint64_t)) {\n uint64_t ai = *(uint64_t *)(a + i);\n uint64_t bi = *(uint64_t *)(b + i);\n- uint64_t di = ai + bi;\n- if (di < ai) {\n+ uint64_t di;\n+ if (uadd64_overflow(ai, bi, &di)) {\n di = UINT64_MAX;\n }\n *(uint64_t *)(d + i) = di;\n@@ -1273,8 +1269,8 @@ void HELPER(gvec_ussub32)(void *d, void *a, void *b, uint32_t desc)\n for (i = 0; i < oprsz; i += sizeof(uint32_t)) {\n uint32_t ai = *(uint32_t *)(a + i);\n uint32_t bi = *(uint32_t *)(b + i);\n- uint32_t di = ai - bi;\n- if (ai < bi) {\n+ uint32_t di;\n+ if (usub32_overflow(ai, bi, &di)) {\n di = 0;\n }\n *(uint32_t *)(d + i) = di;\n@@ -1290,8 +1286,8 @@ void HELPER(gvec_ussub64)(void *d, void *a, void *b, uint32_t desc)\n for (i = 0; i < oprsz; i += sizeof(uint64_t)) {\n uint64_t ai = *(uint64_t *)(a + i);\n uint64_t bi = *(uint64_t *)(b + i);\n- uint64_t di = ai - bi;\n- if (ai < bi) {\n+ uint64_t di;\n+ if (usub64_overflow(ai, bi, &di)) {\n di = 0;\n }\n *(uint64_t *)(d + i) = di;\n", "prefixes": [ "04/72" ] }