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GET /api/patches/1469678/?format=api
{ "id": 1469678, "url": "http://patchwork.ozlabs.org/api/patches/1469678/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20210423162748.1952-16-d-gerlach@ti.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20210423162748.1952-16-d-gerlach@ti.com>", "list_archive_url": null, "date": "2021-04-23T16:27:46", "name": "[15/17] arm: dts: k3-am642: Add r5 specific dt support", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "63b75527ed426463540a04b8aea526ccda7d3d06", "submitter": { "id": 61863, "url": "http://patchwork.ozlabs.org/api/people/61863/?format=api", "name": "Dave Gerlach", "email": "d-gerlach@ti.com" }, "delegate": { "id": 19261, "url": "http://patchwork.ozlabs.org/api/users/19261/?format=api", "username": "lokeshvutla", "first_name": "Lokesh", "last_name": "Vutla", "email": "lokeshvutla@ti.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20210423162748.1952-16-d-gerlach@ti.com/mbox/", "series": [ { "id": 240546, "url": "http://patchwork.ozlabs.org/api/series/240546/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=240546", "date": "2021-04-23T16:27:34", "name": "arm: mach-k3: Initial Support for Texas Instruments AM642 Platform", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/240546/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1469678/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1469678/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": 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[10.64.6.26])\n by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 13NGRniT122440\n (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL);\n Fri, 23 Apr 2021 11:27:49 -0500", "from DFLE103.ent.ti.com (10.64.6.24) by DFLE105.ent.ti.com\n (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Fri, 23\n Apr 2021 11:27:49 -0500", "from fllv0040.itg.ti.com (10.64.41.20) by DFLE103.ent.ti.com\n (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via\n Frontend Transport; Fri, 23 Apr 2021 11:27:49 -0500", "from localhost (ileax41-snat.itg.ti.com [10.172.224.153])\n by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 13NGRnOA009500;\n Fri, 23 Apr 2021 11:27:49 -0500" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-2.0 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH,\n DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,RCVD_IN_MSPIKE_H4,\n RCVD_IN_MSPIKE_WL,SPF_HELO_NONE autolearn=ham autolearn_force=no\n version=3.4.2", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com;\n s=ti-com-17Q1; t=1619195269;\n bh=3iQmubRJZ5f24eECDtXbBmAsVw21xJ1jSCt7NaFEmmU=;\n h=From:To:CC:Subject:Date:In-Reply-To:References;\n b=dpso8jbeESvHz3QSG6K2WwYfVem2OgCvqVp/PZQETT9A7zW2l6H/1W0Shtm2T7IjT\n D7i8tMcFRAzCsH7iIgFmhAC1ux8zfjQOP0z1tMWFUarwrrj2v2UE3xXB1Z0f3bzKzk\n JD1qBPuOFwLAvHHXtNnb9Sd+0bRsBcnetnx63lhY=", "From": "Dave Gerlach <d-gerlach@ti.com>", "To": "<u-boot@lists.denx.de>, Lokesh Vutla <lokeshvutla@ti.com>, Tom Rini\n <trini@konsulko.com>", "CC": "Praneeth Bajjuri <praneeth@ti.com>, Dave Gerlach <d-gerlach@ti.com>,\n Keerthy J <j-keerthy@ti.com>, Suman Anna <s-anna@ti.com>", "Subject": "[PATCH 15/17] arm: dts: k3-am642: Add r5 specific dt support", "Date": "Fri, 23 Apr 2021 11:27:46 -0500", "Message-ID": "<20210423162748.1952-16-d-gerlach@ti.com>", "X-Mailer": "git-send-email 2.28.0", "In-Reply-To": "<20210423162748.1952-1-d-gerlach@ti.com>", "References": "<20210423162748.1952-1-d-gerlach@ti.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-EXCLAIMER-MD-CONFIG": "e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.34", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.102.4 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "Add initial support for dt that runs on r5.\n\nSigned-off-by: Dave Gerlach <d-gerlach@ti.com>\n---\n arch/arm/dts/Makefile | 3 +-\n arch/arm/dts/k3-am642-evm-u-boot.dtsi | 58 +++++++++\n arch/arm/dts/k3-am642-r5-evm.dts | 169 ++++++++++++++++++++++++++\n 3 files changed, 229 insertions(+), 1 deletion(-)\n create mode 100644 arch/arm/dts/k3-am642-evm-u-boot.dtsi\n create mode 100644 arch/arm/dts/k3-am642-r5-evm.dts", "diff": "diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile\nindex 70ba1414fb01..b500e4059383 100644\n--- a/arch/arm/dts/Makefile\n+++ b/arch/arm/dts/Makefile\n@@ -1002,7 +1002,8 @@ dtb-$(CONFIG_SOC_K3_J721E) += k3-j721e-common-proc-board.dtb \\\n \t\t\t k3-j721e-r5-common-proc-board.dtb \\\n \t\t\t k3-j7200-common-proc-board.dtb \\\n \t\t\t k3-j7200-r5-common-proc-board.dtb\n-dtb-$(CONFIG_SOC_K3_AM642) += k3-am642-evm.dtb\n+dtb-$(CONFIG_SOC_K3_AM642) += k3-am642-evm.dtb \\\n+\t\t\t k3-am642-r5-evm.dtb\n \n dtb-$(CONFIG_ARCH_MEDIATEK) += \\\n \tmt7622-rfb.dtb \\\ndiff --git a/arch/arm/dts/k3-am642-evm-u-boot.dtsi b/arch/arm/dts/k3-am642-evm-u-boot.dtsi\nnew file mode 100644\nindex 000000000000..a8d5c4d21ad4\n--- /dev/null\n+++ b/arch/arm/dts/k3-am642-evm-u-boot.dtsi\n@@ -0,0 +1,58 @@\n+// SPDX-License-Identifier: GPL-2.0\n+/*\n+ * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/\n+ */\n+\n+/ {\n+\tchosen {\n+\t\tstdout-path = \"serial2:115200n8\";\n+\t\ttick-timer = &timer1;\n+\t};\n+};\n+\n+&cbass_main{\n+\tu-boot,dm-spl;\n+\ttimer1: timer@2400000 {\n+\t\tcompatible = \"ti,omap5430-timer\";\n+\t\treg = <0x0 0x2400000 0x0 0x80>;\n+\t\tti,timer-alwon;\n+\t\tclock-frequency = <25000000>;\n+\t\tu-boot,dm-spl;\n+\t};\n+};\n+\n+&main_uart0 {\n+\tu-boot,dm-spl;\n+};\n+\n+&dmss {\n+\tu-boot,dm-spl;\n+};\n+\n+&secure_proxy_main {\n+\tu-boot,dm-spl;\n+};\n+\n+&dmsc {\n+\tu-boot,dm-spl;\n+};\n+\n+&k3_pds {\n+\tu-boot,dm-spl;\n+};\n+\n+&k3_clks {\n+\tu-boot,dm-spl;\n+};\n+\n+&k3_reset {\n+\tu-boot,dm-spl;\n+};\n+\n+&sdhci0 {\n+\tu-boot,dm-spl;\n+};\n+\n+&sdhci1 {\n+\tu-boot,dm-spl;\n+};\ndiff --git a/arch/arm/dts/k3-am642-r5-evm.dts b/arch/arm/dts/k3-am642-r5-evm.dts\nnew file mode 100644\nindex 000000000000..8f4db0d2a4a0\n--- /dev/null\n+++ b/arch/arm/dts/k3-am642-r5-evm.dts\n@@ -0,0 +1,169 @@\n+// SPDX-License-Identifier: GPL-2.0\n+/*\n+ * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/\n+ */\n+\n+/dts-v1/;\n+\n+#include \"k3-am642.dtsi\"\n+\n+/ {\n+\tchosen {\n+\t\tstdout-path = \"serial2:115200n8\";\n+\t\ttick-timer = &timer1;\n+\t};\n+\n+\taliases {\n+\t\tremoteproc0 = &sysctrler;\n+\t\tremoteproc1 = &a53_0;\n+\t};\n+\n+\tmemory@80000000 {\n+\t\tdevice_type = \"memory\";\n+\t\t/* 2G RAM */\n+\t\treg = <0x00000000 0x80000000 0x00000000 0x80000000>;\n+\n+\t};\n+\n+\ta53_0: a53@0 {\n+\t\tcompatible = \"ti,am654-rproc\";\n+\t\treg = <0x00 0x00a90000 0x00 0x10>;\n+\t\tpower-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,\n+\t\t\t\t<&k3_pds 135 TI_SCI_PD_EXCLUSIVE>;\n+\t\tresets = <&k3_reset 135 0>;\n+\t\tclocks = <&k3_clks 61 0>;\n+\t\tassigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;\n+\t\tassigned-clock-parents = <&k3_clks 61 2>;\n+\t\tassigned-clock-rates = <200000000>, <1000000000>;\n+\t\tti,sci = <&dmsc>;\n+\t\tti,sci-proc-id = <32>;\n+\t\tti,sci-host-id = <10>;\n+\t\tu-boot,dm-spl;\n+\t};\n+\n+\treserved-memory {\n+\t\t#address-cells = <2>;\n+\t\t#size-cells = <2>;\n+\t\tranges;\n+\n+\t\tsecure_ddr: optee@9e800000 {\n+\t\t\treg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */\n+\t\t\talignment = <0x1000>;\n+\t\t\tno-map;\n+\t\t};\n+\t};\n+\n+\tclk_200mhz: dummy-clock-200mhz {\n+\t\tcompatible = \"fixed-clock\";\n+\t\t#clock-cells = <0>;\n+\t\tclock-frequency = <200000000>;\n+\t\tu-boot,dm-spl;\n+\t};\n+};\n+\n+&cbass_main {\n+\tsysctrler: sysctrler {\n+\t\tcompatible = \"ti,am654-system-controller\";\n+\t\tmboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>;\n+\t\tmbox-names = \"tx\", \"rx\";\n+\t\tu-boot,dm-spl;\n+\t};\n+};\n+\n+&main_pmx0 {\n+\tu-boot,dm-spl;\n+\tmain_uart0_pins_default: main-uart0-pins-default {\n+\t\tu-boot,dm-spl;\n+\t\tpinctrl-single,pins = <\n+\t\t\tAM64X_IOPAD(0x0238, PIN_INPUT, 0)\t\t/* (B16) UART0_CTSn */\n+\t\t\tAM64X_IOPAD(0x023c, PIN_OUTPUT, 0)\t\t/* (A16) UART0_RTSn */\n+\t\t\tAM64X_IOPAD(0x0230, PIN_INPUT, 0)\t\t/* (D15) UART0_RXD */\n+\t\t\tAM64X_IOPAD(0x0234, PIN_OUTPUT, 0)\t\t/* (C16) UART0_TXD */\n+\t\t>;\n+\t};\n+\n+\tmain_uart1_pins_default: main-uart1-pins-default {\n+\t\tu-boot,dm-spl;\n+\t\tpinctrl-single,pins = <\n+\t\t\tAM64X_IOPAD(0x0248, PIN_INPUT, 0)\t\t/* (D16) UART1_CTSn */\n+\t\t\tAM64X_IOPAD(0x024c, PIN_OUTPUT, 0)\t\t/* (E16) UART1_RTSn */\n+\t\t\tAM64X_IOPAD(0x0240, PIN_INPUT, 0)\t\t/* (E15) UART1_RXD */\n+\t\t\tAM64X_IOPAD(0x0244, PIN_OUTPUT, 0)\t\t/* (E14) UART1_TXD */\n+\t\t>;\n+\t};\n+\n+\tmain_mmc0_pins_default: main-mmc0-pins-default {\n+\t\tu-boot,dm-spl;\n+\t\tpinctrl-single,pins = <\n+\t\t\tAM64X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0)\t/* (B25) MMC0_CLK */\n+\t\t\tAM64X_IOPAD(0x01aC, PIN_INPUT_PULLUP, 0)\t/* (B27) MMC0_CMD */\n+\t\t\tAM64X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0)\t/* (A26) MMC0_DAT0 */\n+\t\t\tAM64X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0)\t/* (E25) MMC0_DAT1 */\n+\t\t\tAM64X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0)\t/* (C26) MMC0_DAT2 */\n+\t\t\tAM64X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0)\t/* (A25) MMC0_DAT3 */\n+\t\t\tAM64X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0)\t/* (E24) MMC0_DAT4 */\n+\t\t\tAM64X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0)\t/* (A24) MMC0_DAT5 */\n+\t\t\tAM64X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0)\t/* (B26) MMC0_DAT6 */\n+\t\t\tAM64X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0)\t/* (D25) MMC0_DAT7 */\n+\t\t\tAM64X_IOPAD(0x01b0, PIN_INPUT, 0)\t\t/* (C25) MMC0_DS */\n+\t\t>;\n+\t};\n+\n+\tmain_mmc1_pins_default: main-mmc1-pins-default {\n+\t\tu-boot,dm-spl;\n+\t\tpinctrl-single,pins = <\n+\t\t\tAM64X_IOPAD(0x0294, PIN_INPUT_PULLUP, 0)\t/* (J19) MMC1_CMD */\n+\t\t\tAM64X_IOPAD(0x028c, PIN_INPUT_PULLDOWN, 0)\t/* (L20) MMC1_CLK */\n+\t\t\tAM64X_IOPAD(0x0288, PIN_INPUT_PULLUP, 0)\t/* (K21) MMC1_DAT0 */\n+\t\t\tAM64X_IOPAD(0x0284, PIN_INPUT_PULLUP, 0)\t/* (L21) MMC1_DAT1 */\n+\t\t\tAM64X_IOPAD(0x0280, PIN_INPUT_PULLUP, 0)\t/* (K19) MMC1_DAT2 */\n+\t\t\tAM64X_IOPAD(0x027c, PIN_INPUT_PULLUP, 0)\t/* (K18) MMC1_DAT3 */\n+\t\t\tAM64X_IOPAD(0x0298, PIN_INPUT_PULLUP, 0)\t/* (D19) MMC1_SDCD */\n+\t\t\tAM64X_IOPAD(0x029c, PIN_INPUT_PULLUP, 0)\t/* (C20) MMC1_SDWP */\n+\t\t>;\n+\t};\n+};\n+\n+&dmsc {\n+\tmboxes= <&secure_proxy_main 0>,\n+\t\t<&secure_proxy_main 1>,\n+\t\t<&secure_proxy_main 0>;\n+\tmbox-names = \"rx\", \"tx\", \"notify\";\n+\tti,host-id = <35>;\n+\tti,secure-host;\n+};\n+\n+&main_uart0 {\n+\t/delete-property/ power-domains;\n+\t/delete-property/ clocks;\n+\t/delete-property/ clock-names;\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&main_uart0_pins_default>;\n+\tstatus = \"okay\";\n+};\n+\n+&main_uart1 {\n+\tu-boot,dm-spl;\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&main_uart1_pins_default>;\n+};\n+\n+&sdhci0 {\n+\t/delete-property/ power-domains;\n+\tclocks = <&clk_200mhz>;\n+\tclock-names = \"clk_xin\";\n+\tti,driver-strength-ohm = <50>;\n+\tdisable-wp;\n+\tpinctrl-0 = <&main_mmc0_pins_default>;\n+};\n+\n+&sdhci1 {\n+\t/delete-property/ power-domains;\n+\tclocks = <&clk_200mhz>;\n+\tclock-names = \"clk_xin\";\n+\tti,driver-strength-ohm = <50>;\n+\tdisable-wp;\n+\tpinctrl-0 = <&main_mmc1_pins_default>;\n+};\n+\n+#include \"k3-am642-evm-u-boot.dtsi\"\n", "prefixes": [ "15/17" ] }