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GET /api/patches/1469674/?format=api
{ "id": 1469674, "url": "http://patchwork.ozlabs.org/api/patches/1469674/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20210423162748.1952-12-d-gerlach@ti.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20210423162748.1952-12-d-gerlach@ti.com>", "list_archive_url": null, "date": "2021-04-23T16:27:42", "name": "[11/17] board: ti: am64x: Add board support for am64x evm", "commit_ref": "33b7258947f4a15a048f7c31c3f5d72221152ba2", "pull_url": null, "state": "accepted", "archived": false, "hash": "bde2112a2ec51e6121fafbf36cb1f8ae019e2c5b", "submitter": { "id": 61863, "url": "http://patchwork.ozlabs.org/api/people/61863/?format=api", "name": "Dave Gerlach", "email": "d-gerlach@ti.com" }, "delegate": { "id": 19261, "url": "http://patchwork.ozlabs.org/api/users/19261/?format=api", "username": "lokeshvutla", "first_name": "Lokesh", "last_name": "Vutla", "email": "lokeshvutla@ti.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20210423162748.1952-12-d-gerlach@ti.com/mbox/", "series": [ { "id": 240546, "url": "http://patchwork.ozlabs.org/api/series/240546/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=240546", "date": "2021-04-23T16:27:34", "name": "arm: mach-k3: Initial Support for Texas Instruments AM642 Platform", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/240546/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1469674/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1469674/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de;\n envelope-from=u-boot-bounces@lists.denx.de; receiver=<UNKNOWN>)", "ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=ti.com header.i=@ti.com header.a=rsa-sha256\n header.s=ti-com-17Q1 header.b=WJNmoEm2;\n\tdkim-atps=neutral", "phobos.denx.de;\n dmarc=pass (p=quarantine dis=none) header.from=ti.com", "phobos.denx.de;\n spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de", "phobos.denx.de;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=ti.com header.i=@ti.com header.b=\"WJNmoEm2\";\n\tdkim-atps=neutral", "phobos.denx.de;\n dmarc=pass (p=quarantine dis=none) header.from=ti.com", "phobos.denx.de;\n spf=pass smtp.mailfrom=d-gerlach@ti.com" ], "Received": [ "from phobos.denx.de (phobos.denx.de\n [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange X25519 server-signature RSA-PSS (4096 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 4FRfsT5NtLz9sVq\n\tfor <incoming@patchwork.ozlabs.org>; Sat, 24 Apr 2021 02:30:21 +1000 (AEST)", "from h2850616.stratoserver.net (localhost [IPv6:::1])\n\tby phobos.denx.de (Postfix) with ESMTP id F33DC82CDB;\n\tFri, 23 Apr 2021 18:28:48 +0200 (CEST)", "by phobos.denx.de (Postfix, from userid 109)\n id A8D2482CE4; Fri, 23 Apr 2021 18:28:15 +0200 (CEST)", "from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142])\n (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n (No client certificate requested)\n by phobos.denx.de (Postfix) with ESMTPS id 52D2A82CCA\n for <u-boot@lists.denx.de>; Fri, 23 Apr 2021 18:27:51 +0200 (CEST)", "from fllv0035.itg.ti.com ([10.64.41.0])\n by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 13NGRnr4050069;\n Fri, 23 Apr 2021 11:27:49 -0500", "from DFLE102.ent.ti.com (dfle102.ent.ti.com [10.64.6.23])\n by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 13NGRndX057732\n (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL);\n Fri, 23 Apr 2021 11:27:49 -0500", "from DFLE101.ent.ti.com (10.64.6.22) by DFLE102.ent.ti.com\n (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Fri, 23\n Apr 2021 11:27:48 -0500", "from fllv0039.itg.ti.com (10.64.41.19) by DFLE101.ent.ti.com\n (10.64.6.22) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via\n Frontend Transport; Fri, 23 Apr 2021 11:27:48 -0500", "from localhost (ileax41-snat.itg.ti.com [10.172.224.153])\n by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 13NGRmTs086154;\n Fri, 23 Apr 2021 11:27:48 -0500" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-2.0 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH,\n DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,RCVD_IN_MSPIKE_H4,\n RCVD_IN_MSPIKE_WL,SPF_HELO_NONE autolearn=ham autolearn_force=no\n version=3.4.2", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com;\n s=ti-com-17Q1; t=1619195269;\n bh=wH/0M06gQvoQO2i+JzuKk8frxYJKVj2jLa8hSCDQjms=;\n h=From:To:CC:Subject:Date:In-Reply-To:References;\n b=WJNmoEm2OnljGIIB331KLE5s0x+XkVMXKd/5pKNQWpGGurvTkGm3vN1CUIIdSE6lv\n LVne47YDp4bXClJ6mNXQioeRKKeGu4gE43nrL910leRovQHKdWzajlRZgUbIxnhlct\n P5N45/OL9iQR73n0yxNsKvMpPHelL+wmBgI+G1K8=", "From": "Dave Gerlach <d-gerlach@ti.com>", "To": "<u-boot@lists.denx.de>, Lokesh Vutla <lokeshvutla@ti.com>, Tom Rini\n <trini@konsulko.com>", "CC": "Praneeth Bajjuri <praneeth@ti.com>, Dave Gerlach <d-gerlach@ti.com>,\n Keerthy J <j-keerthy@ti.com>, Suman Anna <s-anna@ti.com>", "Subject": "[PATCH 11/17] board: ti: am64x: Add board support for am64x evm", "Date": "Fri, 23 Apr 2021 11:27:42 -0500", "Message-ID": "<20210423162748.1952-12-d-gerlach@ti.com>", "X-Mailer": "git-send-email 2.28.0", "In-Reply-To": "<20210423162748.1952-1-d-gerlach@ti.com>", "References": "<20210423162748.1952-1-d-gerlach@ti.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-EXCLAIMER-MD-CONFIG": "e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.34", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.102.4 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "Add board specific initialization for am64x based boards.\n\nSigned-off-by: Dave Gerlach <d-gerlach@ti.com>\n---\n arch/arm/mach-k3/Kconfig | 1 +\n board/ti/am64x/Kconfig | 53 ++++++++++++++++++\n board/ti/am64x/Makefile | 8 +++\n board/ti/am64x/evm.c | 48 +++++++++++++++++\n include/configs/am64x_evm.h | 105 ++++++++++++++++++++++++++++++++++++\n 5 files changed, 215 insertions(+)\n create mode 100644 board/ti/am64x/Kconfig\n create mode 100644 board/ti/am64x/Makefile\n create mode 100644 board/ti/am64x/evm.c\n create mode 100644 include/configs/am64x_evm.h", "diff": "diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig\nindex 35edc6d8eeb8..bfbce44bfa59 100644\n--- a/arch/arm/mach-k3/Kconfig\n+++ b/arch/arm/mach-k3/Kconfig\n@@ -148,5 +148,6 @@ config SYS_K3_SPL_ATF\n \t after SPL from R5.\n \n source \"board/ti/am65x/Kconfig\"\n+source \"board/ti/am64x/Kconfig\"\n source \"board/ti/j721e/Kconfig\"\n endif\ndiff --git a/board/ti/am64x/Kconfig b/board/ti/am64x/Kconfig\nnew file mode 100644\nindex 000000000000..a49e22266983\n--- /dev/null\n+++ b/board/ti/am64x/Kconfig\n@@ -0,0 +1,53 @@\n+# SPDX-License-Identifier: GPL-2.0+\n+#\n+# Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/\n+\n+choice\n+\tprompt \"K3 AM64 based boards\"\n+\toptional\n+\n+config TARGET_AM642_A53_EVM\n+\tbool \"TI K3 based AM642 EVM running on A53\"\n+\tselect ARM64\n+\tselect SOC_K3_AM642\n+\timply BOARD\n+\timply SPL_BOARD\n+\n+config TARGET_AM642_R5_EVM\n+\tbool \"TI K3 based AM642 EVM running on R5\"\n+\tselect CPU_V7R\n+\tselect SYS_THUMB_BUILD\n+\tselect K3_LOAD_SYSFW\n+\tselect SOC_K3_AM642\n+\timply SYS_K3_SPL_ATF\n+\n+endchoice\n+\n+if TARGET_AM642_A53_EVM\n+\n+config SYS_BOARD\n+ default \"am64x\"\n+\n+config SYS_VENDOR\n+ default \"ti\"\n+\n+config SYS_CONFIG_NAME\n+ default \"am64x_evm\"\n+\n+endif\n+\n+if TARGET_AM642_R5_EVM\n+\n+config SYS_BOARD\n+ default \"am64x\"\n+\n+config SYS_VENDOR\n+ default \"ti\"\n+\n+config SYS_CONFIG_NAME\n+ default \"am64x_evm\"\n+\n+config SPL_LDSCRIPT\n+\tdefault \"arch/arm/mach-omap2/u-boot-spl.lds\"\n+\n+endif\ndiff --git a/board/ti/am64x/Makefile b/board/ti/am64x/Makefile\nnew file mode 100644\nindex 000000000000..71bdca7d9592\n--- /dev/null\n+++ b/board/ti/am64x/Makefile\n@@ -0,0 +1,8 @@\n+#\n+# Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/\n+#\tKeerthy <j-keerthy@ti.com>\n+#\n+# SPDX-License-Identifier: GPL-2.0+\n+#\n+\n+obj-y\t+= evm.o\ndiff --git a/board/ti/am64x/evm.c b/board/ti/am64x/evm.c\nnew file mode 100644\nindex 000000000000..147fe5488a63\n--- /dev/null\n+++ b/board/ti/am64x/evm.c\n@@ -0,0 +1,48 @@\n+// SPDX-License-Identifier: GPL-2.0+\n+/*\n+ * Board specific initialization for AM642 EVM\n+ *\n+ * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/\n+ *\tKeerthy <j-keerthy@ti.com>\n+ *\n+ */\n+\n+#include <common.h>\n+#include <asm/io.h>\n+#include <spl.h>\n+\n+DECLARE_GLOBAL_DATA_PTR;\n+\n+int board_init(void)\n+{\n+\treturn 0;\n+}\n+\n+int dram_init(void)\n+{\n+\tgd->ram_size = 0x80000000;\n+\n+\treturn 0;\n+}\n+\n+int dram_init_banksize(void)\n+{\n+\t/* Bank 0 declares the memory available in the DDR low region */\n+\tgd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;\n+\tgd->bd->bi_dram[0].size = 0x80000000;\n+\tgd->ram_size = 0x80000000;\n+\n+\treturn 0;\n+}\n+\n+#if defined(CONFIG_SPL_LOAD_FIT)\n+int board_fit_config_name_match(const char *name)\n+{\n+#if defined(CONFIG_TARGET_AM642_A53_EVM)\n+\tif (!strcmp(name, \"k3-am642-evm\"))\n+\t\treturn 0;\n+#endif\n+\n+\treturn -1;\n+}\n+#endif\ndiff --git a/include/configs/am64x_evm.h b/include/configs/am64x_evm.h\nnew file mode 100644\nindex 000000000000..4f710181b31b\n--- /dev/null\n+++ b/include/configs/am64x_evm.h\n@@ -0,0 +1,105 @@\n+/* SPDX-License-Identifier: GPL-2.0+ */\n+/*\n+ * Configuration header file for K3 AM642 SoC family\n+ *\n+ * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/\n+ *\tKeerthy <j-keerthy@ti.com>\n+ */\n+\n+#ifndef __CONFIG_AM642_EVM_H\n+#define __CONFIG_AM642_EVM_H\n+\n+#include <linux/sizes.h>\n+#include <config_distro_bootcmd.h>\n+#include <environment/ti/mmc.h>\n+\n+/* DDR Configuration */\n+#define CONFIG_SYS_SDRAM_BASE1\t\t0x880000000\n+\n+#ifdef CONFIG_SYS_K3_SPL_ATF\n+#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME\t\"tispl.bin\"\n+#endif\n+\n+#ifndef CONFIG_CPU_V7R\n+#define CONFIG_SKIP_LOWLEVEL_INIT\n+#endif\n+\n+#define CONFIG_SPL_MAX_SIZE\t\tCONFIG_SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE\n+#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SPL_TEXT_BASE +\t\\\n+\t\t\t\t\tCONFIG_SYS_K3_NON_SECURE_MSRAM_SIZE - 4)\n+/*\n+ * Maximum size in memory allocated to the SPL BSS. Keep it as tight as\n+ * possible (to allow the build to go through), as this directly affects\n+ * our memory footprint. The less we use for BSS the more we have available\n+ * for everything else.\n+ */\n+#define CONFIG_SPL_BSS_MAX_SIZE\t\t0x5000\n+/*\n+ * Link BSS to be within SPL in a dedicated region located near the top of\n+ * the MCU SRAM, this way making it available also before relocation. Note\n+ * that we are not using the actual top of the MCU SRAM as there is a memory\n+ * location filled in by the boot ROM that we want to read out without any\n+ * interference from the C context.\n+ */\n+#define CONFIG_SPL_BSS_START_ADDR\t(CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX -\\\n+\t\t\t\t\t CONFIG_SPL_BSS_MAX_SIZE)\n+/* Configure R5 SPL post-relocation malloc pool in DDR */\n+#define CONFIG_SYS_SPL_MALLOC_START 0x84000000\n+#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_16M\n+\n+#define PARTS_DEFAULT \\\n+\t/* Linux partitions */ \\\n+\t\"name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}\\0\"\n+\n+/* U-Boot general configuration */\n+#define EXTRA_ENV_AM642_BOARD_SETTINGS\t\t\t\t\t\\\n+\t\"default_device_tree=\" CONFIG_DEFAULT_DEVICE_TREE \".dtb\\0\"\t\\\n+\t\"findfdt=\"\t\t\t\t\t\t\t\\\n+\t\t\"setenv name_fdt ${default_device_tree};\"\t\t\\\n+\t\t\"setenv fdtfile ${name_fdt}\\0\"\t\t\t\t\\\n+\t\"name_kern=Image\\0\"\t\t\t\t\t\t\\\n+\t\"console=ttyS2,115200n8\\0\"\t\t\t\t\t\\\n+\t\"args_all=setenv optargs earlycon=ns16550a,mmio32,0x02800000 \"\t\\\n+\t\t\"${mtdparts}\\0\"\t\t\t\t\t\t\\\n+\t\"run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}\\0\"\n+\n+/* U-Boot MMC-specific configuration */\n+#define EXTRA_ENV_AM642_BOARD_SETTINGS_MMC\t\t\t\t\\\n+\t\"boot=mmc\\0\"\t\t\t\t\t\t\t\\\n+\t\"mmcdev=1\\0\"\t\t\t\t\t\t\t\\\n+\t\"bootpart=1:2\\0\"\t\t\t\t\t\t\\\n+\t\"bootdir=/boot\\0\"\t\t\t\t\t\t\\\n+\t\"rd_spec=-\\0\"\t\t\t\t\t\t\t\\\n+\t\"init_mmc=run args_all args_mmc\\0\"\t\t\t\t\\\n+\t\"get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt}\\0\" \\\n+\t\"get_overlay_mmc=\"\t\t\t\t\t\t\\\n+\t\t\"fdt address ${fdtaddr};\"\t\t\t\t\\\n+\t\t\"fdt resize 0x100000;\"\t\t\t\t\t\\\n+\t\t\"for overlay in $name_overlays;\"\t\t\t\\\n+\t\t\"do;\"\t\t\t\t\t\t\t\\\n+\t\t\"load mmc ${bootpart} ${dtboaddr} ${bootdir}/${overlay} && \"\t\\\n+\t\t\"fdt apply ${dtboaddr};\"\t\t\t\t\\\n+\t\t\"done;\\0\"\t\t\t\t\t\t\\\n+\t\"get_kern_mmc=load mmc ${bootpart} ${loadaddr} \"\t\t\\\n+\t\t\"${bootdir}/${name_kern}\\0\"\t\t\t\t\\\n+\t\"get_fit_mmc=load mmc ${bootpart} ${addr_fit} \"\t\t\t\\\n+\t\t\"${bootdir}/${name_fit}\\0\"\t\t\t\t\\\n+\t\"partitions=\" PARTS_DEFAULT\n+\n+/* Incorporate settings into the U-Boot environment */\n+#define CONFIG_EXTRA_ENV_SETTINGS\t\t\t\t\t\\\n+\tDEFAULT_LINUX_BOOT_ENV\t\t\t\t\t\t\\\n+\tDEFAULT_MMC_TI_ARGS\t\t\t\t\t\t\\\n+\tEXTRA_ENV_AM642_BOARD_SETTINGS\t\t\t\t\t\\\n+\tEXTRA_ENV_AM642_BOARD_SETTINGS_MMC\n+\n+/* Now for the remaining common defines */\n+#include <configs/ti_armv7_common.h>\n+\n+/* MMC ENV related defines */\n+#ifdef CONFIG_ENV_IS_IN_MMC\n+#define CONFIG_SYS_MMC_ENV_DEV\t\t0\n+#define CONFIG_SYS_MMC_ENV_PART\t1\n+#endif\n+\n+#endif /* __CONFIG_AM642_EVM_H */\n", "prefixes": [ "11/17" ] }