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GET /api/patches/1469671/?format=api
{ "id": 1469671, "url": "http://patchwork.ozlabs.org/api/patches/1469671/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20210423162748.1952-8-d-gerlach@ti.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20210423162748.1952-8-d-gerlach@ti.com>", "list_archive_url": null, "date": "2021-04-23T16:27:38", "name": "[07/17] arm: mach-k3: am642: Shut down R5 core after ATF startup on A53", "commit_ref": "078332cee36fcb6562d2ef61913861b0a0f06b56", "pull_url": null, "state": "accepted", "archived": false, "hash": "217ce52e376882a603583ef56f163c97af2cf4b8", "submitter": { "id": 61863, "url": "http://patchwork.ozlabs.org/api/people/61863/?format=api", "name": "Dave Gerlach", "email": "d-gerlach@ti.com" }, "delegate": { "id": 19261, "url": "http://patchwork.ozlabs.org/api/users/19261/?format=api", "username": "lokeshvutla", "first_name": "Lokesh", "last_name": "Vutla", "email": "lokeshvutla@ti.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20210423162748.1952-8-d-gerlach@ti.com/mbox/", "series": [ { "id": 240546, "url": "http://patchwork.ozlabs.org/api/series/240546/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=240546", "date": "2021-04-23T16:27:34", "name": "arm: mach-k3: Initial Support for Texas Instruments AM642 Platform", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/240546/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1469671/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1469671/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=85.214.62.61; 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Sat, 24 Apr 2021 02:29:47 +1000 (AEST)", "from h2850616.stratoserver.net (localhost [IPv6:::1])\n\tby phobos.denx.de (Postfix) with ESMTP id D0E1482CED;\n\tFri, 23 Apr 2021 18:28:39 +0200 (CEST)", "by phobos.denx.de (Postfix, from userid 109)\n id 9ED6482CE3; Fri, 23 Apr 2021 18:28:10 +0200 (CEST)", "from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141])\n (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n (No client certificate requested)\n by phobos.denx.de (Postfix) with ESMTPS id 980DC82CC6\n for <u-boot@lists.denx.de>; Fri, 23 Apr 2021 18:27:50 +0200 (CEST)", "from lelv0265.itg.ti.com ([10.180.67.224])\n by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 13NGRnML014938;\n Fri, 23 Apr 2021 11:27:49 -0500", "from DFLE106.ent.ti.com (dfle106.ent.ti.com [10.64.6.27])\n by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 13NGRmso117975\n (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL);\n Fri, 23 Apr 2021 11:27:48 -0500", "from DFLE104.ent.ti.com (10.64.6.25) by DFLE106.ent.ti.com\n (10.64.6.27) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Fri, 23\n Apr 2021 11:27:48 -0500", "from fllv0039.itg.ti.com (10.64.41.19) by DFLE104.ent.ti.com\n (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via\n Frontend Transport; Fri, 23 Apr 2021 11:27:48 -0500", "from localhost (ileax41-snat.itg.ti.com [10.172.224.153])\n by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 13NGRmKD086151;\n Fri, 23 Apr 2021 11:27:48 -0500" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-2.0 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH,\n DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,SPF_HELO_NONE autolearn=ham\n autolearn_force=no version=3.4.2", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com;\n s=ti-com-17Q1; t=1619195269;\n bh=Yxpf+iQjZTBDNwwXVCJa/5HR/Ez4jTaixlx4UqDCx5E=;\n h=From:To:CC:Subject:Date:In-Reply-To:References;\n b=dtrrnGzvsxnR7KXqB1tkZKTg3FcGrdWpBDr2jCuFn9AfJq++7jlClPPgT1v2DFs5K\n 6qlMyb5jITOBi+HKD1uJJc+bVDAoi16bsNf3bsDj3Hlfg6pgOb6pR45jmV3N80WWOI\n U0ALNoVdyQ/UugDkDgIPipxK3PjOU992tX1BbWTI=", "From": "Dave Gerlach <d-gerlach@ti.com>", "To": "<u-boot@lists.denx.de>, Lokesh Vutla <lokeshvutla@ti.com>, Tom Rini\n <trini@konsulko.com>", "CC": "Praneeth Bajjuri <praneeth@ti.com>, Dave Gerlach <d-gerlach@ti.com>,\n Keerthy J <j-keerthy@ti.com>, Suman Anna <s-anna@ti.com>", "Subject": "[PATCH 07/17] arm: mach-k3: am642: Shut down R5 core after ATF\n startup on A53", "Date": "Fri, 23 Apr 2021 11:27:38 -0500", "Message-ID": "<20210423162748.1952-8-d-gerlach@ti.com>", "X-Mailer": "git-send-email 2.28.0", "In-Reply-To": "<20210423162748.1952-1-d-gerlach@ti.com>", "References": "<20210423162748.1952-1-d-gerlach@ti.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-EXCLAIMER-MD-CONFIG": "e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.34", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.102.4 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "From: Suman Anna <s-anna@ti.com>\n\nThe AM642 SoCs use the Main R5FSS0 as a boot processor, and runs\nthe R5 SPL that performs the initialization of the System Controller\nprocessor and starting the Arm Trusted Firmware (ATF) on the Arm\nCortex A53 cluster. The Core0 serves as this boot processor and is\nparked in WFE after all the initialization. Core1 does not directly\nparticipate in the boot flow, and is simply parked in a WFI.\n\nPower down these R5 cores (and the associated RTI timer resources\nthat were indirectly powered up) after starting up ATF on A53 by\nusing the appropriate SYSFW API in release_resources_for_core_shutdown().\nThis allows these Main R5F cores to be further controlled from the\nA53 to run regular applications.\n\nSigned-off-by: Suman Anna <s-anna@ti.com>\nSigned-off-by: Dave Gerlach <d-gerlach@ti.com>\n---\n arch/arm/mach-k3/am642_init.c | 51 +++++++++++++++++++++++++++++++++++\n 1 file changed, 51 insertions(+)", "diff": "diff --git a/arch/arm/mach-k3/am642_init.c b/arch/arm/mach-k3/am642_init.c\nindex adae9fbbb8cc..8931aaabf2f9 100644\n--- a/arch/arm/mach-k3/am642_init.c\n+++ b/arch/arm/mach-k3/am642_init.c\n@@ -230,3 +230,54 @@ u32 spl_boot_device(void)\n \t\treturn __get_backup_bootmedia(devstat);\n }\n #endif\n+\n+#if defined(CONFIG_SYS_K3_SPL_ATF)\n+\n+#define AM64X_DEV_RTI8\t\t\t127\n+#define AM64X_DEV_RTI9\t\t\t128\n+#define AM64X_DEV_R5FSS0_CORE0\t\t121\n+#define AM64X_DEV_R5FSS0_CORE1\t\t122\n+\n+void release_resources_for_core_shutdown(void)\n+{\n+\tstruct ti_sci_handle *ti_sci = get_ti_sci_handle();\n+\tstruct ti_sci_dev_ops *dev_ops = &ti_sci->ops.dev_ops;\n+\tstruct ti_sci_proc_ops *proc_ops = &ti_sci->ops.proc_ops;\n+\tint ret;\n+\tu32 i;\n+\n+\tconst u32 put_device_ids[] = {\n+\t\tAM64X_DEV_RTI9,\n+\t\tAM64X_DEV_RTI8,\n+\t};\n+\n+\t/* Iterate through list of devices to put (shutdown) */\n+\tfor (i = 0; i < ARRAY_SIZE(put_device_ids); i++) {\n+\t\tu32 id = put_device_ids[i];\n+\n+\t\tret = dev_ops->put_device(ti_sci, id);\n+\t\tif (ret)\n+\t\t\tpanic(\"Failed to put device %u (%d)\\n\", id, ret);\n+\t}\n+\n+\tconst u32 put_core_ids[] = {\n+\t\tAM64X_DEV_R5FSS0_CORE1,\n+\t\tAM64X_DEV_R5FSS0_CORE0, /* Handle CPU0 after CPU1 */\n+\t};\n+\n+\t/* Iterate through list of cores to put (shutdown) */\n+\tfor (i = 0; i < ARRAY_SIZE(put_core_ids); i++) {\n+\t\tu32 id = put_core_ids[i];\n+\n+\t\t/*\n+\t\t * Queue up the core shutdown request. Note that this call\n+\t\t * needs to be followed up by an actual invocation of an WFE\n+\t\t * or WFI CPU instruction.\n+\t\t */\n+\t\tret = proc_ops->proc_shutdown_no_wait(ti_sci, id);\n+\t\tif (ret)\n+\t\t\tpanic(\"Failed sending core %u shutdown message (%d)\\n\",\n+\t\t\t id, ret);\n+\t}\n+}\n+#endif\n", "prefixes": [ "07/17" ] }