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GET /api/patches/1469666/?format=api
{ "id": 1469666, "url": "http://patchwork.ozlabs.org/api/patches/1469666/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20210423162748.1952-9-d-gerlach@ti.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20210423162748.1952-9-d-gerlach@ti.com>", "list_archive_url": null, "date": "2021-04-23T16:27:39", "name": "[08/17] armv8: mach-k3: am642: Add custom MMU support", "commit_ref": "7fe7713c2ec6c7018ef1a2d92f2439156a4b12bc", "pull_url": null, "state": "accepted", "archived": false, "hash": "f850367d90e73fdf9f18c101920f925aec0c6c3f", "submitter": { "id": 61863, "url": "http://patchwork.ozlabs.org/api/people/61863/?format=api", "name": "Dave Gerlach", "email": "d-gerlach@ti.com" }, "delegate": { "id": 19261, "url": "http://patchwork.ozlabs.org/api/users/19261/?format=api", "username": "lokeshvutla", "first_name": "Lokesh", "last_name": "Vutla", "email": "lokeshvutla@ti.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20210423162748.1952-9-d-gerlach@ti.com/mbox/", "series": [ { "id": 240546, "url": "http://patchwork.ozlabs.org/api/series/240546/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=240546", "date": "2021-04-23T16:27:34", "name": "arm: mach-k3: Initial Support for Texas Instruments AM642 Platform", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/240546/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1469666/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1469666/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=85.214.62.61; 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Sat, 24 Apr 2021 02:28:40 +1000 (AEST)", "from h2850616.stratoserver.net (localhost [IPv6:::1])\n\tby phobos.denx.de (Postfix) with ESMTP id 314D682CD3;\n\tFri, 23 Apr 2021 18:28:10 +0200 (CEST)", "by phobos.denx.de (Postfix, from userid 109)\n id C51DE82CDE; Fri, 23 Apr 2021 18:28:02 +0200 (CEST)", "from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141])\n (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n (No client certificate requested)\n by phobos.denx.de (Postfix) with ESMTPS id EBCA782CD5\n for <u-boot@lists.denx.de>; Fri, 23 Apr 2021 18:27:50 +0200 (CEST)", "from fllv0034.itg.ti.com ([10.64.40.246])\n by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 13NGRnRH014950;\n Fri, 23 Apr 2021 11:27:49 -0500", "from DFLE109.ent.ti.com (dfle109.ent.ti.com [10.64.6.30])\n by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 13NGRnE2122430\n (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL);\n Fri, 23 Apr 2021 11:27:49 -0500", "from DFLE112.ent.ti.com (10.64.6.33) by DFLE109.ent.ti.com\n (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Fri, 23\n Apr 2021 11:27:48 -0500", "from fllv0040.itg.ti.com (10.64.41.20) by DFLE112.ent.ti.com\n (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via\n Frontend Transport; Fri, 23 Apr 2021 11:27:48 -0500", "from localhost (ileax41-snat.itg.ti.com [10.172.224.153])\n by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 13NGRmCs009488;\n Fri, 23 Apr 2021 11:27:48 -0500" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-2.0 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH,\n DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,SPF_HELO_NONE autolearn=ham\n autolearn_force=no version=3.4.2", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com;\n s=ti-com-17Q1; t=1619195269;\n bh=kGIc3mC4dMahCPHm0fM5/Q6lNbhePApUB01PERxMQrM=;\n h=From:To:CC:Subject:Date:In-Reply-To:References;\n b=gqXrtWDmo9Gg0jQ3JoYwqtK1Drheup5R26d0hqZc9RvPZ4jCFQ8uFIbpYddRjFCRK\n J7SU9CZuxJv/yG0siHIP6xdxllFu4g5/1Qw0nPH+l2qFYeJHyHvEUQh24v6seE0fbc\n EY1ff6nAI0jG8D+b1rM7rBvtDJCaqJmJ5dEAjw7I=", "From": "Dave Gerlach <d-gerlach@ti.com>", "To": "<u-boot@lists.denx.de>, Lokesh Vutla <lokeshvutla@ti.com>, Tom Rini\n <trini@konsulko.com>", "CC": "Praneeth Bajjuri <praneeth@ti.com>, Dave Gerlach <d-gerlach@ti.com>,\n Keerthy J <j-keerthy@ti.com>, Suman Anna <s-anna@ti.com>", "Subject": "[PATCH 08/17] armv8: mach-k3: am642: Add custom MMU support", "Date": "Fri, 23 Apr 2021 11:27:39 -0500", "Message-ID": "<20210423162748.1952-9-d-gerlach@ti.com>", "X-Mailer": "git-send-email 2.28.0", "In-Reply-To": "<20210423162748.1952-1-d-gerlach@ti.com>", "References": "<20210423162748.1952-1-d-gerlach@ti.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-EXCLAIMER-MD-CONFIG": "e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.34", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.102.4 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "From: Keerthy <j-keerthy@ti.com>\n\nChange the memory attributes for the DDR regions used by the remote\nprocessors on AM65x so that the cores can see and execute the proper code.\n\nA separate table based on the previous K3 SoCs is introduced since the\nnumber of remote processors and their DDR usage is different between the\nSoC families.\n\nSigned-off-by: Keerthy <j-keerthy@ti.com>\nSigned-off-by: Dave Gerlach <d-gerlach@ti.com>\n---\n arch/arm/mach-k3/arm64-mmu.c | 41 ++++++++++++++++++++++++++++++++++++\n 1 file changed, 41 insertions(+)", "diff": "diff --git a/arch/arm/mach-k3/arm64-mmu.c b/arch/arm/mach-k3/arm64-mmu.c\nindex a0da3df59388..94242e1e5cc3 100644\n--- a/arch/arm/mach-k3/arm64-mmu.c\n+++ b/arch/arm/mach-k3/arm64-mmu.c\n@@ -180,3 +180,44 @@ struct mm_region *mem_map = j7200_mem_map;\n #endif /* CONFIG_TARGET_J7200_A72_EVM */\n \n #endif /* CONFIG_SOC_K3_J721E */\n+\n+#ifdef CONFIG_SOC_K3_AM642\n+/* NR_DRAM_BANKS + 32bit IO + 64bit IO + terminator */\n+#define NR_MMU_REGIONS\t(CONFIG_NR_DRAM_BANKS + 3)\n+\n+/* ToDo: Add 64bit IO */\n+struct mm_region am64_mem_map[NR_MMU_REGIONS] = {\n+\t{\n+\t\t.virt = 0x0UL,\n+\t\t.phys = 0x0UL,\n+\t\t.size = 0x80000000UL,\n+\t\t.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |\n+\t\t\t PTE_BLOCK_NON_SHARE |\n+\t\t\t PTE_BLOCK_PXN | PTE_BLOCK_UXN\n+\t}, {\n+\t\t.virt = 0x80000000UL,\n+\t\t.phys = 0x80000000UL,\n+\t\t.size = 0x80000000UL,\n+\t\t.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |\n+\t\t\t PTE_BLOCK_INNER_SHARE\n+\t}, {\n+\t\t.virt = 0x880000000UL,\n+\t\t.phys = 0x880000000UL,\n+\t\t.size = 0x80000000UL,\n+\t\t.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |\n+\t\t\t PTE_BLOCK_INNER_SHARE\n+\t}, {\n+\t\t.virt = 0x500000000UL,\n+\t\t.phys = 0x500000000UL,\n+\t\t.size = 0x400000000UL,\n+\t\t.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |\n+\t\t\t PTE_BLOCK_NON_SHARE |\n+\t\t\t PTE_BLOCK_PXN | PTE_BLOCK_UXN\n+\t}, {\n+\t\t/* List terminator */\n+\t\t0,\n+\t}\n+};\n+\n+struct mm_region *mem_map = am64_mem_map;\n+#endif /* CONFIG_SOC_K3_AM642 */\n", "prefixes": [ "08/17" ] }