Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/1469665/?format=api
{ "id": 1469665, "url": "http://patchwork.ozlabs.org/api/patches/1469665/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20210423162748.1952-2-d-gerlach@ti.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20210423162748.1952-2-d-gerlach@ti.com>", "list_archive_url": null, "date": "2021-04-23T16:27:32", "name": "[01/17] arm: mach-k3: Add basic support for AM642 SoC definition", "commit_ref": "eb54168bb09bb46474f8017f53aedda98752dace", "pull_url": null, "state": "accepted", "archived": false, "hash": "d15837a140a96c447c01290f3e8363f58bba6bab", "submitter": { "id": 61863, "url": "http://patchwork.ozlabs.org/api/people/61863/?format=api", "name": "Dave Gerlach", "email": "d-gerlach@ti.com" }, "delegate": { "id": 19261, "url": "http://patchwork.ozlabs.org/api/users/19261/?format=api", "username": "lokeshvutla", "first_name": "Lokesh", "last_name": "Vutla", "email": "lokeshvutla@ti.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20210423162748.1952-2-d-gerlach@ti.com/mbox/", "series": [ { "id": 240546, "url": "http://patchwork.ozlabs.org/api/series/240546/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=240546", "date": "2021-04-23T16:27:34", "name": "arm: mach-k3: Initial Support for Texas Instruments AM642 Platform", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/240546/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1469665/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1469665/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de;\n envelope-from=u-boot-bounces@lists.denx.de; receiver=<UNKNOWN>)", "ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=ti.com header.i=@ti.com header.a=rsa-sha256\n header.s=ti-com-17Q1 header.b=Jykaf80a;\n\tdkim-atps=neutral", "phobos.denx.de;\n dmarc=pass (p=quarantine dis=none) header.from=ti.com", "phobos.denx.de;\n spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de", "phobos.denx.de;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=ti.com header.i=@ti.com header.b=\"Jykaf80a\";\n\tdkim-atps=neutral", "phobos.denx.de;\n dmarc=pass (p=quarantine dis=none) header.from=ti.com", "phobos.denx.de;\n spf=pass smtp.mailfrom=d-gerlach@ti.com" ], "Received": [ "from phobos.denx.de (phobos.denx.de\n [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange X25519 server-signature RSA-PSS (4096 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 4FRfqG5ND4z9sVq\n\tfor <incoming@patchwork.ozlabs.org>; Sat, 24 Apr 2021 02:28:26 +1000 (AEST)", "from h2850616.stratoserver.net (localhost [IPv6:::1])\n\tby phobos.denx.de (Postfix) with ESMTP id E7D7E82CC4;\n\tFri, 23 Apr 2021 18:28:06 +0200 (CEST)", "by phobos.denx.de (Postfix, from userid 109)\n id CCE0682B98; Fri, 23 Apr 2021 18:27:58 +0200 (CEST)", "from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142])\n (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n (No client certificate requested)\n by phobos.denx.de (Postfix) with ESMTPS id 9442782B98\n for <u-boot@lists.denx.de>; Fri, 23 Apr 2021 18:27:50 +0200 (CEST)", "from fllv0034.itg.ti.com ([10.64.40.246])\n by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 13NGRmYI050053;\n Fri, 23 Apr 2021 11:27:48 -0500", "from DFLE108.ent.ti.com (dfle108.ent.ti.com [10.64.6.29])\n by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 13NGRmbi122416\n (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL);\n Fri, 23 Apr 2021 11:27:48 -0500", "from DFLE107.ent.ti.com (10.64.6.28) by DFLE108.ent.ti.com\n (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Fri, 23\n Apr 2021 11:27:48 -0500", "from lelv0327.itg.ti.com (10.180.67.183) by DFLE107.ent.ti.com\n (10.64.6.28) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via\n Frontend Transport; Fri, 23 Apr 2021 11:27:48 -0500", "from localhost (ileax41-snat.itg.ti.com [10.172.224.153])\n by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 13NGRm3i046478;\n Fri, 23 Apr 2021 11:27:48 -0500" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-2.0 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH,\n DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,RCVD_IN_MSPIKE_H4,\n RCVD_IN_MSPIKE_WL,SPF_HELO_NONE autolearn=ham autolearn_force=no\n version=3.4.2", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com;\n s=ti-com-17Q1; t=1619195268;\n bh=fbHwVKTwHeBuAx6ECbB4pXyIzzvbyjCxT+HcuxdHNYQ=;\n h=From:To:CC:Subject:Date:In-Reply-To:References;\n b=Jykaf80aAIregWtJSIV7CtYPuDvB677ayUQLRPjlv9EJhg0oTJWKUis5pobXGykRf\n VcD/mjiyLe4a/L+x6klM+CH8M5D/17fk64K7jeJEQbtxcP3IemxTNyxhnuFTt4LajK\n fVine9buS3Nlyibo7UY7BziRXuII8auxMn7dDRyQ=", "From": "Dave Gerlach <d-gerlach@ti.com>", "To": "<u-boot@lists.denx.de>, Lokesh Vutla <lokeshvutla@ti.com>, Tom Rini\n <trini@konsulko.com>", "CC": "Praneeth Bajjuri <praneeth@ti.com>, Dave Gerlach <d-gerlach@ti.com>,\n Keerthy J <j-keerthy@ti.com>, Suman Anna <s-anna@ti.com>", "Subject": "[PATCH 01/17] arm: mach-k3: Add basic support for AM642 SoC\n definition", "Date": "Fri, 23 Apr 2021 11:27:32 -0500", "Message-ID": "<20210423162748.1952-2-d-gerlach@ti.com>", "X-Mailer": "git-send-email 2.28.0", "In-Reply-To": "<20210423162748.1952-1-d-gerlach@ti.com>", "References": "<20210423162748.1952-1-d-gerlach@ti.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-EXCLAIMER-MD-CONFIG": "e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.34", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.102.4 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "The AM642 SoC belongs to the K3 Multicore SoC architecture platform,\nproviding advanced system integration to enable applications such as\nMotor Drives, PLC, Remote IO and IoT Gateways.\n\nSome highlights of this SoC are:\n* Dual Cortex-A53s in a single cluster, two clusters of dual Cortex-R5F\n MCUs, and a single Cortex-M4F.\n* Two Gigabit Industrial Communication Subsystems (ICSSG).\n* Integrated Ethernet switch supporting up to a total of two external\n ports.\n* PCIe-GEN2x1L, USB3/USB2, 2xCAN-FD, eMMC and SD, UFS, OSPI memory\n controller, QSPI, I2C, eCAP/eQEP, ePWM, ADC, among other\n peripherals.\n* Centralized System Controller for Security, Power, and Resource\n Management (DMSC).\n\nSee AM64X Technical Reference Manual (SPRUIM2, Nov 2020)\nfor further details: https://www.ti.com/lit/pdf/spruim2\n\nSigned-off-by: Dave Gerlach <d-gerlach@ti.com>\n---\n arch/arm/mach-k3/Kconfig | 14 ++++++++++----\n arch/arm/mach-k3/Makefile | 1 +\n arch/arm/mach-k3/am642_init.c | 28 ++++++++++++++++++++++++++++\n 3 files changed, 39 insertions(+), 4 deletions(-)\n create mode 100644 arch/arm/mach-k3/am642_init.c", "diff": "diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig\nindex c7d186149ba5..35edc6d8eeb8 100644\n--- a/arch/arm/mach-k3/Kconfig\n+++ b/arch/arm/mach-k3/Kconfig\n@@ -10,6 +10,9 @@ config SOC_K3_AM6\n config SOC_K3_J721E\n \tbool \"TI's K3 based J721E SoC Family Support\"\n \n+config SOC_K3_AM642\n+\tbool \"TI's K3 based AM642 SoC Family Support\"\n+\n endchoice\n \n config SYS_SOC\n@@ -19,16 +22,18 @@ config SYS_K3_NON_SECURE_MSRAM_SIZE\n \thex\n \tdefault 0x80000 if SOC_K3_AM6\n \tdefault 0x100000 if SOC_K3_J721E\n+\tdefault 0x1c0000 if SOC_K3_AM642\n \thelp\n-\t Describes the total size of the MCU MSRAM. This doesn't\n-\t specify the total size of SPL as ROM can use some part\n-\t of this RAM. Once ROM gives control to SPL then this\n-\t complete size can be usable.\n+\t Describes the total size of the MCU or OCMC MSRAM present on\n+\t the SoC in use. This doesn't specify the total size of SPL as\n+\t ROM can use some part of this RAM. Once ROM gives control to\n+\t SPL then this complete size can be usable.\n \n config SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE\n \thex\n \tdefault 0x58000 if SOC_K3_AM6\n \tdefault 0xc0000 if SOC_K3_J721E\n+\tdefault 0x180000 if SOC_K3_AM642\n \thelp\n \t Describes the maximum size of the image that ROM can download\n \t from any boot media.\n@@ -51,6 +56,7 @@ config SYS_K3_BOOT_PARAM_TABLE_INDEX\n \thex\n \tdefault 0x41c7fbfc if SOC_K3_AM6\n \tdefault 0x41cffbfc if SOC_K3_J721E\n+\tdefault 0x701bebfc if SOC_K3_AM642\n \thelp\n \t Address at which ROM stores the value which determines if SPL\n \t is booted up by primary boot media or secondary boot media.\ndiff --git a/arch/arm/mach-k3/Makefile b/arch/arm/mach-k3/Makefile\nindex 7572f56925cd..890d1498d0c8 100644\n--- a/arch/arm/mach-k3/Makefile\n+++ b/arch/arm/mach-k3/Makefile\n@@ -5,6 +5,7 @@\n \n obj-$(CONFIG_SOC_K3_AM6) += am6_init.o\n obj-$(CONFIG_SOC_K3_J721E) += j721e_init.o\n+obj-$(CONFIG_SOC_K3_AM642) += am642_init.o\n obj-$(CONFIG_ARM64) += arm64-mmu.o\n obj-$(CONFIG_CPU_V7R) += r5_mpu.o lowlevel_init.o\n obj-$(CONFIG_TI_SECURE_DEVICE) += security.o\ndiff --git a/arch/arm/mach-k3/am642_init.c b/arch/arm/mach-k3/am642_init.c\nnew file mode 100644\nindex 000000000000..e73450da41da\n--- /dev/null\n+++ b/arch/arm/mach-k3/am642_init.c\n@@ -0,0 +1,28 @@\n+// SPDX-License-Identifier: GPL-2.0\n+/*\n+ * AM642: SoC specific initialization\n+ *\n+ * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/\n+ *\tKeerthy <j-keerthy@ti.com>\n+ *\tDave Gerlach <d-gerlach@ti.com>\n+ */\n+\n+#include <common.h>\n+#include <spl.h>\n+#include <asm/io.h>\n+#include \"common.h\"\n+\n+#if defined(CONFIG_SPL_BUILD)\n+\n+void board_init_f(ulong dummy)\n+{\n+#if defined(CONFIG_CPU_V7R)\n+\tsetup_k3_mpu_regions();\n+#endif\n+\n+\t/* Init DM early */\n+\tspl_early_init();\n+\n+\tpreloader_console_init();\n+}\n+#endif\n", "prefixes": [ "01/17" ] }